EVAL-ADAU1452MINIZ User Guide
UG-636
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the ADAU1452 SigmaDSP Audio Processor
FEATURES
GENERAL DESCRIPTION
4 analog inputs
8 analog outputs
Stereo S/PDIF input and output
Self-boot EEPROM memory
This user guide explains the design, setup, and operation of the
EVAL-ADAU1452MINIZ evaluation board.
EVALUATION KIT CONTENTS
EVAL-ADAU1452MINIZ evaluation board
EVAL-ADUSB2EBZ (USBi) communications adapter
USB cable with Mini-B plug
6 V ac-to-dc power supply
ADDITIONAL EQUIPMENT NEEDED
2 audio cables
2 optical cables
PC running Windows XP, Windows Vista, or Windows 7
DOCUMENTS NEEDED
ADAU1452 data sheet
AD1938 data sheet
AN-1006 Applications Note, Using the EVAL-ADUSB2EBZ
This evaluation board provides access to the digital serial audio
ports of the ADAU1452, as well as some of its general-purpose
I/Os. An analog I/O is provided by the included AD1938 codec.
The ADAU1452 core is controlled by Analog Devices, Inc.,
SigmaStudio™ software, which interfaces to the board via a USB
connection. The board is powered by a 6 V dc supply, which is
regulated to the voltages required on the board. The printed
circuit board (PCB) is a 4-layer design, with a single ground
plane and a single power plane on the inner layers. The board
contains connectors for external analog inputs and outputs and
optical S/PDIF interfaces. The master clock is provided by the
integrated oscillator circuit and the on-board 12.288 MHz
passive crystal.
For more information about the ADAU1452 device, see the
ADAU1452 data sheet, which should be used in conjunction
with this user guide.
11926-001
PHOTOGRAPH OF THE EVAL-ADAU1452MINIZ EVALUATION BOARD
Figure 1. Evaluation Board Top Side Photograph
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
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EVAL-ADAU1452MINIZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Adding S/PDIF Input and Output to the Project ................... 10
Evaluation Kit Contents ................................................................... 1
Using the Evaluation Board .......................................................... 14
Additional Equipment Needed ....................................................... 1
Power Supply............................................................................... 14
Documents Needed .......................................................................... 1
Inputs and Outputs .................................................................... 14
General Description ......................................................................... 1
Multipurpose (MP) Pins ........................................................... 16
Photograph of the EVAL-ADAU1452MINIZ Evaluation Board ..... 1
Auxiliary ADC Pins ................................................................... 16
Revision History ............................................................................... 2
Communications Header .......................................................... 16
Evaluation Board Block Diagrams ................................................. 3
Self-Boot ...................................................................................... 17
Setting Up the Evaluation Board .................................................... 4
Reset ............................................................................................. 19
Installing the SigmaStudio Software .......................................... 4
Status LEDs ................................................................................. 19
Installing the USBi (EVAL-ADUSB2EBZ) Drivers.................. 4
Hardware Description.................................................................... 20
Setting the S2 Switch .................................................................... 5
Integrated Circuits (IC) ............................................................. 20
Powering Up the Board ............................................................... 5
Status LEDs ................................................................................. 20
Connecting the Audio Cables ..................................................... 6
Switch and Push-Button ............................................................ 20
Setting Up Communications in SigmaStudio........................... 7
Evaluation Board Schematics and Layout Artwork ................... 21
Creating a Basic Signal Flow ....................................................... 8
Bill of Materials ............................................................................... 38
Downloading the Program to the DSP ...................................... 9
REVISION HISTORY
1/14—Revision 0: Initial Version
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EVALUATION BOARD BLOCK DIAGRAMS
SPI
COMMUNICATIONS
HEADER
POWER
SUPPLY
REGULATION
S/PDIF
TRANSMITTER
S/PDIF
RECEIVER
SELF-BOOT
EEPROM
RESET
ADAU1452
SERIAL AUDIO
CONNECTORS
STATUS LEDs
STEREO LINE
OUTPUTS
STEREO LINE
INPUTS
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CRYSTAL
RESONATOR
AD1938
DC POWER
CONNECTOR
SPI CONTROL PORT
TR
A S/P
N D
SM IF
IT
TE
R
R S/P
EC D
EI IF
VE
R
Figure 2. Functional Block Diagram
STATUS LEDs
AD1938 AUDIO CODEC
Figure 3. Board Layout Block Diagram
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SERIAL INTERFACE
SELF–BOOT
ANALOG AUDIO INPUTS
RESET
ANALOG AUDIO OUTPUTS
ADAU1452
SIGMADSP
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EVAL-ADAU1452MINIZ User Guide
SETTING UP THE EVALUATION BOARD
INSTALLING THE SigmaStudio SOFTWARE
1.
You can download the latest version of SigmaStudio by
completing the following steps:
2.
3.
4.
5.
Install the latest version of Microsoft .NET Framework if you
do not already have it installed. It can be downloaded from
the Microsoft website.
Go to www.analog.com/SigmaStudio and select the latest
version of SigmaStudio from the Download Products section.
Log into your myAnalog account. (If you do not have an
account, point to myAnalog, click Log In, and then click
Register to create a new account.)
Fill in the download form and choose SigmaDSP as the
target hardware.
Download the installer and execute the executable. Follow the
prompts, including accepting the license agreement, to install
the software.
INSTALLING THE USBi (EVAL-ADUSB2EBZ)
DRIVERS
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1.
From the Found New Hardware Wizard window, select
the Install from a list or specific location (Advanced)
option and click Next > (see Figure 5).
Figure 5. Found New Hardware Wizard—Installation
2.
SigmaStudio must be installed to use the USB interface (USBi).
After the SigmaStudio installation is complete,
1.
Connect the USBi to an available USB 2.0 port using the
USB cable included in the evaluation board kit. (The USBi
will not function properly with a USB 3.0 port.)
2.
Install the driver software (see the Using Windows XP
section or the Using Windows 7 or Windows Vista section
for more information).
Click Search for the best driver in these locations, select
Include this location in the search, and click Browse to
find the USB drivers subdirectory within the SigmaStudio
directory (see Figure 6).
Using Windows XP
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After connecting the USBi to the USB 2.0 port, Windows® XP
recognizes the device (see Figure 4) and prompts you to install
the drivers.
Figure 4. Found New Hardware Notification
Figure 6. Found New Hardware Wizard—Search and Installation Options
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EVAL-ADAU1452MINIZ User Guide
When the warning about Windows logo testing appears,
click Continue Anyway (see Figure 7).
2.
In Windows Device Manager under the Universal Serial
Bus controllers section (see Figure 10), check that Analog
Devices USBi (programmed) is displayed.
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3.
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Figure 10. Confirming Successful Driver Installation Using the Device Manager
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SETTING THE S2 SWITCH
When setting up the evaluation board,
1.
Figure 7. Windows Logo Testing Warning
The USBi drivers should now be installed successfully. Leave the
USBi connected to the PC.
Using Windows 7 or Windows Vista
After connecting the USBi to the USB 2.0 port, Windows® 7 or
Windows Vista recognizes the device and installs the drivers
automatically (see Figure 8). After the installation is complete,
leave the USBi connected to the PC.
Ensure that the S2 switch is in the DISABLED position.
The default position of this switch is the ENABLED position,
which causes the ADAU1452 to execute a self-boot operation at
power-up. When the switch is in the DISABLED position, no
self-boot operation is executed, and the ADAU1452 powers up
into its default state.
POWERING UP THE BOARD
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To power up the evaluation board,
1.
Connect the included power supply to the wall outlet
(100 V to 240 V, ac 50 Hz to 60 Hz).
2.
Connect the female plug of the power supply to the J4 male
connector on the EVAL-ADAU1452MINIZ, as shown in
Figure 11.
Figure 8. USBi Driver Installed Correctly
Confirming Proper Installation of the USBi Drivers
To confirm that the USBi drivers have been installed properly,
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With the USBi still connected to the USB 2.0 port of the
computer, check that both the yellow I2C LED and the red
power indicator LED are illuminated (see Figure 9).
Figure 11. Connecting the Power Supply
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1.
3.
After the power supply is connected, the status LED
D7 (A_3V3) illuminates.
4.
Connect the ribbon cable of the USBi to the control port of
the EVAL-ADAU1452MINIZ. (The USBi should already be
connected to the USB 2.0 port of the computer.)
Figure 9. State of USBi Status LEDs After Successful Driver Installation
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Figure 12. Connecting the USBi to the SPI Control Port Header
Figure 14. Analog Stereo Output Connection
CONNECTING THE AUDIO CABLES
OUT
To connect the audio cables,
1.
Connect a stereo audio source to J11 (IN1) with a standard
1/8" stereo TRS audio cable. (The audio signals should be
single-ended and line level, with a maximum peak-to-peak
voltage of 2.828 V. The tip of the plug is the left channel of
audio, the ring is the right channel of audio, and the sleeve
is the common or ground.)
2.
Connect headphones or powered speakers to J12 (OUT1).
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Figure 13 shows the input source connection. Figure 14 shows
the output connection. Figure 15 shows the location of the
connectors on the board.
IN
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Figure 13. Analog Stereo Input Source Connection
Figure 15. Location of Stereo Output OUT1 (J12) and Stereo Input IN1 (J11),
Rotated 90°
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SETTING UP COMMUNICATIONS IN SigmaStudio
b.
1.
Start SigmaStudio by double-clicking the shortcut on the
desktop or by finding and executing the executable in
Windows Explorer.
2.
Create a new project by selecting New Project from the
File menu or by pressing CTRL+N. (The default view of
the new project is the Hardware Configuration tab.)
3.
In the Hardware Configuration tab, add the appropriate
components to the project space by clicking and dragging
them from the Tree ToolBox on the left of the window to the
empty white space located on the right of the window.
Add a USBi component from the Communication
Channels subsection of the toolbox (see Figure 16).
Figure 19. USBi Not Detected by SigmaStudio
5.
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a.
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To set up communications in SigmaStudio,
Figure 16. Adding the USBi Communication Channel
Add an ADAU1452 component from the Processors
(ICs/DSPs) subsection of the toolbox (see Figure 17).
Connect the USB interface to the target integrated circuit (IC),
the ADAU1452, by clicking and dragging a line, representing
a wire, between the blue pin of the USBi and the green pin
of the IC (see Figure 20). This allows the USBi to
communicate with the ADAU1452. The corresponding
drop-down box of the USBi automatically fills with the
default mode and channel for that IC. In the case of the
ADAU1452, the default communications mode is SPI, the
default slave select line is 1, and the default address is 0.
11926-021
b.
If SigmaStudio cannot detect the USBi on the USB port
of the PC, the background of the USB label is red (see
Figure 19). This may occur when the USBi is not connected or when the drivers have been installed incorrectly.
Figure 17. Adding an ADAU1452
a.
If SigmaStudio detects the USBi, the background of
the USB label is green in the USB Interface box (see
Figure 18).
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Ensure that SigmaStudio can detect the USBi on the USB port
of the PC as follows:
Figure 20. Connecting the USBi to an ADAU1452 in the Hardware
Configuration Tab
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4.
Figure 18. USBi Detected by SigmaStudio
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EVAL-ADAU1452MINIZ User Guide
CREATING A BASIC SIGNAL FLOW
To create a signal processing flow,
Click the Schematic tab near the top of the window (see
Figure 21).
11926-023
1.
Figure 21. Schematic Tab
Figure 23. Input Block
b.
Add two Output blocks as follows, making sure that
these blocks are assigned to Channel 0 and Channel 1:
i. From the ADAU1452 > IO > Output folder, click
Output (see Figure 24) and drag it into the project
space to the right of the toolbox.
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i. To add an Input block, from the ADAU1452 >
IO > Input > sdata 0-15 folder, click Input (see
Figure 22) and drag it into the project space to
the right of the toolbox (see Figure 23). (By
default, Channel 0 and Channel 1 are selected.
This matches the analog audio source hardware
connections shown in Figure 13 and Figure 14;
therefore, no modifications are needed.)
11926-025
Add the appropriate elements to the project space by
clicking and dragging them from the Tree ToolBox on the
left of the window to the empty white space located on the
right of the window. (The toolbox contains all of the
algorithms that can run in SigmaDSP.)
Figure 24. Output Block Selection
ii. Repeat the previous step to add another output
(see Figure 25).
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Figure 22. Input Block Selection
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2.
Figure 25. Output Blocks
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EVAL-ADAU1452MINIZ User Guide
Connect each Input channel to its corresponding Output
channel by clicking and dragging a line, representing a wire,
between the blue pin of the Input channel and the green pin
of the Output channel (see Figure 26). (Input Channel 0
connects to Output Channel 0, and Input Channel 1
connects to Output Channel 1.)
DOWNLOADING THE PROGRAM TO THE DSP
To compile and download the code to the DSP,
1.
Click the Link-Compile-Download button once in the
main toolbar of SigmaStudio (see Figure 29). Alternatively,
press F7.
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3.
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Figure 29. Link-Compile-Download Button
After the code has been downloaded to the DSP,
11926-028
•
Figure 26. Connected Signal Flow with Stereo Input and Stereo Output
The default register settings in SigmaStudio are configured to
match the hardware of the EVAL-ADAU1452MINIZ, including
the signal routing between the ADAU1452 and the AD1938 codec.
•
After completing these steps, the basic signal flow is complete,
with the stereo analog input source passing directly through the
SigmaDSP and connecting to the stereo analog output.
To add a Volume Control block, from the Volume
Controls > Adjustable Gain > Clickless HW Slew folder,
click Single Volume and drag it into the project space to the
right of the toolbox.
Figure 30. Design Mode and Blue Status Bar
11926-033
1.
11926-031
Add Volume Control
If the compiler is successful in compiling the project, the
compiled data downloads from SigmaStudio via the USBi
to the ADAU1452, and the SigmaDSP starts running.
The status bar turns from blue to green and the mode displayed
changes from Design Mode to Active: Downloaded in the
lower right corner of the window (see Figure 30 and Figure 31).
(Until this point, SigmaStudio has been in design mode, as
denoted by the blue bar at the bottom of the screen and the
words Design Mode displayed in the lower right corner of
the SigmaStudio window (see Figure 30).)
Figure 31. Active Downloaded Mode and Green Status Bar
11926-029
•
Figure 27. Single Volume Block Selection
Delete the existing yellow connection wires (that is, the
connections added in Step 3 of the previous section) by
clicking on them and then pressing the DELETE key.
3.
Connect the blocks as shown in Figure 28.
•
11926-030
2.
The signal flow begins running on the evaluation board, and
the audio passes from the analog input to the analog output.
(The volume can be changed in real time by clicking and
dragging the volume control slider in the Schematic tab.)
If the Output window was open at the time of compilation,
a compiler output log is displayed, as shown in Figure 32.
The Output window can be opened or closed by using the
keyboard shortcut CTRL+4. The Output window shows
the compiler output log only if it was open when the LinkCompile-Download button was clicked.
Figure 28. Completed Signal Flow with Volume Control
11926-034
The schematic is ready to be compiled and downloaded to the
evaluation board.
Figure 32. Compiler Output Window
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EVAL-ADAU1452MINIZ User Guide
ADDING S/PDIF INPUT AND OUTPUT TO THE
PROJECT
The EVAL-ADAU1452MINIZ board has two optical S/PDIF
interfaces. One interface is an input that converts the optical
signal to an electrical signal, which goes to the ADAU1452
S/PDIF receiver (the SPDIFIN pin). The other interface is an
optical output that takes the electrical output from the
ADAU1452 S/PDIF transmitter (the SPDIFOUT pin) and
converts it to an optical signal.
11926-036
Figure 33 shows the locations of the optical input connector and
the optical output connector. The connectors are located on the
underside of the PCB.
Figure 34. Photograph of the Optical S/PDIF Input Connection
2.
Configure the S/PDIF input and output by modifying the
ADAU1452 registers as follows:
a.
IN
Click the Hardware Configuration tab, and then click
the IC 1 – ADAU145x Register Controls tab at the
bottom of the window (see Figure 35).
11926-037
OUT
Figure 35. ADAU145x Register Controls Tab
Click the SPDIF tab (see Figure 37). (There are several
register control tabs listed across the top of the
window. To access the SPDIF tab, scroll to the right by
clicking the right arrow (see Figure 36).)
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b.
11926-039
Figure 36. Using the Register Tab Scroll Button
Figure 37. Selecting the SPDIF Tab
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c.
Figure 33. Location of S/PDIF Optical Input (J5) and Output (J6), Rotated 90°
To add an S/PDIF input and output to the project in SigmaStudio,
Connect an S/PDIF source to the EVAL-ADAU1452MINIZ
by using a standard TOSLINK optical cable and connecting
it to J8, the S/PDIF receiver connector (see Figure 34).
11926-040
1.
Enable the SPDIF_RESTART register by clicking Do
not restart the audio once a re-lock has occurred in
the SPDIF RESTART box. (Upon clicking this button,
the text displayed on the button changes to Restarts
the audio once a re-lock has occurred and the button
color changes from red to green (see Figure 38).)
Figure 38. Activating the SPDIF_RESTART Register
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EVAL-ADAU1452MINIZ User Guide
Activate the SPDIF_TX_ENABLE register by clicking
Disabled in the SPDIF TX EN box. (Upon clicking
this button, the text displayed on the button changes
to Enabled and the button color changes from red to
green (see Figure 39).)
5.
Configure the S/PDIF transmitter signal routing as follows:
a.
Click the S/PDIF TX box (see Figure 43).
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d.
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11926-041
Figure 43. Configuring the S/PDIF Transmitter Routing Matrix Register
b.
Figure 39. Activating the SPDIF_TX_EN Register
Click the ROUTING_MATRIX tab (see Figure 40) to
allow configuring the routing matrix.
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11926-042
3.
From the drop-down menu that appears, select From
DSP to choose the signal coming from the DSP core
(see Figure 44).
Figure 40. Selecting the ROUTING_MATRIX Tab
Configure the S/PDIF receiver signal routing by clicking
ASRC 0 (see Figure 41) and then configuring ASRC 0
using the drop-down menus until it matches Figure 42.
(This routes the S/PDIF receiver signal through an
asynchronous sample rate converter (ASRC) before it is
accessed in the DSP core. Routing the signal in this way is
necessary because the S/PDIF source is not synchronous to
the ADAU1452.)
Figure 44. Routing the DSP Core Outputs to the S/PDIF Transmitter
Close the pop-up window.
d.
Confirm that the setting has taken effect by verifying that
the color of the S/PDIF TX box has changed from gray
to black (see Figure 45). (If the color of the box has
changed to black, the DSP core has been routed to the
S/PDIF transmitter and the S/PDIF receiver signal has
been routed to ASRC 0; therefore, the output of ASRC 0
can be used in the DSP program.)
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11926-043
c.
Figure 41. ASRC 0 Control Button
Figure 45. Confirming that the DSP Core Outputs are Routed
to the S/PDIF Transmitter
6.
Click the Schematic tab at the top of the window to return
to the schematic design view.
7.
Add an S/PDIF input to the project as follows.
a.
From the IO > ASRC > Input folder, click Asrc Input
(see Figure 46) and drag it into the project space to the
right of the toolbox (see Figure 47).
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Figure 42. Configuring the ASRC 0 Routing Matrix Registers
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4.
Figure 46. ASRC Input Block Selection
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EVAL-ADAU1452MINIZ User Guide
8.
Add two S/PDIF outputs to the project as follows:
From the IO > SPDIF > Output folder, click Spdif
Output (see Figure 48) and drag it into the project
space to the right of the toolbox.
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a.
Figure 48. S/PDIF Output Block Selection
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b.
Figure 47. ASRC Input Block
9.
Because the left and right signals of the S/PDIF
receiver are passing through ASRC 0, the input to the
DSP program is the Asrc Input block in SigmaStudio.
This naming convention is such that all blocks in
SigmaStudio are named from the perspective of the
DSP core. Therefore, the Asrc Input block in SigmaStudio
represents the input to the DSP from the ASRC outputs.
The inputs to the ASRCs themselves are defined in the
register map (see Figure 42).
Repeat the previous step to add another Spdif
Output block.
Connect the signals from the Asrc Input block to the Spdif
Output blocks so that the resulting signal flow resembles
Figure 49.
10. Click the Link-Compile-Download button (see Figure 29) or
press F7. (The signal flow is then compiled and downloaded
to the hardware.)
11. Confirm proper operation by checking that any signal
input to the S/PDIF optical receiver is copied and output
on the S/PDIF optical transmitter.
By default, Channel 0 and Channel 1 are active when
their corresponding checkboxes are selected. Because
the ASRC 0 outputs correspond to Channel 0 and
Channel 1, this default configuration can be used (see
Figure 47). For reference, a mapping of the ASRC
outputs to the corresponding channels on the Asrc
Input block in the DSP schematic is provided in Table 1.
ASRC Output
ASRC 0
ASRC 1
ASRC 2
ASRC 3
ASRC 4
ASRC 5
ASRC 6
ASRC 7
Corresponding Channels on ASRC Input
Block in SigmaStudio
Channel 0 and Channel 1
Channel 2 and Channel 3
Channel 4 and Channel 5
Channel 6 and Channel 7
Channel 8 and Channel 9
Channel 10 and Channel 11
Channel 12 and Channel 13
Channel 14 and Channel 15
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Table 1. ASRC Output to SigmaStudio Input Channel Mapping
Figure 49. Signal Flow Including S/PDIF Input (via ASRC) and S/PDIF Output
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Add a Filter
3.
To add a filter,
1.
Add a Medium-Size Eq block to the project space as follows:
From the Filters > Second Order > Double Precision
folder, click Medium-Size Eq (see Figure 50) and drag
it into the project space to the right of the toolbox.
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11926-052
a.
Connect the filter in series between the Asrc Input block
and the Spdif Output blocks so that the filter can be
applied to the signals passing through the DSP. The
completed signal flow should resemble Figure 51.
Figure 50. Medium-Size Eq Block Selection
By default, the block has one input and one output. In other
words, it is a single channel. To add another channel, rightclick in the empty white space of the Medium-Size Eq block,
and then from the drop-down menu that appears, select
Grow Algorithm > 1. Multi-Channel – Double Precision:
Grow Channels > 1 (see Figure 52).
4.
Click the Link-Compile-Download button (see Figure 29)
or press F7 to compile the signal flow and download it to the
hardware. The audio signal passes from the S/PDIF receiver
through the ASRCs into the DSP and the EQ filter, and
then out on the S/PDIF transmitter. Change the settings of
the EQ filter by clicking and dragging the control slider in
SigmaStudio when the project is running.
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2.
Figure 51. Completed Signal Flow
Figure 52. Adding a Channel to the Filter
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EVAL-ADAU1452MINIZ User Guide
USING THE EVALUATION BOARD
POWER SUPPLY
The stereo input jacks accept standard stereo TRS 1/8" mini plugs
(tip = left, ring = right, sleeve = ground) with two channels of
audio (see Figure 54).
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Power is supplied to the board using a dc power supply with a
female positive center plug. The plug should have a 2.1 mm
inner diameter, a 5.5 mm outer diameter, and a 9.5 mm length.
The output should range between 5 V and 7 V and should be
able to source at least 1.5 A of current. Connect the power
supply to Connector J4. The unregulated supply is used to
power the operational amplifiers used in the active audio filters
for the analog audio inputs and outputs. An on-board linear
regulator (U5) generates the 3.3 V dc supply required for the
ADAU1452 and AD1938, as well as other supporting ICs.
When the power supply is connected properly, LED D7 (A_3V3)
illuminates.
active low-pass filters and then are converted to differential pairs
before reaching the AD1938 ADCs. The filters are designed for a
system sample rate of 44.1 kHz or 48 kHz.
Figure 54. Standard Stereo TRS 1/8" Mini Audio Plug and Cable
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The signals pass through the AD1938 ADCs and then are sent
to the ADAU1452 serial input ports in I2S format. The mapping
of input signals to input channels in SigmaDSP and SigmaStudio is
shown in Table 2.
Table 2. Mapping of Stereo Analog Input Signals to
SigmaStudio Channels
Figure 53. DC Power Supply Plug and Cable
INPUTS AND OUTPUTS
Input
Jack
J11
Plug
Contact
Left (tip)
AD1938 Codec
J11
Right (ring)
Two of the four serial input ports are connected to the AD1938
ADCs, and all four of the serial output ports are connected to
the AD1938 DACs. This provides a total of four channels of
analog audio input and eight channels of analog audio output.
J8
Left (tip)
J8
Right (ring)
The EVAL-ADAU1452MINIZ provides access to the serial
ports, S/PDIF interfaces, multipurpose pins, and auxiliary
ADCs of the ADAU1452.
The AD1938 is hardwired in standalone mode, and its serial
ports are configured as slaves. Therefore, the corresponding
serial ports on the ADAU1452 must be set as clock masters. By
default, all serial ports on the ADAU1452 are set as clock
masters when a new project is created in SigmaStudio.
The AD1938 is configured to run at a sample rate of 44.1 kHz
or 48 kHz. It is not possible to change this setting. Even though
the ADAU1452 is very flexible and can run at any sample rate
up to 192 kHz, the analog audio inputs and outputs on the
EVAL-ADAU1452MINIZ may be distorted or silent if a sample
rate other than 44.1 kHz or 48 kHz is used for the ADAU1452
serial ports.
Stereo Line Inputs
Two stereo input jacks allow for four single-ended line-level analog
input signals. The AD1938 ADC inputs are configured such that
the full scale is 2.8 V peak-to-peak, which is approximately 1 V rms
for a sine wave. Any signal that exceeds 2.8 V peak-to-peak at the
audio jack is clipped, creating distortion. The signals are fed to
AD1938
ADC Pins
ADC1LN,
ADC1LP
ADC1RN,
ADC1RP
ADC2LN,
ADC2LP
ADC2RN,
ADC2RP
ADAU1452
Serial
Input Pin
SDATA_IN0
Input
Channel in
SigmaStudio
0
SDATA_IN0
1
SDATA_IN1
16
SDATA_IN1
17
Stereo Line Outputs
Four stereo output jacks allow eight line-level analog output signals.
The AD1938 DAC outputs are configured such that a full-scale
signal is 2.8 V peak-to-peak at the jack, which is approximately
1 V rms for a sine wave. The signals output from the DACs are
fed to active low-pass filters and then ac-coupled before reaching
the output jacks. The filters are designed for a system sample
rate of 44.1 kHz or 48 kHz.
The output filters are designed to drive high impedance loads,
like loads from active speakers. Some low impedance loads, like
loads from headphones, can also be driven by these outputs, but
very low impedance loads, like loads from passive speakers,
cannot be driven by these outputs.
The stereo output jacks accept standard stereo TRS 1/8" mini plugs
(tip = left, ring = right, sleeve = ground) with two channels of
audio (see Figure 54).
Rev. 0 | Page 14 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
The signals pass from the ADAU1452 serial outputs in I2S
format to the AD1938 DACs, where they are then converted to
analog signals and sent through the output filters to the output
jacks. The mapping among the SigmaStudio output channels,
output serial ports, and output jacks is shown in Table 3.
Table 3. Mapping of SigmaStudio Channels to Output Jacks
Output
Jack
J12
J12
J10
J10
J9
J9
J7
J7
Plug
Contact
Left (tip)
Right (ring)
Left (tip)
Right (ring)
Left (tip)
Right (ring)
Left (tip)
Right (ring)
AD1938
DAC Pin
OL1
OR1
OL2
OR2
OL3
OR3
OL4
OR4
ADAU1452
Serial
Output Pin
SDATA_OUT0
SDATA_OUT0
SDATA_OUT1
SDATA_OUT1
SDATA_OUT2
SDATA_OUT2
SDATA_OUT3
SDATA_OUT3
Output
Channel in
SigmaStudio
0
1
16
17
32
33
40
41
Serial Audio Interface
Two of the four ADAU1452 serial input ports are connected to
the AD1938. Because the AD1938 is in standalone mode, it
always drives the SDATA_IN0 and SDATA_IN1 pins of the
ADAU1452. As a result, external data signals cannot be input to
SDATA_IN0 or SDATA_IN1.
However, the remaining two serial input ports (SDATA_IN2
and SDATA_IN3, along with their corresponding clock pins—
BCLK_IN2, LRCLK_IN2, BCLK_IN3, and LRCLK_IN3), are
accessible directly via the J2 and J3 headers (see Figure 56).
S/PDIF Optical Transmitter and Receiver
11926-058
The ADAU1452 S/PDIF interfaces are connected directly to
optical transmitter and receiver connectors, which convert the
electrical signals to and from optical signals, respectively. The
connectors accept standard TOSLINK connectors and optical
fiber cables (see Figure 55).
Figure 56. Serial Input Port 2 and Serial Input Port 3 Signal Access Headers
11926-057
Using jumper wires with a square socket that is 0.025"
(0.64 mm) wide, signals can be connected to these headers from
external sources. The J2 and J3 headers each comprise two
columns and three rows of pins. There is one signal column and
one ground column. Always connect at least one ground wire
between the header and the external signal source to maintain
proper signal integrity.
Figure 55. TOSLINK Connector and Optical Fiber Cable
for S/PDIF Input and Output
The ADAU1452 S/PDIF transmitter typically transmits signals from
the DSP core, meaning that the sample rate of the audio coming
out of the S/PDIF transmitter on the EVAL-ADAU1452MINIZ
is typically 44.1 kHz or 48 kHz. Optionally, the S/PDIF transmitter
can be configured in a pass through mode, where it simply
transmits a copy of the signal directly from the receiver.
Both the S/PDIF receiver and transmitter carry two channels of
uncompressed audio.
11926-059
The ADAU1452 S/PDIF receiver accepts signals with sample
rates between 18 kHz and 96 kHz. Because the incoming signal
is asynchronous to the system sample rate, an ASRC should be
used to convert the sample rate of the incoming signal.
Optionally, the SigmaDSP core can be configured to start
processing audio samples based on the sample rate of the
incoming S/PDIF receiver signal, meaning that no ASRC is
required. However, using an ASRC is strongly recommended
for performance and reliability reasons.
Figure 57. Connecting External I2S Signals to Serial Input Port 2
The signals passing between the ADAU1452 serial output ports
and the AD1938 DAC are also accessible via the test points that
are situated between the two ICs. Signals can be tapped from
these test points and connected to external digital audio sinks, if
desired (see Figure 58). When connecting these signals to
Rev. 0 | Page 15 of 40
UG-636
EVAL-ADAU1452MINIZ User Guide
To configure the operation of the multipurpose pins, navigate to
the MULTIPURPOSE tab in the Hardware Configuration tab
in SigmaStudio (see Figure 59).
11926-061
external devices, at least one ground signal should be connected
as well to maintain signal integrity.
Figure 59. Multipurpose Pin Configuration in SigmaStudio
11926-060
AUXILIARY ADC PINS
Figure 58. Monitoring Digital Audio Signals from the Test Points
MULTIPURPOSE (MP) PINS
The multipurpose pins on the ADAU1452 can be used for generalpurpose input or output when configured as such using the
ADAU1452 control registers. Of the 14 multipurpose pins, two are
connected to LED drivers, and six are available on test points or
headers. The remaining six pins are used for other functionality
and are, therefore, unavailable for use as multipurpose pins.
The ADAU1452 has an auxiliary ADC with six channels, each
of which has an independent input pin. These six input pins,
AUXADC0 to AUXADC5, are accessible via bare copper pads
located next to the ADAU1452. External signals between 0 V
and 3.3 V can be connected to these pads and then used in the
SigmaStudio signal flow.
The signal from MP6 is fed to an inverter that drives LED D5. The
signal from MP7 is fed to an inverter that drives LED D6.
The six multipurpose pins available for use as general-purpose
inputs or outputs, along with their access points on the evaluation
board, are described in Table 4.
MP Pin
MP5
MP8
MP9
MP11
MP12
MP13
Access Point
TP38
TP34
TP32
TP29
Header J3, Pin 4
Header J2, Pin 4
11926-062
Table 4. Multipurpose Pins and Hardware Access Points
Figure 60. Copper Pads for Inputting Signals to the Auxiliary ADC
COMMUNICATIONS HEADER
The communications header is a 10-pin header designed to work
with the EVAL-ADUSB2EBZ, or USBi. The SPI signals are wired
from the communications header to the corresponding SPI slave
port pins on the ADAU1452. The I2C pins are not used in this
design. A reset line is also included, which allows the user to
reset the devices on the board via a command in SigmaStudio.
When the USBi is connected and powered and the computer has
successfully recognized the USBi on its USB 2.0 port, LED D1
illuminates.
Rev. 0 | Page 16 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
SELF-BOOT
11926-064
A 1-Mbit, 20 MHz SPI serial EEPROM memory is included on
the EVAL-ADAU1452MINIZ for the purpose of self-booting the
ADAU1452. Slide Switch S2 (see Figure 61) sets the state of the
SELFBOOT pin of the ADAU1452, which determines whether a
self-boot operation is executed when the ADAU1452 powers up
or on a rising edge of the RESET pin.
Figure 62. E2Prom IC Selection in SigmaStudio
Connect the green input pin of the E2Prom IC to one of
the available blue output pins of the USB Interface block.
3.
Set the communication mode to SPI 0x1 ADR0 (see Figure 63).
(There is no physical connection between the USBi connector and the EEPROM on the EVAL-ADAU1452MINIZ.
SigmaStudio writes a small program to the ADAU1452, which
then writes the self-boot data from its master SPI port to
the EEPROM.)
11926-063
11926-065
2.
Figure 63. E2Prom Setup in Hardware Configuration Tab
Figure 61. Self-Boot EEPROM and Slide Switch
To use the self-boot functionality,
Add an E2Prom block to the project space of the
Hardware Configuration tab. From the Processors (ICs /
DSPs) folder, click E2Prom (see Figure 62) and drag it into
the project space to the right of the toolbox.
Before downloading the self-boot data to the EEPROM,
click the Link-Compile-Download button (see Figure 29)
or press F7 to compile the SigmaStudio project file.
5.
When writing to the EEPROM, set the self-boot switch, S2,
to the DISABLED position.
6.
Right-click on the empty white space in the ADAU1452 IC
block in the Hardware Configuration tab of SigmaStudio.
From the menu that appears, choose Self-boot Memory >
Write Latest Compilation through DSP (see Figure 64).
11926-066
1.
4.
Figure 64. Writing to the EEPROM Through the ADAU1452 Master SPI Port
Rev. 0 | Page 17 of 40
UG-636
An EEPROM Properties dialog box appears. Type the
appropriate information into the boxes as shown in Figure 65,
and then click OK.
9.
SigmaStudio begins the EEPROM write operation. This
may take several minutes to complete (see Figure 66).
When the status window disappears, the operation is
complete.
11926-069
7.
EVAL-ADAU1452MINIZ User Guide
Figure 66. External Memory Write Operation Status Window
11926-067
To execute a self-boot operation,
1.
2.
Figure 65. EEPROM Properties Window and Required Settings
A warning window appears to remind you that executing
this action erases and overwrites any data currently stored
on the EEPROM (see Figure 67). Click OK to proceed.
A self-boot operation is then performed, and the ADAU1452
starts running a program.
11926-068
8.
Set the self-boot switch, S2, to the ENABLED position.
Press and release the RESET push-button, S1.
Figure 67. External Memory Erase and Overwrite Warning Window
Rev. 0 | Page 18 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
RESET
11926-071
To manually reset the ADAU1452 and AD1938, press and
release the RESET push-button, S1 (see Figure 68). A reset
generator circuit toggles the reset pins on the ADAU1452 and
AD1938 to perform a full hardware reset of those devices.
Figure 69. Toggling the Reset Signal in SigmaStudio
STATUS LEDS
11926-070
Six status LEDs provide information about the state of the
EVAL-ADAU1452MINIZ (see Figure 70). More information
pertaining to the status LEDs is available in Table 6.
Figure 68. Manual Reset Push-Button and Reset Generator IC
11926-072
To generate a reset in software, right-click in the empty white border of the USB Interface block in the Hardware Configuration
tab, and then choose Device Enable/Disable from the menu
that appears (see Figure 69). Doing this once sets the system
reset signal to logic low. Both the /RESET and /USB_RESET
status LEDs (D3 and D4) should be illuminated. To bring the
devices out of a reset, click Device Enable/Disable a second
time. Doing so brings the system reset signal back to logic high,
and the D3 and D4 status LEDs turn off.
Figure 70. Status LEDs
Rev. 0 | Page 19 of 40
UG-636
EVAL-ADAU1452MINIZ User Guide
HARDWARE DESCRIPTION
INTEGRATED CIRCUITS (IC)
Table 5. IC Descriptions
Reference
U1
Functional Name
ADM811TARTZ reset supervisor
U2
ADAU1452 SigmaDSP audio processor
U3
U4
Microchip 25AA1024 serial EEPROM
AD1938 audio codec
U5
ADP3338AKCZ-3.3 LDO voltage regulator
U6, U7,
U8, U9,
U10, U12,
U13, U14
U11
ADA4841 dual low power low noise and
distortion rail-to-rail output amplifier
74ACT04SC hexadecimal inverter
Description
Generates a master reset signal for the ADAU1452 and AD1938 if the RESET
push-button, S1, is pressed or SigmaStudio sends a reset command via the USBi.
Acts as an audio hub for all audio inputs and outputs in the system and performs
digital signal processing on those signals.
Stores data, allowing the ADAU1452 to perform a self-boot operation.
Converts analog audio inputs to digital data for the ADAU1452 processor and takes
digital data back from the ADAU1452 to convert to analog audio outputs.
Accepts the unregulated dc supply voltage between 5 V and 7 V that is provided on
Connector J4 and regulates it down to 3.3 V.
Implements the analog audio filtering required for the stereo line inputs and outputs.
Buffers logic signals and drives status LEDs.
STATUS LEDs
Table 6. LED Descriptions
Reference
D1
Functional Name
USB connected
D2
Self-boot status
LED
D3
Master reset status
LED
D4
USBi reset status
LED
D5
MP6 generalpurpose LED
MP7 generalpurpose LED
3.3 V supply status
LED
D6
D7
Description
Illuminates when the USBi is recognized by Windows after the USBi is connected to Control Port J1
and the USB 2.0 port of the computer.
Illuminates when the self-boot slide switch, S2, is set to the ENABLED position, signifying that a self-boot
operation is to be executed on the rising edge of the ADAU1452 RESET signal or when ADAU1452 is
powered up; D2 does not illuminate when the self-boot slide switch, S2, is set to the DISABLED position,
signifying that no self-boot operation is to occur.
Illuminates when the master reset signal being generated by the ADM811TARTZ reset supervisor IC is
logic low, putting the ADAU1452 and AD1938 into hardware reset; D3 does not illuminate when the
master reset signal is logic high and the ADAU1452 and AD1938 are out of reset.
Illuminates when the USBi has been connected to the USB 2.0 port of the computer with a USB cable,
is recognized by Windows, and is connected via the ribbon cable to the SPI control port header, J1;
otherwise, D4 does not illuminate.
Illuminates when the status of the ADAU1452 MP6 pin is set to logic high by the ADAU1452.
Illuminates when the status of the ADAU1452 MP7 pin is set to logic high by the ADAU1452.
Illuminates when the output of the ADP3338AKCZ-3.3 LDO voltage regulator has reached a level
sufficient to exceed the VIH logic high input level of the 74ACT04SC inverter. (When this LED is
illuminated, it does not guarantee that the LDO output is 3.3 V. It only shows that the LDO output is
about 2 V or greater. To perform more detailed measurements of the LDO output level, check the
voltage on the A_3V3 test point, TP1.)
SWITCH AND PUSH-BUTTON
Table 7. Switch and Push-Button Descriptions
Reference
S1
Functional Name
Reset push-button
S2
Self-boot slide switch
Description
When this switch is pressed and then released, a reset signal is generated, which
causes the ADM811TARTZ reset supervisor to generate a master reset signal for
the ADAU1452 and AD1938.
Sets the SELFBOOT pin of the ADAU1452 to either logic high or logic low to
determine whether a self-boot operation is to be performed.
Rev. 0 | Page 20 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
EVALUATION BOARD SCHEMATICS AND LAYOUT ARTWORK
SigmaDSP AUDIO PROCESSOR
PLL LOOP FILTER
DVDD REGULATOR CIRCUIT
C7
5.6nF
POWER SUPPLY
BULK DECOUPLING
C
2
B1
C5
150pF
145X_AVDD
145X_DVDD
A_3V3
145X_PVDD
145X_IOVDD
D_3V3
A_3V3
R3
E
4K32
3
R23
0R00
Q1
STD2805
R22
1k00
C81
C63
10uF
10uF
10uF
C6
C8
0.10uF 0.10uF
C62
10uF
TP12TP14TP16
TP11TP13 TP15
C9
0.10uF
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C4
0.10uF
SPDIFOUT
SPDIFIN
C82
TP52
TP41
6
4
2
6
4
2
5
3
1
5
3
1
J3
TP27
TP28
SDATA_IN1
TP30
TP31
SDATA_IN0
ADAU1452 IS
ADC CLOCK
MASTER
GND
C18
0.10uF
J2
C17
10nF
TP42 TP55
TP54 TP44
MP6
MP7
C20
0.10uF
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
C13
0.10uF
145X_DVDD
145X_IOVDD
C16
10nF
C12
10nF
C21
0.10uF
145X_DVDD
145X_IOVDD
GND
16
15
14
13
12
11
10
9
ADAU1452 IS
DAC CLOCK
MASTER
R5
33R0
Figure 71. SigmaDSP Audio Processor
Rev. 0 | Page 21 of 40
11926-073
1
2
3
4
5
6
7
8
C15
0.10uF
EP
SELFBOOT
ADAU1452
DGND
DVDD
SDATA_IN3
LRCLK_IN3/MP13
BCLK_IN3
SDATA_IN2
LRCLK_IN2/MP12
BCLK_IN2
THD_P
THD_M
SDATA_IN1
LRCLK_IN1/MP11
BCLK_IN1
SDATA_IN0
LRCLK_IN0/MP10
BCLK_IN0
IOVDD
DGND
LRCLK_OUT0
BCLK_OUT0
SDATA_OUT0
SDATA_OUT1
SDATA_OUT2
SDATA_OUT3
BCLK_IN0
LRCLK_IN0
TO USBi
CONTROL
INTERFACE
MISO
SCLK
MOSI
SS
SS_M
MOSI_M
SCLK_M
MISO_M
DGND
DVDD
XTALIN/MCLK
XTALOUT
CLKOUT
RESET
DGND
U2
SS_M/MP0
ADAU145X_ROTATED
MOSI_M/MP1
SCL_M/SCLK_M/MP2
SDA_M/MISO_M/MP3
MISO/SDA
SCLK/SCL
MOSI/ADDR1
SS/ADDR0
SELFBOOT
DVDD
DGND
PIN 1
73
1452_CLKOUT
RESET
GND
100R
R40 33R2
TO
SELFBOOT
EEPROM
22pF
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
DGND
IOVDD
LRCLK_OUT0/MP4
BCLK_OUT0
SDATA_OUT0
LRCLK_OUT1/MP5
BCLK_OUT1
SDATA_OUT1
MP6
MP7
LRCLK_OUT2/MP8
BCLK_OUT2
SDATA_OUT2
LRCLK_OUT3/MP9
BCLK_OUT3
SDATA_OUT3
DVDD
DGND
R44
C11
10nF
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
C74
C10
0.10uF
Y1
12.288MHz
145X_DVDD
22pF
IOVDD
DGND
PLLFILT
PVDD
PGND
AUXADC5
AUXADC4
AUXADC3
AUXADC2
AUXADC1
AUXADC0
AVDD
AGND
SPDIFOUT
SPDIFIN
VDRIVE
IOVDD
DGND
C68
UG-636
EVAL-ADAU1452MINIZ User Guide
SELF–BOOT MEMORY
D_3V3
D_3V3
SELF–BOOT SWITCH
D_3V3
D_3V3
C22
0.10uF
R4
R6
10k0
10k0
TP34
1
SS_M
MISO_M
2
TP33
3
4
R7
S2
10k0
U3
2
SELFBOOT
CS
VCC
SO
HOLD
WP
SCK
VSS
SI
8
5
7
TP63
1
3
4
6
DPDT_SLIDE_JS202011CQN
6
SCLK_M
5
MOSI_M
TP62
11926-074
25AA1024_1MBIT_SPI_EEPROM
SOIC8_N+W_CUSTOM
Figure 72. Self-Boot Circuit
S/PDIF OPTICAL CONNECTORS
D_3V3
C46
0.10uF
2
C47
0.10uF
3
DVDD
R19
10k0
TP5
3
INPUT
J5
NC
NC
4
4
5
5
NC
J6
NC
OUT
SPDIFIN
C49
PLT133/T8_SPDIF_TX_LOWPRO
PLR135/T8_SPDIF_RX_LOWPRO
DGND
GND
1
1
TP6
10nF
2
11926-075
SPDIFOUT
DVDD
Figure 73. S/PDIF Optical Interfaces
Rev. 0 | Page 22 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
STATUS LEDs
D_3V3
C89
0.10uF
D_3V3
U11-B
MP6
3
R64
4
D5
475R
74ACT04SC_HEXINVERTER
U11-F
MP7
13
D_3V3
R65
12
D6
475R
74ACT04SC_HEXINVERTER
U11-A
A_3V3
1
D_3V3
R66
2
D7
475R
74ACT04SC_HEXINVERTER
U11-D
SELFBOOT
9
D_3V3
R61
8
D2
475R
74ACT04SC_HEXINVERTER
U11-C
5
R62
6
475R
D3
RESET
74ACT04SC_HEXINVERTER
U11-E
R63
10
475R
74ACT04SC_HEXINVERTER
Figure 74. Status LEDs
Rev. 0 | Page 23 of 40
11926-076
11
D4
USB_RESET
UG-636
EVAL-ADAU1452MINIZ User Guide
AUDIO CODEC
D_3V3
A_3V3
C119
10uF
C26
0.10uF
C24
C25
0.10uF
10uF
C28
C23
0.10uF
C29
0.10uF
48
AVDD
AVDD
37
33
AVDD
5
DAC3L
DSDATA1
DSDATA2
DSDATA3
DSDATA4
DLRCLK
DBCLK
DAC3R
DAC4L
ASDATA2
ASDATA1
ALRCLK
ABCLK
DAC4R
LF
CDATA
COUT
CCLK
CLATCH
FILTR
CM
MCLKI/XI
MCLKO/XO
DAC1L
29
DAC1R
30
DAC2L
31
DAC2R
6
DAC3L
7
DAC3R
A_3V3
R10
8
DAC4L
9
DAC4R
562R
C30
C32
390pF
5.6nF
TP70
TP66
47
35
38
TP50
2
3
FILTR
1452_CLKOUT
AGND
AGND
28
+
36
12
DGND
PD/RST
AGND
10
RESET
DAC2R
AD1938
32
23
24
26
27
AD1938 CONFIGURED FOR
STANDALONE OPERATION
CLOCK SLAVE
ADC2RP
ADC2RN
AGND
LRCLK_IN0
BCLK_IN0
19
20
22
21
DAC2L
1
33R2
33R2
TP57
TP45
ADC2LP
ADC2LN
AGND
SDATA_OUT0
SDATA_OUT1
SDATA_OUT2
SDATA_OUT3
LRCLK_OUT0
BCLK_OUT0
SDATA_IN1 TP58
R9
SDATA_IN0
TP46 R8
45
46
TP40
TP53
16
TP43
15
TP56
14
TP39
11
TP51
18
17
DAC1R
4
ADC2RP
ADC2RN
ADC1RP
ADC1RN
34
43
44
ADC2LP
ADC2LN
DAC1L
DGND
41
42
ADC1RP
ADC1RN
ADC1LP
ADC1LN
25
39
40
ADC1LP
ADC1LN
AVDD
DVDD
U4
13
0.10uF
+
C111
47uF
C112
47uF
C115
0.10uF
11926-077
C114
0.10uF
Figure 75. AD1938 Audio Codec
POWER SUPPLY
DC IN
5V TO 6V
***7V DC MAX***
5V00_UNREG
A_3V3
2
3
1
U5 ADP3338-3.3V 2
OUT
4
OUT
IN
L1
1
3
GND
TP2
+
C52
C41
C40
100uF
1.0uF
1.0uF
+
C35
10uF
+
C39
10uF
TP19
Figure 76. Power Supply
Rev. 0 | Page 24 of 40
TP18
TP35
TP6 4
TP61
TP20
TP36
TP23
TP68
11926-078
J4
D_3V3
TP1
EVAL-ADAU1452MINIZ User Guide
UG-636
RESET GENERATOR AND CONTROL
D_3V3
USB_RESET
R1
1k00
S1
4
C3
0.10uF
1
VCC
MR
GNDRESET
3
SPST-NO
2
ADM811TARTZ
RESET
R2
11926-079
100k
Figure 77. Reset Generator Circuit
CONTROL PORT HEADER
J1
HEADER_10WAY_POL
1
3
5
7
9
2
USB_CLK
4
6
8
10
USB 5 VOLTS
USB_RESET
MOSI
R18
1k00
D1
USB CONNECTED
11926-080
MISO
SCLK
SS
SCL
SDA
Figure 78. SPI Communication Interface Header
Rev. 0 | Page 25 of 40
UG-636
EVAL-ADAU1452MINIZ User Guide
IN1R
C102
TP67
330pF
C101
ANALOG INPUT 1
R71
R72
4k99
4k99
10uF
SIGMADSP CHANNELS 0-1
6
ADA4841-2YRZ
C108
100pF
R78
100k
5
TP69
U13-B
+
7
O
R73
237R
C103
ADC1RN
10uF
C110
100pF
R79
4k99
R81
RING
J11
2
TIP
FILTR
R80
3
U13-A
+
100R
SLEEVE
IN1L
R49
8
C109
0.10uF
V+
V-
R56
8
4
1
C118
1.0nF
4k99
4k99
TP38
100k
ADA4841-2YRZ
C93
100pF
5
U10-B
+
O
7
R51
237R
C90
0.10uF
C84
ADC1LN
10uF
C91
100pF
R57
4k99
R59
2
ADA4841-2YRZ
FILTR
R58
3
100R
U10-A
+
O
4k99
1
ADA4841-2YRZ
R60
237R
C96
ADC1LP
TP49
10uF
C85
1.0nF
C97
1.0nF
C95
0.10uF
11926-081
ADA4841-2YRZ
C104
1.0nF
ADA4841-2YRZ
R50
6
4
ADC1RP
TP72
10uF
330pF
C94
10uF
V+
V-
237R
C117
C83
TP48
U10-C
R82
C116
0.10uF
5V00_UNREG
U13-C
O
4k99
Figure 79. Analog Input Channel 0 and Channel 1
Rev. 0 | Page 26 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
IN2R
C60
TP22
330pF
C66
ANALOG INPUT 2
R31
4k99
10uF
SIGMADSP CHANNELS 16-17
R32
4k99
6
ADA4841-2YRZ
C70
R38
5
TP24
U8-B
+
R33
7
O
ADC2RN
237R
100pF
100k
C67
10uF
C72
R39
100pF
4k99
R43
R42
4k99
RING
J8
2
TIP
R41
FILTR
3
-
100R
SLEEVE
TP26
10uF
1
O
ADC2RP
237R
U8-A
+
C76
C77
C61
1.0nF
ADA4841-2YRZ
1.0nF
C75
0.10uF
IN2L
C36
TP8
330pF
5V00_UNREG
C53
R11
R12
4k99
4k99
10uF
6
U6-C
U8-C
V+
V-
8
V+
V-
C71
0.10uF
4
8
4
ADA4841-2YRZ
C51
100pF
R20
100k
5
TP4
U6-B
+
O
R13
7
237R
ADC2LN
10uF
C48
R21
C45
0.10uF
100pF
4k99
R26
R25
ADA4841-2YRZ
C37
2
ADA4841-2YRZ
R24
FILTR
100R
3
U6-A
+
O
4k99
237R
1
C55
ADC2LP
TP9
10uF
C56
C38
ADA4841-2YRZ
1.0nF
1.0nF
C54
11926-082
0.10uF
Figure 80. Analog Input Channel 16 and Channel 17
C106
ANALOG OUTPUT 1
1.2nF
TP71
R74
DAC1R
604R
OUT1R
SIGMADSP CHANNELS 0-1
TP65
R75
5
16k9
6
C105
120pF
+
O
-
7
R76
49R9
U14-B
C107
10uF
ADA4841-2YRZ
RING
R77
100k
J12
TIP
C121
5V00_UNREG
1.2nF
TP73
R83
R84
604R
16k9
OUT1L
TP74
3
2
C120
120pF
+
O
1
-
R85
49R9
U14-A
C122
10uF
ADA4841-2YRZ
R86
100k
8
C113
0.10uF
V+
V-
U14-C
4
ADA4841-2YRZ
11926-083
DAC1L
SLEEVE
Figure 81. Analog Output Channel 0 and Channel 1
Rev. 0 | Page 27 of 40
UG-636
EVAL-ADAU1452MINIZ User Guide
C87
ANALOG OUTPUT 2
1.2nF
TP47
R52
DAC2R
604R
OUT2R
SIGMADSP CHANNELS 16-17
TP37
R53
5
16k9
+
6
7
O
-
49R9
U12-B
C86
R54
C88
10uF
ADA4841-2YRZ
120pF
R55
RING
100k
J10
TIP
C99
SLEEVE
5V00_UNREG
1.2nF
OUT2L
TP59
R67
DAC2L
604R
TP60
R68
3
+
2
16k9
1
O
-
49R9
U12-A
C98
R69
C100
10uF
ADA4841-2YRZ
120pF
8
R70
C92
100k
V+
V-
U12-C
4
ADA4841-2YRZ
11926-084
0.10uF
Figure 82. Analog Output Channel 16 and Channel 17
C65
ANALOG OUTPUT 3
1.2nF
TP25
R34
DAC3R
604R
OUT3R
SIGMADSP CHANNELS 32-33
TP21
R35
5
6
16k9
C64
120pF
+
O
-
7
R36
49R9
U9-B
C69
10uF
ADA4841-2YRZ
R37
RING
100k
J9
TIP
C79
5V00_UNREG
1.2nF
TP29
R45
604R
OUT3L
TP32
R46
3
2
16k9
C78
120pF
+
-
O
1
R47
49R9
U9-A
C80
10uF
ADA4841-2YRZ
R48
100k
8
C73
0.10uF
V+
V-
U9-C
4
ADA4841-2YRZ
11926-085
DAC3L
SLEEVE
Figure 83. Analog Output Channel 32 and Channel 33
Rev. 0 | Page 28 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
C43
ANALOG OUTPUT 4
1.2nF
OUT4R
TP7
R14
DAC4R
604R
SIGMADSP CHANNELS 40-41
TP3
R15
5
+
6
16k9
O
-
R16
7
49R9
U7-B
C44
10uF
ADA4841-2YRZ
C42
120pF
RING
R17
100k
J7
TIP
C58
SLEEVE
5V00_UNREG
1.2nF
TP10
604R
TP17
R28
3
2
16k9
+
-
O
R29
1
49R9
U7-A
C57
C59
10uF
ADA4841-2YRZ
120pF
R30
C50
100k
0.10uF
8
V+
V-
U7-C
4 ADA4841-2YRZ
11926-086
R27
Figure 84. Analog Output Channel 40 and Channel 41
D_3V3
C33
C1
C34
C2
C14
C19
C31
C27
0.10uF
0.10uF
0.10uF
0.10uF
0.10uF
0.10uF
0.10uF
0.10uF
11926-087
DAC4L
OUT4L
Figure 85. Plane Decoupling Capacitors
Rev. 0 | Page 29 of 40
EVAL-ADAU1452MINIZ User Guide
11926-088
UG-636
Figure 86. EVAL-ADAU1452MINIZ Layout, Top Assembly
Rev. 0 | Page 30 of 40
UG-636
11926-089
EVAL-ADAU1452MINIZ User Guide
Figure 87. EVAL-ADAU1452MINIZ Layout, Top Copper
Rev. 0 | Page 31 of 40
EVAL-ADAU1452MINIZ User Guide
11926-090
UG-636
Figure 88. EVAL-ADAU1452MINIZ Layout, Ground Plane
Rev. 0 | Page 32 of 40
UG-636
11926-091
EVAL-ADAU1452MINIZ User Guide
Figure 89. EVAL-ADAU1452MINIZ Layout, Power Plane
Rev. 0 | Page 33 of 40
EVAL-ADAU1452MINIZ User Guide
11926-092
UG-636
Figure 90. EVAL-ADAU1452MINIZ Layout, Bottom Copper
Rev. 0 | Page 34 of 40
UG-636
11926-093
EVAL-ADAU1452MINIZ User Guide
Figure 91. EVAL-ADAU1452MINIZ Layout, Bottom Assembly (Viewed from Above)
Rev. 0 | Page 35 of 40
EVAL-ADAU1452MINIZ User Guide
11926-094
UG-636
Figure 92. EVAL-ADAU1452MINIZ Layout, Bottom Assembly (Viewed from Below)
Rev. 0 | Page 36 of 40
EVAL-ADAU1452MINIZ User Guide
UG-636
4 LAYER CONSTRUCTION DETAIL
SILKSCREEN
SOLDERMASK
LAYER 1 TOP SIDE 1.5 OZ CU FINISHED
LAMINATE = 0.010 INCH THICK
LAYER 2 GROUND PLANE
1.0 OZ CU.
CORE PREPREG = 0.40 INCH THICK
LAYER 3 POWER PLANE
1.0 OZ CU.
LAMINATE = 0.010 INCH THICK
LAYER 4 BOTTOM SIDE 1.5 OZ CU FINISHED
SOLDERMASK
SILKSCREEN
Figure 93. Cross Section of PCB Stack Up
Rev. 0 | Page 37 of 40
11926-095
0.05 TO 0.07 INCHES
UG-636
EVAL-ADAU1452MINIZ User Guide
BILL OF MATERIALS
Table 8. EVAL-ADAU1452MINIZ Bill of Materials
Qty.
42
1
8
2
8
13
8
5
1
4
5
26
2
8
1
8
3
2
8
1
4
3
1
6
2
8
1
Designator
C1, C2, C3, C4, C6, C8, C9,
C10, C13, C14, C15, C18,
C19, C20, C21, C22, C23
C25, C26, C27, C28, C29,
C31, C33, C34, C45, C46,
C47, C50, C54, C71, C73,
C75, C89, C90, C92, C95,
C109, C113, C114, C115,
116
R23
C38, C56, C61, C77, C85,
C97, C104, C118
C40, C41
C43, C58, C65, C79, C87,
C99, C106, C121
R2, R17, R20, R30, R37,
R38, R48, R55, R56, R70,
R77, R78, R86
C48, C51, C70, C72, C91,
C93, C108, C110
R24, R41, R44, R58, R80
C52
R4, R6, R7, R19
C11, C12, C16, C17, C49
C24, C37, C44, C53, C55,
C59, C62, C63, C66, C67,
C69, C76, C80, C81, C82,
C84, C88, C94, C96, C100,
C101, C103, C107, C117,
C119, C122
C35, C39
C42, C57, C64, C78, C86,
C98, C105, C120
C5
R15, R28, R35, R46, R53,
R68, R75, R84
R1, R18, R22
C68, C74
R13, R26, R33, R43, R51,
R60, R73, R82
U3
C36, C60, C83, C102
R8, R9, R40
C30
R61, R62, R63, R64, R65,
R66
C111, C112
R16, R29, R36, R47, R54,
R69, R76, R85
R3
Description
Multilayer ceramic capacitor, 16 V, X7R, 0402
Part Number
GRM155R71C104KA88D
Manufacturer
Murata ENA
Chip resistor, 5%, 125 mW, thick film, 0805
Multilayer ceramic capacitor, 50 V, NP0, 0402
ERJ-6GEY0R00V
GRM1555C1H102JA01D
Panasonic EC
Murata ENA
Multilayer ceramic capacitor, 16 V, X7R, 0603
Multilayer ceramic capacitor, 50 V, NP0, 0402
GRM188R71C105KA12D
C0402C122J5GACTU
Murata ENA
Kemet
Chip resistor, 1%, 100 mW, thick film, 0402
ERJ-2RKF1003X
Panasonic ECG
Multilayer ceramic capacitor, 50 V, NP0, 0402
GRM1555C1H101JZ01D
Murata ENA
Chip resistor, 1%, 63 mW, thick film, 0402
Aluminum electrolytic capacitor, FC, 105°, SMD_E
Chip resistor, 1%, 63 mW, thick film, 0402
Multilayer ceramic capacitor, 25 V, X7R, 0402
Multilayer ceramic capacitor, 10 V, X7R, 0805
RC0402FR-07100RL
EEE-FC1C101P
RC0402FR-0710KL
GRM155R71E103JA01J
GRM21BR71A106KE51L
Yageo
Panasonic EC
Yageo
Murata
Murata ENA
Aluminum electrolytic capacitor, FC, 105°, SMD_B
Multilayer ceramic capacitor, 50 V, NP0, 0402
EEE-FC1C100R
GRM1555C1H121JA01D
Panasonic EC
Murata ENA
Multilayer ceramic capacitor, 50 V, NP0, 0402
Chip resistor, 1%, 63 mW, thick film, 0402
GRM1555C1H151JA01D
RMCF0402FT16K9
Murata ENA
Stackpole
Chip resistor, 1%, 63 mW, thick film, 0402
Multilayer ceramic capacitor, 50 V, NP0, 0402
Chip resistor, 1%, 63 mW, thick film, 0402
RC0402FR-071KL
GRM1555C1H220JZ01D
RMCF0402FT237R
Yageo
Murata ENC
Stackpole
IC EEPROM, 1 Mbit, 20 MHz, 8-lead SOIC
25AA1024-I/SM
Multilayer ceramic capacitor, 50 V, NP0, 0402
Chip resistor, 1%, 63 mW, thick film, 0402
Multilayer ceramic capacitor 50V NP0 (0402)
Chip resistor 1% 63mW thick film 0402
GRM1555C1H331JA01D
RMCF0402FT33R2
GRM1555C1H391JA01D
RMCF0402FT475R
Microchip
Technology
Murata ENA
Stackpole
Murata ENA
Stackpole
Aluminum electrolytic capacitor, FC, 105°, SMD_D
Chip resistor, 1%, 63 mW, thick film, 0402
EEE-FC1C470P
RC0402FR-0749R9L
Panasonic EC
Yageo
Chip resistor, 1%, 100 mW, thick film, 0402
ERJ-2RKF4321X
Panasonic ECG
Rev. 0 | Page 38 of 40
EVAL-ADAU1452MINIZ User Guide
Qty.
16
2
1
8
1
1
1
8
Designator
R11, R12, R21, R25, R31,
R32, R39, R42, R49, R50,
R57, R59, R71, R72, R79,
R81
C7, C32
R10
R14, R27, R34, R45, R52,
R67, R74, R83
U11
UG-636
Description
Chip resistor, 1%, 63 mW, thick film, 0402
Part Number
RMCF0402FT4K99
Manufacturer
Stackpole
Multilayer ceramic capacitor, 25 V, NP0, 0402
Chip resistor, 1%, 63 mW, thick film, 0402
Chip resistor, 1%, 63 mW, thick film, 0402
GRM155R71E562KA01D
RMCF0402FT562R
CRCW0402604RFKED
Murata
Stackpole
Vishay/Dale
IC inverter hexadecimal, 14-lead SOIC
74ACT04SC
ABM3B-12.288MHZ-10-1-U-T
AD1938YSTZ
ADA4841-2YRZ
Fairchild
Semiconductor
Abracon Corp.
Analog Devices
Analog Devices
ADAU1452
ADM811TARTZ-REEL7
Analog Devices
Analog Devices
ADP3338AKCZ-3.3-R7
Analog Devices
JS202011CQN
HZ0805E601R-10
N2510-6002RB
PBC06DAAN, or cut
PBC36DAAN
LNJ312G8LRA
SJ-3523-SMT
741X163330JP
PLR135/T8
C&K Components
Steward
3M
3M
1
1
Y1
U4
U6, U7, U8, U9, U10, U12,
U13, U14
U2
U1
1
U5
1
1
1
2
S2
L1
J1
J2, J3
Crystal, 12.288 MHz, SMT, 18 pF
Four ADC, Eight DAC with PLL 192 kHz, 24-bit codec
Dual low power low noise and distortion rail-to-rail
output amplifier
300 MHz SigmaDSP
Microprocessor voltage supervisor logic low reset
output
High accuracy, low dropout 3.3 V dc voltage
regulator
DPDT slide switch vertical
Chip ferrite bead, 600 Ω at 100 MHz
10-way shroud polarized header
6-way unshrouded header
7
6
1
1
D1, D2, D3, D4, D5, D6, D7
J7, J8, J9, J10, J11, J12
R5
J6
Green 3 millicandela, 565 nm, 0603
Stereo mini jack SMT
Resistor network isolated, eight resistors
16 Mbps optical receiver
Rev. 0 | Page 39 of 40
Panasonic
CUI Inc.
CTS Corp.
Everlight
UG-636
EVAL-ADAU1452MINIZ User Guide
NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set
forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have
read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”),
with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary,
non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and
exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer
shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any
entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation
Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any
portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board
to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or
alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply
with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the
Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH
RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS
LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED
TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00).
EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to
exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action
regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The
United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG11926-0-1/14(0)
Rev. 0 | Page 40 of 40