Evaluation Board User Guide
UG-087
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD1940 SigmaDSP Using the EVAL-AD1940MINIBZ
PACKAGE CONTENTS
EVALUATION BOARD OVERVIEW
AD1940 mini evaluation board
EVAL-ADUSB2EBZ (USBi) communications adapter
USB cable with mini-B plug
Evaluation board/software quick start guide
This document explains the design and setup of the AD1940
SigmaDSP® miniature evaluation board.
This evaluation board provides a simple analog input and
output setup for the AD1940. The SigmaDSP is controlled by
the Analog Devices, Inc., SigmaStudio™ software, which
interfaces to the board via a USB connection. This evaluation
board may be powered either over the USB or by a single 3.8 V
to 6 V supply, which is regulated to the voltages required on the
board. The PC board is a 3” × 3” 4-layer design, with a single
ground plane and a single power plane on the inner layers. The
AD1938 codec handles all signal conversion between the analog
and digital domains.
OTHER SUPPORTING DOCUMENTATION
AD1940/AD1941 data sheet
AD1938 data sheet
AN-1006 Application Note, Using the EVAL-ADUSB2EBZ
Use the AD1940 evaluation board for AD1941 evaluation also.
There is no dedicated AD1941 evaluation board.
Figure 1. Evaluation Board Top Side
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
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EVALUATION BOARD PHOTOGRAPHS
Figure 2. Evaluation Board Bottom Side
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Evaluation Board User Guide
TABLE OF CONTENTS
Package Contents .............................................................................. 1 Setting Up Communications in SigmaStudio ...........................5 Other Supporting Documentation ................................................. 1 Creating a Basic Signal Flow ........................................................6 Evaluation Board Overview ............................................................ 1 Downloading the Program to the DSP.......................................8 Evaluation Board Photographs ....................................................... 1 Using the Evaluation Board .............................................................9 Revision History ............................................................................... 2 Power...............................................................................................9 Functional Block Diagrams ............................................................. 3 Inputs and Outputs .......................................................................9 Board Layout Block Diagrams .................................................... 3 AD1938 Audio Codec...................................................................9 Setting Up the Evaluation Board .................................................... 4 AD1940 SigmaDSP .......................................................................9 Installing the SigmaStudio Software .......................................... 4 Communications Header .............................................................9 Installing the USBi Drivers ......................................................... 4 Reset ................................................................................................9 Configuring the Default Switch and Jumper Settings ............. 5 Evaluation Board Schematics and Artwork ................................ 10 Powering Up the Board ............................................................... 5 Ordering Information .................................................................... 17 Connecting the Audio Cables ..................................................... 5 Bill of Materials ........................................................................... 17 REVISION HISTORY
7/10—Revision 0: Initial Version
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FUNCTIONAL BLOCK DIAGRAMS
ANALOG INPUTS
ANALOG OUTPUTS
AD1938
CODEC
USBi INTERFACE
(USB TO SPI)
AD1940
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POWER SUPPLY
REGULATION
Figure 3. Functional Block Diagram
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BOARD LAYOUT BLOCK DIAGRAMS
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Figure 4. Board Layout Block Diagram (Top Side)
Figure 5. Board Layout Block Diagram (Bottom Side)
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Evaluation Board User Guide
SETTING UP THE EVALUATION BOARD
3.
INSTALLING THE SigmaStudio SOFTWARE
Download the latest version of SigmaStudio online at:
http://www.analog.com/sigmastudiodownload.
To install, use the following steps:
1.
2.
3.
Click Search for the best driver in these locations, then
select Include this location in the search. Click Browse
to find the SigmaStudio 3.0\USB drivers directory (see
Figure 8).
Open the downloaded installer file and extract the files to
your PC.
Install the Microsoft® .net Framework, if not already
installed.
Install SigmaStudio by double-clicking setup.exe, and
following the prompts.
INSTALLING THE USBi DRIVERS
SigmaStudio must be installed to use the USBi. Once
SigmaStudio has been properly installed, connect the USBi
to an available USB port with the included USB cable. At
this point, Windows® Vista recognizes the device and
prompts the user to install drivers.
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1.
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Figure 8. Windows Found New Hardware Wizard—Search and
Installation Options
4.
Figure 6. Found New Hardware Notification
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Select the Install from a list or specific location
(Advanced) option and click Next (see Figure 7).
Figure 9. Windows Logo Testing Warning
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2.
When the warning about Windows Logo testing appears
on the screen, click Continue Anyway (see Figure 9).
Figure 7. Found New Hardware Wizard—Installation
The USBi drivers should now be successfully installed. Leave
the USBi connected to the PC.
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If SigmaStudio detects the USBi on the USB port of the
computer, the background of the USB label changes to
orange (see Figure 12).
CONFIGURING THE DEFAULT SWITCH AND
JUMPER SETTINGS
The board is hardwired in a stereo analog input, six channel
analog output configuration that cannot be modified. No
jumpers exist on this board, but there is one configuration
switch, S2. The setting of S2 determines the input gain of the
ADC preamp. The switch can be configured in 1 V p-p or
2 V p-p mode to match the input audio source.
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POWERING UP THE BOARD
To power up the board, connect the USBi’s ribbon cable to the
EVAL-AD1940MINIBZ’s communications header, J1.
4.
CONNECTING THE AUDIO CABLES
Connect a stereo audio source to J6 (ADC input).
Connect headphones or powered speakers to J3 (DAC
Output 1). The labels for J6 and J3 are only visible on
the bottom of the board.
Figure 13. Adding an AD1940
SETTING UP COMMUNICATIONS IN SigmaStudio
To use the USBi to communicate with the target IC,
connect it by dragging a wire between the blue pin of
the USB Interface cell and the green pin of the IC. The
corresponding drop-down box of the USBi automatically
fills with the default mode and channel for that IC.
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3.
5.
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2.
Start SigmaStudio by double-clicking the shortcut on the
desktop.
Click File > New Project or press Ctrl+N to create a new
project. The default view of the new project is called the
Hardware Configuration tab.
To use the USBi in conjunction with SigmaStudio, first
select it in the Communication Channels subsection of
the toolbox on the left side of the Hardware Configuration
tab (see Figure 10). Add it to the project space by clicking
and dragging it to the right.
Figure 10. Adding the USBi Communication Channel
If SigmaStudio cannot detect the USBi on the USB port
of the computer, then the background of the USB label
displays red (see Figure 11). This may happen when the
USBi is not connected or when the drivers are incorrectly
installed.
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1.
To add an AD1940 to the project, select it from the
Processors (ICs / DSPs) list and drag it to the project
space (see Figure 13).
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1.
2.
Figure 12. USBi Detected by SigmaStudio
Figure 11. USBi Not Detected by SigmaStudio
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Figure 14. Connecting the USBi to an AD940 IC
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Evaluation Board User Guide
3.
CREATING A BASIC SIGNAL FLOW
To create a basic signal flow, use the following steps:
To access the Schematic tab, where a signal processing
flow can be created, click the Schematic tab at the top of
the screen (see Figure 15).
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1.
Click and drag the input cell into the blank schematic
space to the right of the toolbox (see Figure 17).
Figure 15. Schematic Tab
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The left side of the schematic view houses the Tree
Toolbox, which contains all of the algorithms that can
run in the SigmaDSP. Navigate to the IO > Input folder
and select an Input cell.
Figure 17. Input Cell
4.
In the Tree Toolbox, navigate to the IO > Output folder
and select an Output cell (see Figure 18).
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Figure 16. Input Cell Selection
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2.
Figure 18. Output Cell Selection
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Click and drag an output cell to the schematic. Repeat so
there will be two outputs (see Figure 19).
8.
By default, this cell only has one input channel and one
output channel, as indicated by the green input and blue
output dots. To add a channel, right click in the blank
white part of the cell and select Add Algorithm > IC 1 >
Gain (slew) from the menu (see Figure 22).
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5.
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In the Tree Toolbox, navigate to the Volume Controls >
Adjustable Gain > Single/Multiple Controls > Clickless
(RC Type) HW Slew folder and select a Single Volume
Control cell (see Figure 20).
Figure 22. Adding a Channel to the Volume Control
The cell should now have two inputs and two outputs (see
Figure 23).
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6.
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Figure 19. Output Cells
Click and drag the Single Volume Control cell to the
schematic.
Figure 23. Stereo Volume Control Cell
9.
Navigate to the Filters > Second Order > Single Precision
> 2 Ch folder and select a Medium Size Eq cell (see
Figure 24).
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Figure 21. Volume Control Cell
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7.
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Figure 20. Volume Control Cell Selection
Figure 24. EQ Cell Selection
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Evaluation Board User Guide
13. Configure each filter as required. As an example, Figure 29
shows a low shelf at 50 Hz, peaking filters at 200 Hz, 500 Hz,
and 2000 Hz, and a high shelf at 10 kHz.
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10. Click and drag the cell to the schematic (see Figure 25).
Figure 25. Single-Band Stereo EQ Cell
Figure 29. Configured 5-Band EQ Cell
14. Connect the cells together by left clicking a blue output
dot and dragging to the green output dot of the next cell.
Continue until the signal flow is completed from input
to output for each channel.
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11. By default, the EQ only has one band. To increase the
number of bands, right click in the blank white part of the
cell and select Grow Algorithm > 1. 2 Channel – Single
Precision > 4 to increase the EQ to 5 bands (see Figure 26).
Figure 26. Growing the EQ Cell
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The EQ should now have five bands (see Figure 27).
Figure 30. Completed Signal Flow
The basic signal flow is now complete with stereo I/O, a fiveband equalizer, and a clickless volume control (see Figure 30).
DOWNLOADING THE PROGRAM TO THE DSP
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To compile and download the code to the DSP, click once on
the Link-Compile-Download button in SigmaStudio’s main
toolbar (Figure 31). Alternatively, press the F7 key.
Figure 27. Five-Band Stereo EQ Cell
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12. To change the properties of a filter, click once on its
corresponding blue filter icon (see Figure 28).
Figure 31. Link-Compile-Download Button
The signal flow should now be running on the evaluation
board, and audio should pass from input to output. The
controls for filters and volume can be changed in realtime by clicking and dragging them with the mouse.
Figure 28. Filter Properties Button
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USING THE EVALUATION BOARD
POWER
AD1940 SigmaDSP
Power can be supplied either via the USB bus by connecting
the EVAL-ADUSB2EBZ (USBi) to Header J1 or by a tippositive 3.8 V to 6 V dc power supply on Connector J2. The
on-board regulator generates the 3.3 V dc supply for the onboard circuitry. LED D1 lights up when power is supplied to
the board.
The AD1940 receives one I2S stream from the AD1938’s
ADCs and sends three I2S streams to the AD1938’s DACs.
The registers of the AD1940 and its signal processing flow
can be configured in SigmaStudio.
COMMUNICATIONS HEADER
The communications header, J1, connects to the EVALADUSB2EBZ, also called the USBi. More information about
the USBi can be found in the AN-1006 Application Note.
INPUTS AND OUTPUTS
The board is configured in an analog input-analog output
mode. There are two ADC inputs and 6 DAC outputs, each
accessible by standard stereo TRS 1/8” mini jacks.
The AD1940 uses the SPI communication protocol. The
communication port of the AD1938 is not accessible on this
evaluation board.
The input and output filters are active, and the outputs can
drive passive headphones or active speakers.
RESET
The input sensitivity switch sets the preamp gain, and it can be
configured as required for various audio input levels. The two
gain settings are 1 V rms and 2 V rms.
The input clip LED, D2, lights up when an input signal is close
to the full-scale input level of the AD1938.
The reset switch, S1, initiates a reset signal, which is generated
by the ADM811. This in turn resets the AD1940 and AD1938.
A reset event causes the AD1940 to lose its register settings and
RAM contents.
AD1938 AUDIO CODEC
The audio codec operates in standalone I2S mode. Its serial
ports are configured in master mode, so the serial ports of the
AD1940 should be configured as slaves.
The audio codec generates a master clock with its on-board
oscillator and the 12.288 MHz crystal resonator, Y1. It sends
master clock, frame clock, and bit clock signals to the AD1940.
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4
Figure 32. Board Schematics, Page 1—ADC Inputs
0.10uF
4
8
V+
V-
8
C35
ADA4841-2YRZ
ADA4841-2YRZ
V+
V-
U10-C
SLEEVE
TIP
U9-C
5V00_UNREG
J6
RING
ADC Input
0.10uF
C44
ADC1L
100k
R50
TP18
R56
100k
ADC1R
TP20
100pF
C73
10uF
C71
C75
100pF
10uF
C76
+
+
S2
DPDT Slide
R54
1V
2V
5k36
5
2
4
6
3
1
INPUT
SENS
5k36
R55
FILTR
5k36
FILTR
5k36
R47
R51
0.10uF
C63
0.10uF
C19
100kHz Low Pass
+
-
+
-
5
6
+
-
5k36
5k36
3
2
7
1
7
ADA4841-2YRZ
O
U10-B
R52
R46
ADA4841-2YRZ
O
U10-A
R53
1
ADA4841-2YRZ
O
U9-A
R31
R40
ADA4841-2YRZ
O
U9-B
R48
C74
+
-
5k36
270pF
3
2
5k36
5k36
5
6
5k36
270pF
C70
237R
237R
237R
237R
R43
R44
R33
R39
C66
C67
C60
C62
10uF
10uF
1.0nF
C59
1.0nF
C58
LEVEL_DETECT_1L
10uF
10uF
LEVEL_DETECT_1R
1.0nF
C55
100pF
C51
1.0nF
C56
100pF
C52
ADC1LP
ADC1LN
ADC1RP
ADC1RN
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Evaluation Board User Guide
EVALUATION BOARD SCHEMATICS AND ARTWORK
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270pF
DAC1R
R16
5k36
R15
3
5k36
2
C38
+ ADA4841-2YRZ
1
O
-
U3-A
C33
R12
301R
+
DAC1R
TP8
DAC Output 1
47uF
C37
200pF
R14
100k
RING
TIP
J3
SLEEVE
270pF
R9
DAC1L
5k36
R8
5
5k36
6
C29
5V00_UNREG
C30
+ ADA4841-2YRZ
7
O
U3-B
C31
R10
301R
+
U3-C
5k36
ADA4841-2YRZ
R7
100k
270pF
DAC2R
TP4
47uF
200pF
R26
DAC1L
C32
0.10uF
8
V+
V-
4
C48
TP14
R25
3
5k36
2
+ ADA4841-2YRZ
1
O
U5-A
C46
R22
301R
+
DAC2R
DAC Output 2
47uF
C47
200pF
R23
100k
RING
TIP
J4
SLEEVE
270pF
R20
DAC2L
5k36
5V00_UNREG
C41
TP10
R19
5
5k36
6
+ ADA4841-2YRZ
7
O
-
U5-B
C40
C43
R21
301R
+
200pF
DAC3R
5k36
R41
3
5k36
U5-C
ADA4841-2YRZ
R18
100k
270pF
R42
DAC2L
47uF
2
C68
0.10uF
V+
V-
8
4
C65
+ ADA4841-2YRZ
1
O
-
U7-A
C61
R35
301R
+
DAC3R
TP16
DAC Output 3
47uF
C64
200pF
R38
100k
RING
J5
TIP
SLEEVE
270pF
5k36
R28
5
5k36
6
C49
5V00_UNREG
C50
+ ADA4841-2YRZ
7
O
-
U7-B
C54
R30
301R
+
DAC3L
TP15
U7-C
ADA4841-2YRZ
47uF
200pF
R27
100k
C53
0.10uF
V+
V-
8
4
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DAC3L
R29
Figure 33. Board Schematics, Page 2—DAC Outputs
Rev. 0 | Page 11 of 20
MCLK
0.10uF
1k00
R1
MCLK
4
PLL_CTRL0
5
PLL_CTRL1
6
PLL_CTRL2
2
3
RSVD
9
NC
14
SDATA_IN0
15
SDATA_IN1
16
SDATA_IN2
17
SDATA_IN3
D3V3DD
1.0nF
0.10uF
C5
C2
0.10uF
0.10uF
0.10uF
VSENSE = 2.5VDC
C4
SDATA_IN0
C6
Q1
10uF
10
LRCLK_IN
11
BCLK_IN
TP7
LRCLK_IN
BCLK_IN
C7
TP5
+
U1
1
L1
2
RESETB
23
18
RESET
COUT
CCLK
CLATCH
CDATA
BCLK_IN
R2
19
COUT
20
CCLK
21
CLATCH
22
CDATA
ADR_SEL
R4
10k0
10k0
C8
0.10uF
100R
C28
0.10uF
LRCLK_IN
R3
29
30
31
32
38
39
41
42
C13
C1
SDATA_IN0
0.10uF
0.10uF
26
LRCLK_OUT0
27
BCLK_OUT0
34
LRCLK_OUT1
35
BCLK_OUT1
SDATA_OUT0
SDATA_OUT1
SDATA_OUT2
SDATA_OUT3
SDATA_OUT4
SDATA_OUT5
SDATA_OUT6
SDATA_OUT7
28
ODVDD
33
ODVDD
40
ODVDD
AD1940YSTZ
44
VSUPPLY
47
VREF
46
VDRIVE
45
VSENSE
ZX5T953GTA
PLL_GND
+
1
VDD
13
VDD
25
VDD
37
VDD
D3V3DD
1
C9
0.10uF
2
0.10uF
TP12
C11
L2
TP11
10uF
TP6
43
INVDD
12
GND
24 GND
36 GND
48
GND
8
PLL_VDD
RESET
CM
D3V3DD
ADC1LP
ADC1LN
ADC1RP
ADC1RN
C14
DSDATA1
DSDATA2
DSDATA3
DSDATA4
DLRCLK
DBCLK
10
PD/RST
23
CIN
24
COUT
26
CCLK
27
CLATCH
19
ASDATA2
20
ASDATA1
22
ALRCLK
21
ABCLK
16
15
14
11
18
17
45
ADC2RP
46
ADC2RN
43
ADC2LP
44
ADC2LN
41
ADC1RP
42
ADC1RN
39
ADC1LP
40
ADC1LN
U2
0.10uF
D3V3DD
13
DGND
12
C10
A3V3DD
AD1938
AGND
4
C3
34
C42
AGND
DVDD
DGND
25
5
AVDD
33
AVDD
37
AVDD
AGND
1
48
0.10uF
100R
DAC3R
7
R5
DAC3L
6
47
9
MCLK
C18
22pF
22pF
390pF
C24
12.288MHz
C22
DAC2R
31
Y1
DAC2L
8
DAC1R
30
DAC1L
29
28
35
FILTR
38
CM
LF
OR4
OL4
OR3
OL3
OR2
OL2
OR1
OL1
0.10uF
0.10uF
C20
0.10uF
C21
C17
C16
2
MCLKI/XI
3
MCLKO/XO
AVDD
AGND
32
D3V3DD
AGND
36
Rev. 0 | Page 12 of 20
7
+
C27
CM
0.10uF 10uF
C25
5.6nF
C26
562R
R6
A3V3DD
C77
+
0.10uF
10uF
C23
FILTR
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Evaluation Board User Guide
Figure 34. Board Schematics, Page 3—SigmaDSP and Audio Codec
0 88 27 -0 35
TP9
Rev. 0 | Page 13 of 20
J2
5V00_USB
1
3
2
DC_IN
TP2
MBRA140T3G
MBRA140T3G
LEVEL_DETECT_1R
LEVEL_DETECT_1L
CM
D4
D3
3
2
49k9
+
O
1
C36
100uF
R45
R49
ADA4841-2YRZ
49k9
+
-
D5
D6
R37
K
K
0.10uF
C57
5V00_UNREG
A
A
49k9
4
C69
10uF
U4
ADP3336
1
7
OUT
IN
2
8
OUT
IN
3
6
OUT
SD
5
FB
GND
+
R34
R36
D3V3DD
U8-B
R11
78k7
R13
C34
4
8
140k
10nF
V+
0.10uF V-
C72
U8-C
ADA4841-2YRZ
7
O
+ ADA4841-2YRZ
-
5V00_UNREG
5
6
C39
0.10uF
D2
A
K
+
TP13
1
L3
POWER
R17
475R
D3V3DD
D1
C12
10uF
INPUT CLIP
R32
Green Diffused
U8-A
2
+
C15
10uF
A3V3DD
TP1
TP19
TP17
TP3
COUT
CCLK
CLATCH
0.10uF
C45
D3V3DD
1
3
5
7
9
2
4
6
8
10
USB_CLK
1
4
U6
MR
MR
ADM811TARTZ
GNDRESET
VCC
USBi Header
SCL
SDA
J1
HEADER_10WAY_POL
2
3
R24
100k
5V00_USB
MR
CDATA
S1
RESET
SPST-NO
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Figure 35. Board Schematics, Page 4—Clip Detection, Power Supply, Reset, Communications
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Figure 36. Board Layout, Page 1—Top Assembly
Figure 37. Board Layout, Page 2—Top Layout and Screen
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Figure 38. Board Layout, Page 3—Bottom Layout and Screen
Figure 39. Board Layout, Page 4—Ground Plane
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Figure 40. Board Layout, Page 5—Power Plane
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ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Qty
29
5
Reference Designator
C1, C2, C4, C5, C7 to C11, C13,
C14, C16, C17, C19 to C21, C25,
C28, C32, C35, C39, C44, C45,
C53, C57, C63, C68, C72, C77
C3, C12, C15, C23, C27, C42,
C69, C71, C76
C6, C55, C56, C58, C59
2
C18, C22
1
C24
6
C29, C37, C40, C47, C49, C64
1
C26
8
6
C30, C38, C41, C48, C50, C65,
C70, C74
C31, C33, C43, C46, C54, C61
1
C34
1
C36
4
C51, C52, C73, C75
4
C60, C62, C66, C67
1
1
2
2
1
1
4
3
1
1
2
1
1
2
9
D1
D2
D3, D4
D5, D6
J1
J2
J3, J4, J5, J6
L1 to L3
Q1
R1
R2, R3
R4
R5
R6, R32
R7, R14, R18, R23, R24, R27,
R38, R50, R56
R8, R9, R15, R16, R19, R20,
R25, R26, R28, R29, R31, R40
to R42, R46 to R48, R51 to R55
R10, R12, R21, R22, R30, R35
R11
R13
R17
R33, R39, R43, R44
R34
R36
R37, R45, R49
S1
S2
9
22
6
1
1
1
4
1
1
3
1
1
Description
Multilayer ceramic 16 V, X7R (0402), 0.10 μF
capacitor
Manufacturer
Panasonic EC
Part Number
ECJ-0EX1C104K
Aluminum electrolytic 10 μF capacitor, FC 105°,
SMD_B
Multilayer ceramic 50 V, NP0 (0402), 1.0 nF
capacitor
Multilayer ceramic 50 V, NP0 (0402), 22 pF
capacitor
Multilayer ceramic 50 V, NP0 (0402), 390 pF
capacitor
Multilayer ceramic 50 V, NP0 (0402), 200 pF
capacitor
Multilayer ceramic 25 V, NP0 (0603), 5.6 nF
capacitor
Multilayer ceramic 50 V, NP0 (0402), 270 pF
capacitor
Aluminum electrolytic 47 μF capacitor, FC 105°,
SMD_D
Multilayer ceramic 25 V, NP0 (0603), 10 nF
capacitor
Aluminum electrolytic 100 μF capacitor, FC
105°, SMD_E
Multilayer ceramic 50 V, NP0 (0402), 100 pF
capacitor
Multilayer ceramic 10 V, X7R (0805), 10 μF
capacitor
Green diffused 10 millicandela 565 nm (1206)
Red diffused 6.0 millicandela 635 nm (1206)
Schottky diode 40 V 1 A
Schottky 30 V 0.5 A SOD123 diode
10-way 2 × 5 shroud polarized header
Mini power jack 0.08" R/A TH
Sterero Mini Jack SMT, SJ-3523-SMT
Chip ferrite bead 600 Ω @ 100 MHz
PNP transistor
1 kΩ chip resistor 1% 63 mW thick film (0402)
10 kΩ chip resistor 1% 63 mW thick film (0402)
100 Ω resistor network isolated 8-resistor (pack
100 Ω chip resistor 1% 63 mW thick film (0402)
562 Ω chip resistor 1% 63 mW thick film (0402)
100 kΩ chip resistor 1% 63 mW thick film (0402)
Panasonic EC
EEE-FC1C100R
Murata Manufacturing Co., Ltd.
GRM1555C1H102JA01D
Murata Manufacturing Co., Ltd.
GRM1555C1H220JZ01D
Murata Manufacturing Co., Ltd.
GRM1555C1H391JA01D
Murata Manufacturing Co., Ltd.
GRM1555C1H201JA01D
TDK Corporation
C1608C0G1E562J
Murata Manufacturing Co.,
Ltd.
Panasonic EC
GRM1555C1H271JA01D
EEE-FC1C470P
TDK Corporation
C1608C0G1E103J
Panasonic EC
EEE-FC1C101P
Murata Manufacturing Co., Ltd.
GCM1555C1H101JZ13D
Murata Manufacturing Co., Ltd.
GRM21BR71A106KE51L
Lumex Opto/Components, Inc.
Lumex Opto/Components, Inc.
On Semiconductor
On Semiconductor
3M
Switchcraft, Inc.
Digi-Key
TDK Corporation
Zetex, Inc.
Panasonic EC
ROHM Semiconductor
CTS Corporation
ROHM Semiconductor
Vishay/Dale
ROHM Semiconductor
SML-LX1206GW-TR
SML-LX1206IW-TR
MBRA140T3G
MBR0530T1G
N2510-6002RB
RAPC722X
CP-3523SJCT-ND
MMZ1005S601C
ZX5T953GTA
ERJ-2RKF1001X
MCR01MZPF1002
741X163101JP
MCR01MZPF1000
CRCW0402562RFKED
MCR01MZPF1003
5.36 kΩ chip resistor 1% 63 mW thick film (0402)
ROHM Semiconductor
MCR01MZPF5361
301 Ω chip resistor 1% 63 mW thick film (0402)
78.7 kΩ chip resistor 1% 63 mW thick film (0402)
140 kΩ chip resistor 1% 63 mW thick film (0402)
475 Ω chip resistor 1% 63 mW thick film (0402)
237 Ω chip resistor 1% 63 mW thick film (0402)
20 kΩ chip resistor 1% 63 mW thick film (0402)
18.2 kΩ chip resistor 1% 63 mW thick film (0402)
49.9 kΩ chip resistor 1% 63 mW thick film (0402)
Tact switch 6 mm gull wing SPST-NO
DPDT slide switch vertical
ROHM Semiconductor
Vishay/Dale
Panasonic EC
Vishay/Dale
Vishay/Dale
ROHM Semiconductor
Vishay/Dale
Vishay/Dale
Tyco/Alcoswitch
E-Switch, Inc.
MCR01MZPF3010
CRCW040278K7FKED
ERJ-2RKF1403X
CRCW0402475RFKED
CRCW0402237RFKED
MCR01MZPF2002
CRCW040218K2FKED
CRCW040249K9FKED
FSM6JSMA
EG2207
Rev. 0 | Page 17 of 20
UG-087
Evaluation Board User Guide
Qty
20
Reference Designator
TP1 to TP20
Description
Mini test point white, .1" OD
1
1
6
U1
U2
U3, U5, U7 to U10
1
1
U4
U6
1
Y1
SigmaDSP multichannel, 28-bit audio processor
4 ADC 8 DAC with PLL 192 kHz 24-bit codec
Dual, low power, low noise, and distortion railto-rail output amplifier
Adjustable low-dropout voltage regulator
Microprocessor voltage supervisor logic low
reset output
Crystal 12.288 MHZ, SMT, 18 pF
Rev. 0 | Page 18 of 20
Manufacturer
Keystone Electronics,
Corporation
Analog Devices
Analog Devices
Analog Devices
Part Number
5002
AD1940YSTZ
AD1938YSTZ
ADA4841-2YRZ
Analog Devices
Analog Devices
ADP3336ARMZ-REEL7
ADM811TARTZ-REEL7
Abracon Corporation
ABM3B-12.288MHZ-10-1-U-T
Evaluation Board User Guide
UG-087
NOTES
Rev. 0 | Page 19 of 20
UG-087
Evaluation Board User Guide
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG08827-0-7/10(0)
Rev. 0 | Page 20 of 20