Circuit Note CN-0041

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Circuit Note
CN-0041
Devices Connected/Referenced
Circuits from the Lab™ reference circuits are engineered and
tested for quick and easy system integration to help solve today’s
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information and/or support, visit www.analog.com/CN0041.
AD7356
Differential Input, Dual, 5 MSPS, 12-Bit
SAR ADC
AD8138
Low Distortion Differential ADC Driver
OP177
Ultraprecision Operational Amplifier
DC-Coupled, Single-Ended-to-Differential Conversion Using the AD8138 Low
Distortion Differential ADC Driver and the AD7356 5 MSPS, 12-Bit SAR ADC
CIRCUIT FUNCTION AND BENEFITS
applying differential drive to the AD7356 is to use a differential
amplifier, such as the AD8138. The AD8138 can be used as a
single-ended-to-differential amplifier or as a differential-todifferential amplifier. It also provides common-mode level
shifting. Figure 1 shows how the AD8138 can be used as a
single-ended-to-differential amplifier in a dc-coupled application.
The positive and negative outputs of the AD8138 are connected
to the respective inputs on the ADC through a pair of series
resistors to minimize the loading effects of the switched capacitor
inputs of the ADC. The architecture of the AD8138 results in
outputs that are very highly balanced over a wide frequency
range without requiring tightly matched external components.
The single-ended-to-differential gain of the circuit in Figure 1 is
equal to RF/RG, where RF = RF1 = RF2 and RG = RG1 = RG2.
This circuit provides a dc-coupled, single-ended-to-differential
conversion of a bipolar input signal to the AD7356 5 MSPS,
12-bit successive approximation register (SAR) analog-to-digital
converter (ADC). This circuit is designed to ensure maximum
performance of the AD7356 by providing adequate settling time
and low impedance.
CIRCUIT DESCRIPTION
Differential operation requires VINx+ and VINx− of the ADC to be
driven simultaneously with two equal signals that are 180° out
of phase and are centered around the proper common-mode
voltage. Because not all applications have a signal preconditioned
for differential operation, there is often a need to perform a
single-ended-to-differential conversion. An ideal method of
CF1
2.048V
1.024V
0V
RF1
+5V
VOCM
RG2
VINx–
AD8138
VINx+
RS*
–5V
RF2
CF2
+1.024V
10µF
+2.25V TO +3.6V
RS*
RG1
+2.048V
GND
–2.048V
+2.5V
10kΩ
VDD
VDRIVE
AD7356
REFA/REFB
2.048V
1.024V
0V
AGND DGND
+5V
+2.048V
OP177
10µF
10kΩ
*MOUNT AS CLOSE TO THE AD7356 AS POSSIBLE.
RS = 33Ω; RG1 = RG2 = RF1 = RF2 = 499Ω
CF1 = CF2 = 39pF
08480-001
–5V
Figure 1. AD8138 as a DC-Coupled, Single-Ended-to-Differential Converter Driving the AD7356 Differential Inputs
(Simplified Schematic: Decoupling and All Connections Not Shown)
Rev. B
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CN-0041
Circuit Note
If the analog inputs source being used has zero impedance, all
four resistors (RG1, RG2, RF1, and RF2) should be the same as is
shown in Figure 1. If the source has a 50 Ω impedance and a 50 Ω
termination, for example, increase the value of RG2 by 25 Ω to
balance this parallel impedance on the input and thus ensure that
both the positive and negative analog inputs have the same gain.
This also requires a small increase in RF1 and RF2 to compensate
for the gain loss caused by increasing RG1 and RG2. Complete
analysis for the terminated source condition is found in the
ADIsimDiffAmp interactive design tool and in the MT-076
Tutorial.
The AD7356 requires a driver that has a very fast settling time
due to the very short acquisition time required achieving 5 MSPS
throughput with a serial interface. The track-and-hold amplifier
on the front end of the AD7356 enters track mode on the rising
edge of the 13th SCLK period during a conversion. The ADC
driver must settle before the track-and-hold returns to hold (38 ns
later for 5 MSPS throughput on the AD7356 using an 80 MHz
SCLK). The AD8138 has a specified 16 ns settling time that
satisfies this requirement.
The voltage applied to the VOCM pin of the AD8138 sets up the
common-mode voltage. In Figure 1, VOCM is connected to 1.024 V,
which is a divided version of the internal 2.048 V reference on
the AD7356. If the on-chip 2.048 V reference on the AD7356 is
to be used elsewhere in a system (as illustrated in Figure 1), the
output from REFA or REFB must first be buffered. The OP177
features the highest precision performance of any op amp
currently available and is a perfect choice for a reference buffer.
Note that, in Figure 1, the AD8138 operates on dual 5 V supplies
whereas the AD7356 is specified for power supply voltages of
2.25 V to 3.6 V. Care must be taken to ensure that the maximum
input voltage limits of the AD7356 are not exceeded during
transient or power-on conditions (see MT-036 Tutorial). In
addition, the circuit must be constructed on a multilayer
printed circuit board (PCB) with a large area ground plane.
Proper layout, grounding, and decoupling techniques must be
used to achieve optimum performance (see MT-031 Tutorial,
MT-101 Tutorial, and the AD7356 evaluation board layout).
COMMON VARIATIONS
The OP07D, an ultralow offset voltage op amp, is a lower cost
alternative to the OP177. It offers similar performance with the
exception of the offset voltage specification. Alternatively, the
AD8628 or the AD8638 offers very high precision with very low
drift with time and temperature.
LEARN MORE
MT-031 Tutorial, Grounding Data Converters and Solving the
Mystery of "AGND" and "DGND," Analog Devices.
MT-036 Tutorial, Op Amp Output Phase-Reversal and Input
Over-Voltage Protection, Analog Devices.
MT-074 Tutorial, Differential Drivers for Precision ADCs,
Analog Devices.
MT-075 Tutorial, Differential Drivers for High Speed ADCs
Overview, Analog Devices.
MT-076 Tutorial, Differential Driver Analysis, Analog Devices.
MT-101 Tutorial, Decoupling Techniques, Analog Devices.
John Ardizonni and Jonathan Pearson, “Rules of the Road” for
High-Speed Differential ADC Drivers (Analog Dialogue, Volume
43, May 2009, Analog Devices).
ADIsimDiffAmp (Differential Amplifier Tool), Analog Devices.
Data Sheets and Evaluation Boards
AD7356 Data Sheet.
AD7356 Evaluation Board.
AD8138 Data Sheet.
OP177 Data Sheet.
OP07D Data Sheet.
REVISION HISTORY
1/13—Rev. A to Rev. B
Changes to Figure 1 ...........................................................................1
11/09—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Circuit Note Title ..........................................................1
2/09—Revision 0: Initial Release
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CN08480-0-1/13(B)
Rev. B | Page 2 of 2
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