AN-1311
APPLICATION NOTE
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Complex Power Supply Sequencing Made Easy
by Jess Espiritu
INTRODUCTION
300 mA low dropout (LDO) regulators. This application note
also describes sequencer ICs that may be useful for applications
that require more accurate and flexible sequencing.
Power supply sequencing is required for microcontrollers, field
programmable gate arrays (FPGAs), digital signal processors
(DSPs), analog-to-digital converters (ADCs), and other devices
that operate from multiple voltage rails. These applications
typically require that the core and analog blocks be powered up
before the digital input/output (I/O) rails, although some
designs may require other sequences. Proper power-up and
power-down sequencing can prevent both immediate damage
from latch-up and long-term damage from electrostatic
discharge (ESD). In addition, sequencing the supplies staggers
the inrush current during power-up, an especially helpful
technique in applications operating from current-limited supplies.
Figure 1 shows an application that requires multiple supply rails.
These rails are the core supply (VCCINT), I/O supply (VCCO),
auxiliary supply (VCCAUX), and system memory supply.
For example, the Xilinx® Spartan-3A FPGA has a built-in
power-on reset circuit that ensures that all supplies have reached
their thresholds before it allows the device to be configured.
The power-on reset circuit reduces the strict requirement for
power sequencing; however, to minimize inrush current levels
and to observe sequencing requirements of circuits attached to
the FPGA, the supply rails must be powered up as follows:
VCCINT followed by VCCAUX followed by VCCO. Note that some
applications require specific sequences; therefore, always refer
to the power requirements section of the relevant data sheet.
This application note discusses the advantages and disadvantages
of using discrete components to sequence the power supplies
and describes a simple, yet effective, method of achieving
sequencing by using the internal precision enable pins of the
ADP5134, which combines two 1.2 A buck regulators with two
VIN1
REG1
VOUT1
EN1
+VIN
ON/OFF
VIN2
VOUT2
REG2
FPGA
SPARTAN 3x
CYCLONE III
CYCLONE IV
EN2
VIN3
VOUT3
REG3
EN3
VIN4
Figure 1. Typical Method for Powering Processors and FPGAs
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12403-001
VOUT4
REG4
EN4
AN-1311
Application Note
TABLE OF CONTENTS
Introduction ...................................................................................... 1
Simple Power Supply Sequencing Using Resistor Dividers .........5
Revision History ............................................................................... 2
Sequencer ICs Improve Timing Accuracy .....................................6
Simple Power Supply Sequencing Using Passive Delay
Networks ............................................................................................ 3
Conclusion..........................................................................................6
References ...........................................................................................6
Precision Enables Make Sequencing Easy ..................................... 4
REVISION HISTORY
8/14—Revision 0: Initial Version
Rev. 0 | Page 2 of 6
Application Note
AN-1311
SIMPLE POWER SUPPLY SEQUENCING USING
PASSIVE DELAY NETWORKS
This method may be useful for applications that do not require
precise sequencing. Applications where delaying signals is
sufficient may require only the external resistor and capacitor.
The disadvantage of using this method with standard regulators
is that the logic threshold of the enable pins may vary widely
with voltage and temperature. In addition, the delay in the
voltage ramp depends on the values and tolerances of the
resistor and capacitor. A typical X5R capacitor varies by about
±15% over the –55°C to +85°C temperature range and another
±10% due to dc bias effects, making the timing imprecise and
sometimes unreliable.
A simple way to sequence power supplies is to delay the signal
going to the enable pin of a regulator with passive components,
such as resistors, capacitors, and diodes, as shown in Figure 2.
When the switch closes, D1 conducts while D2 is left open. C1
charges with the voltage at EN2 rising at a rate determined by
R1 and C1. When the switch opens, C1 discharges to ground
through R2, D2, and RPULL. The voltage at EN2 falls at a rate
determined by R2, RPULL, and C1. Changing the values of R1 and
R2 changes the charging and discharging times, thereby setting
the turn-on and turn-off times of the regulator.
VIN1
VOUT1
REG1
EN1
+VIN
VIN2
VOUT2
R1 D1
EN2
REG2
FPGA
SPARTAN 3x
CYCLONE III
CYCLONE IV
ON/OFF
C1
D2 R2
VIN3
VOUT3
R3 D3
REG3
EN3
C2
D4 R4
MEMORY
REG4
(EXT)
RPULL
VOUT4
COMPARATOR
OR SUPERVISOR
12403-002
+VREF
Figure 2. Simple Power Supply Sequencing Method Using Resistors, Capacitors, and Diodes
Rev. 0 | Page 3 of 6
AN-1311
Application Note
PRECISION ENABLES MAKE SEQUENCING EASY
To achieve stable threshold levels for precise timing control,
most regulators require an external voltage reference. The
ADP5134 overcomes this problem by integrating a precision
reference, saving significant cost and printed circuit board
(PCB) area. Each regulator has an individual enable input.
0.98
0.97
0.96
0.95
0.94
–40
25
85
TEMPERATURE (°C)
125
Figure 3. Precision Enable Turn-On Threshold over Temperature, 10 Samples
When the voltage at the enable input drops 80 mV (typical) below
the reference voltage, the regulator is deactivated. When the voltage
on all enable inputs drops below the ENx falling threshold
(VIL_EN [0.35 V maximum]), the device enters shutdown mode.
In this mode, the current consumption falls to less than 1 µA.
Figure 3 and Figure 4 demonstrate the accuracy of the ADP5134
precision enable thresholds for BUCK1 over temperature.
0.92
0.91
0.90
0.89
0.88
0.87
0.86
–40
25
85
TEMPERATURE (°C)
125
12403-004
PRECISION ENABLE TURN-OFF THRESHOLD (V)
When the voltage at the enable input rises above the ENx pin
rising threshold (VIH_EN [0.9 V minimum]), the device comes out
of shutdown, and the housekeeping block is turned on; however,
the regulator is not activated. The voltage at the enable input is
compared to a precise internal reference voltage (0.97 V typical).
When the voltage at the enable pin goes above the precision
enable threshold, the regulator is activated, and the output
voltage starts to rise. The reference varies by only ±3% over
input voltage and temperature corners. This small range ensures
precise timing control, resolving the issues seen with using
discrete components.
0.99
12403-003
PRECISION ENABLE TURN-ON THRESHOLD (V)
1.00
Figure 4. Precision Enable Turn-Off Threshold over Temperature, 10 Samples
Rev. 0 | Page 4 of 6
Application Note
AN-1311
SIMPLE POWER SUPPLY SEQUENCING USING
RESISTOR DIVIDERS
VVOUT1
Multichannel supplies can be sequenced by connecting an
attenuated version of the output of one regulator to the enable
pin of the next regulator to be powered up, as shown in Figure 5,
where the regulators turn on or off sequentially: BUCK1 to
BUCK2 to LDO1 to LDO2. Figure 6 shows the power-up
sequence after EN1 is connected to VIN1. Figure 7 shows the
shutdown sequence after EN1 is disconnected from VIN1.
EN1
VOUT1
BUCK1
VIN2
EN2
VOUT3
VOUT4
CH2 2.00V
CH4 2.00V
M400µs
A CH1
T
1.52400ms
560mV
720mV
Figure 6. ADP5134 Start-Up Sequence
FPGA
SPARTAN 3x
CYCLONE III
CYCLONE IV
LDO1
VIN4
EN4
CH1 2.00V
CH3 2.00V
BUCK2
VIN3
EN3
2
VOUT2
12403-006
ON/OFF
VVOUT4
ADP5134
LDO2
VVOUT1
PG
VP1
VP3
GPIN
VP2
1
VVOUT2
VDDIO
VVOUT3
VIN
EN
REG5
(EXT)
VOUT5
MEMORY
12403-005
+VIN
VVOUT3
12403-007
VIN1
VVOUT2
1
Figure 5. Simple Sequencing with the ADP5134
VVOUT4
2
CH1 2.00V
CH3 2.00V
CH2 2.00V
CH4 2.00V
M400µs
A CH1
T
1.19840ms
Figure 7. ADP5134 Shutdown Sequence
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AN-1311
Application Note
SEQUENCER ICs IMPROVE TIMING ACCURACY
CONCLUSION
In some cases, achieving precise timing is more important than
reducing PCB area and cost. For these applications, a voltage
monitoring and sequencer IC such as the ADM1184 quad
voltage monitor, which offers ±0.8% accuracy over voltage and
temperature, can be used. Another choice is the ADM1186 quad
voltage sequencer and monitor with programmable timing; this
device may be useful in applications that require more elaborate
control of the power-up and power-down sequence.
Sequencing using the ADP5134 precision enable inputs is simple
and easy to implement, requiring only two external resistors per
channel. More elaborate sequencing can be achieved by using
the ADM1184 or ADM1186 voltage monitors.
For example, the ADP5034 4-channel regulator includes two
3 MHz, 1200 mA buck regulators and two 300 mA LDOs. A
typical sequencing function can be implemented by using the
ADM1184 to monitor the output voltage of one regulator and
to provide a logic high signal to the enable pin of the next
regulator when the output voltage being monitored reaches a
certain level. This method, shown in Figure 8, can be used with
regulators that do not provide a precision enable function.
Xilinx DS529 Spartan-3A FPGA Family Data Sheet. Xilinx, Inc.,
2010.
In addition, refer to the power management web page and the
power management/sequencing web page for more information.
VOUT1
EN1
BUCK1
VIN2
VOUT2
BUCK2
EN2
VIN3
VOUT3
LDO1
EN3
VIN4
VOUT4
LDO2
EN4
VOUT1
VIN1
VOUT2
VIN2
VOUT3
ADM1184
PWGRD
FPGA
SPARTAN 3x
CYCLONE III
CYCLONE IV
GPIN
VIN3
VIN4
VIN
EN
REG5
(EXT)
VOUT5
MEMORY
12403-008
ON/OFF
Augusta, Chris and Martin Murnane. AN-932 Application
Note. Power Supply Sequencing. Analog Devices, Inc., 2008.
ADP5034
VIN1
+VIN
REFERENCES
Figure 8. Sequencing the ADP5034 4-Channel Regulator Using the ADM1184 Quad Voltage Monitor
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AN12403-0-8/14(0)
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