Surface Mounted PCB Cleaning Process Improvement ... Impact on Manufacturing System Performance

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Surface Mounted PCB Cleaning Process Improvement and Its
Impact on Manufacturing System Performance
by
Nikith Rajendran
B.E. (Mechanical Engineering)
PSG College of Technology, Coimbatore, 2010
Submitted to the Department of Mechanical Engineering in Partial Fulfillment of the
Requirements for the Degree of
ARCHIVES
Master of Engineering in Manufacturing
MASSACHUSETTS INSTITUff
OF TECHNOLOGY
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
NOV 0 1 2011
September 2011
LiBRAR IES
( 2011 Nikith Rajendran. All rights reserved.
The author grants to MIT permission to reproduce and
to distribute publicly paper and electronics copies of this thesis document
in whole or in part in any medium known or hereafter created
Sign ature of Author: ...........................................................................................
Department of Mechanical Engineering
August 16, 2011
A
A
Certified by: ..................................
.....................................
Jung Hoon Chun
Professor of Mechanical Engineering
Thesis Supervisor
Certified by: ................
....
David E. Hardt
Ralph E. and Eloise F. Cross Professor of Mechanical Engineering
Chairman, Department Committee of Graduate Students
Surface Mounted PCB Cleaning Process Improvement and Its
Impact on Manufacturing System Performance
by
Nikith Rajendran
Submitted to the Department of Mechanical Engineering on August 16, 2011
in partial fulfillment of the requirements for the Degree of
Master of Engineering in Manufacturing
at the Massachusetts Institute of Technology
ABSTRACT
In the surface mount technology (SMT) assembly line, the printed circuit boards (PCB) are
washed to remove the solder flux that was used while soldering to prevent oxidation. However
the current cleaning method is highly ineffective in removing these solder flux residues. The
solder flux residues cause many problems like electro-migration, improper mold underfill and
increase the chances of failure. This project explores alternative methods for the cleaning process
and also identifies the important factors involved in cleaning. A model of the SMT assembly line
was created using ARENA software and the impact of the different alternatives on the
manufacturing system's performance was analyzed using this model. The results indicate that the
use of chemicals in the ultrasonic cleaning method gives the best cleanliness performance. The
results of the manufacturing system analysis show that the PCB cleaning process is not the
bottleneck process in the SMT line and hence none of the different alternatives significantly
impacted the throughput rate, cycle time and inventory levels. Cost comparison results also
indicate that using chemicals in the batch type ultrasonic machine was atleast 25% cheaper than
using chemicals in either centrifugal machine or in in-line machine.
Thesis Advisor:
Jung Hoon Chun
Professor of Mechanical Engineering
Director, Laboratory of Manufacturing and Productivity
4
Acknowledgements
I would like to gratefully thank the entire cohort team of the Master of Engineering in
Manufacturing program at the Massachusetts Institute of Technology for making this project
happen and providing all their support and resources at all possible times.
I wish to sincerely thank my advisor, Prof. Jung Hoon Chun, for his invaluable advice, constant
support and mentorship and without whom this project wouldn't have been this successful. His
guidance was instrumental in steering this project to success.
I also wish to express my gratitude to the Vicor Corporation, Andover, MA for giving the
opportunity to work in its state of the art manufacturing facility at its Andover facility and also
for immediately making available any resource whenever the team ever needed them.
I feel greatly indebted to my supervisors at the company, Mr. Mohammed Wasef and Mr. Rudy
Mutter not just for providing us support but also for providing us the much needed mentorship,
encouragement and motivation. They gave me the opportunity to present and participate in
meetings chaired by the Vice Presidents and the CEO.
I wish to thank Prof. David Hardt and Dr. Brian Anthony for their support, encouragement and
also for arranging such a project. I would like to sincerely thank Ms. Jennifer Craig for her
invaluable help in writing this thesis and for instantaneously responding to pleas of help.
I would like to gratefully acknowledge the support provided by Mr. Steve Caruso, Ms. Eva
McDermott, Ms. Linda Kenison, Mr. Gaurav Sonone, Mr. Ray Whittier and Mr. Karan Barabde
at Vicor Corporation.
I would like to personally thank Pranav Jain and Ishan Mukherjee who are the best teammates I
have ever had and also for making this whole project an experience of a lifetime. I am
undoubtedly most thankful to my mother, father and my sisters without whom I would not have
been able to come this far.
6
Table of Contents
A bstract ...........................................................................................................................................
3
A cknowledgem ents.........................................................................................................................
5
Table of Contents............................................................................................................................
7
List of Figures...............................................................................................................................
10
List of Tables ................................................................................................................................
12
Chapter 1 - Introduction................................................................................................................
14
1.1
Introduction ....................................................................................................................
14
1.2
Company Background................................................................................................
14
1.3
Product Inform ation and Description.........................................................................
15
1.4
Overview of Thesis ........................................................................................................
16
Chapter 2 - Overview of M anufacturing Process ......................................................................
2.1 Introduction.........................................................................................................................
2.2
V .1 Chip M anufacturing Process Flow .......................................................................
18
18
18
2.2.1
SM T Line ................................................................................................................
20
2.2.2
Transform er Core Attach....................................................................................
22
2.2.3
U nderfilling.............................................................................................................
22
2.2.4
M olding...................................................................................................................
22
2.2.5
PCB M arking and Dicing .....................................................................................
22
2.2.6
J-lead Attach .........................................................................................................
23
2.2.7
Final Testing ........................................................................................................
23
PCB Cleaning Process................................................................................................
23
2.3
2.3.1
Introduction.............................................................................................................
23
2.3.2
Why Cleaning ......................................................................................................
23
2.3.3
Factors Involved in Cleaning ...............................................................................
24
2.3.4
PCB Cleaning Process Specifications..................................................................
25
2.3.5
Cleaning M ethods...................................................................................................26
2.3.6
2.4
2.4.1
Cleaning Process Control and Testing ................................................................
Softw are used for M anufacturing System Analysis....................................................
Explanation of the Basic Elements of the ARENA Software .............................
7
27
28
29
2.4.2
Building a M odel using ARENA Software ........................................................
31
2.4.3
Sim ulating the M odel...........................................................................................
32
Chapter 3 - Problem Description..................................................................................................
34
Problem Statem ent ...........................................................................................................
34
3.1
3.1.1
Areas of Residue Incidence on PCB ....................................................................
35
3.1.2
Root Cause Hypotheses ......................................................................................
37
Project Objectives ........................................................................................................
39
Chapter 4 - Literature Review ..................................................................................................
41
Introduction .....................................................................................................................
41
3.2
4.1
4.1.1
Experim ents Design and M ethodology................................................................
41
4.1.2
Results of Hypothesis-Testing Experiments......................................................
43
4.1.3
Results of Optim ization Experim ents ..................................................................
44
4.1.4
Common Areas of Flux Residue Incidence ........................................................
45
4.1.6
Influence of Product Architecture on Cleanliness ...............................................
46
Review of Previous Work ...........................................................................................
47
4.2.1
Work done at Vicor .............................................................................................
47
4.2.2
Work done by Vendor A ......................................................................................
47
4.2.3
Work done by Vendor B......................................................................................
47
Chapter 5 - Software M odel of the SM T Line ...........................................................................
49
4.2
5.1
Introduction .....................................................................................................................
49
5.2
Process Sequence in the SM T Line.............................................................................
50
5.3
Process Tim es..................................................................................................................
51
5.4
SM T Line M odel in ARENA ......................................................................................
52
5.4.1
Initialization of the M odel..................................................................................
53
5.4.2
The Bottom side Screen Printing and SMD Placement Processes ............
54
5.4.3
The Bottom side Reflow Process............................................................................
57
5.4.4
The Top side Screen Printing and SMD Placement Processes.............................
58
5.4.5
The Top side Reflow Process .................................................................................
59
5.4.6
The Cleaning and Allied Processes....................................................................
60
5.5
Conclusion.......................................................................................................................
8
61
Chapter 6 - Results and D iscussions .........................................................................................
6.1
Manufacturing System s Analysis Results..................................................................
6.1.1
64
64
Scenario 1: Current Process Analysis....................................................................
6.1.1.1
M odel....................................................................................................................
65
6.1.1.2
65
Results ..............
. --..........................................................................................
6.1.2
65
Scenario 2: Chemicals used in the Centrifugal Machine.......................................
6.1.2.1
M odel....................................................................................................................66
66
6.1.2.2
66
Results ..................................................................................................................
6.1.3
Scenario 3: Single Piece Flow Ultrasonic Machine is used ..................................
6.1.3.1
M odel:...................................................................................................................
67
6.1.3.2
67
Results ..................................................................................................................
6.1.4
67
Scenario 4: Batch-type Ultrasonic M achine is used .............................................
6.1.4.1
M odel................----...............................................................................................
68
6.1.4.2
68
Results .................................................................................................................
6.1.5
68
Scenario 5: In-line W ashing M achine is used ......................................................
6.1.5.1
M odel...................................................................................................................
69
6.1.5.2
70
6.2
6.3
6.3.1
6.3.2
Results .................................................................................................................
D iscussion of Manufacturing System A nalysis Results.................................................
Cost A nalysis Results.....................................................................................................
Cost Comparison of Chem icals ..........................................................................
Cost Comparison of M achines.............................................................................
6.4 Conclusion...........................................................................................................................
Chapter 7 - Recom m endations and Future W ork....................................................................
7.1 Recom m endations...........................................................................................................79
7.1.1
Recommendations for the Alternative Cleaning Method
..................
7.1.2
69
71
72
72
73
75
79
79
Recom mended Product Architecture Changes ....................................................
7.2
Future Work ...................................................................................................................
Appendix A: Results of Hypothesis-Testing Experiments
..........................
80
Appendix B : Results of Optim ization Experim ents..................................................................
Appendix C : Grading Scale ......................................................................................................
84
85
References.....................................................................................................................................
87
9
81
83
List of Figures
Fig. 2.1: Flowchart of VI Chip Manufacturing Process ............................................................
19
Fig. 2.2 SM T Process Flow .......................................................................................................
20
Fig. 2.3 Snapshot of the ARENA Simulation software screen.................................................
28
Fig. 3.1 Presence of flux residue under a BGA-FET [12] ........................................................
34
Fig. 3.2 Presence of flux residue under chip capacitor array [12]............................................
34
Fig. 3.3 Flux residue on and near solder joints of the leads of MLP FET [12]........................
35
Fig. 3.4 Flux reside on MLP-FET footprint [12]......................................................................
36
Fig 3.5 Flux reside on 1210 chip capacitor footprint [12]........................................................
36
Fig. 4.1 Process Flow followed in Experiments ........................................................................
42
Fig. 4.2: Common areas of flux incidence ...............................................................................
45
Fig. 4.3: Image of 1210 chip capacitor ......................................................................................
46
Fig. 5.1 Process Sequence in the SMT line ...............................................................................
50
Fig. 5.2: Initialization of the model ..........................................................................................
53
Fig. 5.3: Bottom side screen printing and SMD placement processes flowchart ............
54
Fig. 5.4: Bottom side screen printing and SMD placement processes model..............
55
Fig. 5.4a: Explanation of a subset of the model.........................................................................
55
Fig. 5.5: The Bottom side reflow process flowchart.....................................................................
57
Fig. 5.6: The Bottom side reflow process model......................................................................
57
Fig. 5.7: The Top side screen printing and SMD placement processes flowchart....................
58
Fig. 5.8: The Top side screen printing and SMD placement processes model..........................
58
Fig. 5.9: The Top side reflow process flowchart ......................................................................
59
Fig. 5.10: The Top side reflow process model...........................................................................
59
Fig. 5.11: The Cleaning and Allied Processes Model...............................................................
60
Fig. 5.12: M odel of the SM T line .............................................................................................
61
Fig. 5.12: Model of the SMT line (Cont.d)................................................................................
62
Fig 6.1: Scenario 1 Cleaning Model ..........................................................................................
65
Fig 6.2: Scenario 2 Cleaning Model ..........................................................................................
66
Fig 6.3: Scenario 3 Cleaning Model ..........................................................................................
67
10
Fig 6.4: Scenario 4 Cleaning Model ........................................................................................
68
Fig 6.5: Scenario 5 Cleaning Model ........................................................................................
69
Appendix C - Fig. 1: Grading Pattern used for 0603 chip capacitors.......................................
85
11
List of Tables
Table 2.1: Explanation of the basic elements of the ARENA software [11].............................
29
Table 5.1: Average Process times on the SMT line [15]..........................................................
51
Table 5.2: Expanded version of some of the sub-models ........................................................
56
Table 6.1: Manufacturing Systems Analysis Results of Scenario 1 .......................................
65
Table 6.2: Manufacturing Systems Analysis Results of Scenario 2 ........................................
66
Table 6.3: Manufacturing Systems Analysis Results of Scenario 3 ........................................
67
Table 6.4: Manufacturing Systems Analysis Results of Scenario 4 ........................................
68
Table 6.5: Manufacturing Systems Analysis Results of Scenario 5 ........................................
70
Table 6.6: Comparison of the different scenarios......................................................................
71
Table 6.7: Cost comparison of the different chemicals ............................................................
72
Table 6.8: Cost comparison of machines.................................................................................
74
Table 6.9: Summary of manufacturing system and cost analyses ............................................
75
Table 6.10: Sensitivity Analysis of Batch type ultrasonic process..........................................
76
Table 6.11: Sensitivity A nalysis ...............................................................................................
77
Appendix A - Table A: Experiments for Testing of Hypothesis ..............................................
83
Appendix B - Table B: Optimization Experiments..................................................................
84
Appendix C - Table C: Grading Scale Explanation..................................................................
85
13
Chapter 1 - Introduction
1.1 Introduction
The high-performance electronics industry requires sophisticated and dependable electronic
power modules for high precision applications in the fields of computing, data processing,
communications and controls. Reliability is a major concern for products in such critical
applications. The work of this project is among a larger scheme of projects specifically designed
to increase the reliability of the product.
The focus of this project is on manufacturing process improvement and optimization in an
electronic power module manufacturing plant. The project involves systematic study of root
causes for the ineffectiveness of a particular process, development and suggestion of alternative
solutions, manufacturing systems analysis and cost comparison analysis of the alternatives and
finally the implementation of the preferred alternative. The recommendations based on this
project could yield significant improvements in the overall reliability of the product when the
improved process is implemented.
1.2 Company Background
Vicor Corporation headquartered in Andover, MA is a market-leader of electronic power
system solutions for the highly specialized electronics industry. The company designs and
manufactures modular power components which have applications in various fields such as
computing, communications, industrial control, industrial testing and medical and defense
electronics.
The company manufactures three types of products-
Bricks, V.1 Chips and Picor
components. Bricks and V.I Chips are specialized D.C. - D.C. and A.C. - D.C. power convertors
and filters and include power regulators, current multipliers and bus convertors. The Picor range
includes high density power conversion circuit components. In this work, however, the focus is
on the manufacturing process improvement in the production line of V.1 Chips only.
1.3 Product Information and Description
V.1 Chip refers to the name given to the latest series of DC-DC converters released by
Vicor which have higher power density, higher efficiency, improved transient responsiveness,
lower noise levels and lower costs than the previous series of DC-DC converters. DC-DC
converters are an integral part of many electronic and electrical applications and are used
whenever there is a need to either step-up (also referred to as 'boost') or step-down (also referred
to as 'buck') the input voltages in order to deliver an output voltage. A typical example could be
observed in a car where different electrical appliances like headlights, radio, etc. require different
input voltages and hence would need a DC- DC converter to convert the input voltage from the
car battery to meet the different voltage requirements [1]. This DC-DC conversion can be
achieved through the V.1 - chipset which includes different modules like PRM (Pre-Regulator
Module), VTM (Voltage Transformer Module) and BCM (Bus Converter Module). Each of these
modules has different product architectures. But they can be still produced on the same
production line.
The PRM can be associated with the voltage regulation work i.e. it delivers a highly
regulated voltage from an unregulated input source. Though PRM can be used just as a power
regulator, it is usually used in conjunction with the VTM which uses the regulated voltage from
the PRM and transforms it according to the demand. Thus a PRM - VTM combination
essentially serves as a regulated DC - DC converter. BCM module is a supplementary module
which is a fixed DC - DC voltage transformer that can be used along with the regular PRM VTM combination and is usually used to provide intermediate voltages. This modular approach
of having three or more different modules (PRM, VTM and BCM) for achieving the function of
a DC - DC converter is result of the 'Factorized Product Architecture (FPA)' philosophy
introduced and followed by Vicor instead of the regular 'Centralized Product Architecture
(CPA)' adopted by the rest of the industry [2].
1.4 Overview of Thesis
This thesis is the result of the research carried out at the manufacturing facility of Vicor
Corporation in Andover, MA from January through August 2011. The work was carried out by a
team comprising Pranav Jain [3], Ishan Mukherjee [4] and the author. The project was a
collaborative effort with the major portion of the project being done by the three team members
and it later spun-off into three different streams one of which was handled by the author.
Formulation of hypotheses and conduction of experiments to test them were part of the joint
effort while manufacturing systems analysis and cost analysis based evaluation of the
alternatives formed the major portion of the individual tasks handled by the author. Chapters 1 &
2 introduce the topic and describe the background concepts relating to the processes involved in
the manufacture of the power modules, provide details about cleaning of PCBs after soldering
and finally describe the software that has been used for manufacturing system analysis. The
detailed picture of the problem is presented in Chapter 3 while Chapter 4 contains the review of
technical literature, the work done by other members of the team and previous work on the
problem. Chapter 5 explains the software model that was built to simulate the assembly line and
which was also used in the manufacturing system analysis. The results of the experiments
conducted as well as the results of the manufacturing system analysis and cost analysis are put
forward and discussed in Chapter 6. Chapter 7 has the recommendations based on these results
and also the future work that would be necessary to consolidate this work.
17
Chapter 2 - Overview of Manufacturing Process
2.1 Introduction
This chapter gives a brief background of all the different manufacturing processes adopted
in the production of V.1 Chips at Vicor's facility in Andover, MA. This project is concerned
mainly with the SMT subdivision of the production line and hence this chapter discusses it in
detail. Since the project deals with the process improvement and optimization of the PCB
cleaning process which is part of the SMT line, the cleaning process is also discussed in detail
with information about its necessity and the alternatives available. This chapter also discusses the
basics of the software that has been used for the manufacturing system analysis of the SMT line.
2.2 V.1 Chip Manufacturing Process Flow
V.1 Chips are essentially power modules with surface mount devices (SMD) such as field
effect transistors (FET), multiwire leadframe package (MLP), ball grid array (BGA) forms and
chip capacitors. Other parts on the chips include transformer core and J-leads. The primary step
in the manufacture of V.I Chips is the mounting of the SMDs on the PCBs which is done on the
SMT line. At the end of the SMT line, the boards undergo a cleaning process to remove solder
flux residues. The subsequent steps are transformer core attach, electrical testing, underfilling,
molding, marking and PCB dicing, J-lead attach and final testing. The flowchart in Fig. 2.1
shows the different steps, with the main steps being briefly described in Sections 2.2.1 to 2.2.7.
Fig. 2.1: Flowchart of VI Chip Manufacturing Process
19
2.2.1 SMT Line
SMT is a modem technology used to construct electronic circuits by directly positioning
and mounting the components onto the surface of the PCB. It involves a series of steps in which
solder paste is directly applied onto the PCB and then the components are mounted and the
boards reflowed in a reflow oven to effect the soldering. The flowchart in Fig. 2.2 shows the
different processes within the SMT line.
Fig. 2.2 SMT Process Flow
20
The different types of processes showed in the flowchart are explained in detail below.
2.2.1.1 Screen Printing
The first step in SMT is screen printing involves the use of a stencil with apertures to allow
application of solder paste on the PCB only at required positions. Application of solder paste is
done with the help of a squeegee blade which applies the paste over the stencil and finally onto
the PCB. The solder paste contains the solder alloy and flux. The flux is used mainly to:
e
Prevent oxidation of the solder alloy during reflow,
e
Act as a cleaning agent at the solder-component interface, and,
e
Provide the necessary tack for the components to stay at their locations till soldering
occurs.
2.2.1.2 Solder Ball Attach
This process involves placing spheres of solder alloy, known as solder balls, at certain
locations on the PCB. The solder balls are small, having a diameter of approximately 0.5 mm.
The solder balls are used only on the bottom side of the PCB where a BGA forms the J-lead
attachment points.
2.2.1.3 Component Mounting
In this step, SMD components from a reel are mounted on the solder paste locations on the
board. The components are placed precisely at their locations by the machine heads which
remove the components from the reel and place them over their designated positions using the
help of fiduciary markers on the board.
2.2.1.4 Reflow
After component mounting, the next step is the soldering process. Soldering is done by
making the PCB go through a reflow oven. The reflow line has different temperature zones
where maximum temperatures exceed 260'F (~127C). The high temperature partially melts the
solder alloy contained in the solder paste, making it come into direct contact with the component
leads. As the temperature reduces, the solder alloy begins to solidify, thus effecting the soldering.
The recent growth in use of lead-free solder pastes due to environmental regulations have led to
higher reflow temperatures, which cause flux cleaning problems [5]. It may also be noted that in
the manufacture of V.1 Chips, the bottom side of the PCB goes through reflow twice - once for
the bottom side and once for the top side. Post-reflow, the PCB is cleaned with deionized (DI)
water to remove any flux residues. The PCB cleaning process is explained in detail in Section
2.3.
2.2.2 Transformer Core Attach
The next step is attaching the transformer core at the center of each module on the PCB.
This core may be made of ferrite or other magnetic materials and plays the crucial role of
stepping up or down the voltage.
2.2.3 Underfilling
Due to a difference in the thermal expansion properties of the components and the PCB
substrate, there exists a risk of adding thermal strain on the solder joints of the components
during any thermal cycle, which may cause joint failure. Underfilling is the process of adding a
locking resin between the components and the PCB substrate so that the components are fixed in
place. Underfilling causes the thermal stress to act on the whole underfilled area, thereby
relieving the solder joints of the strain. The resin used is generally an epoxy material.
2.2.4 Molding
Molding is the process of introducing a molding material such as a thermoplastic or resin
over the PCB to package the components. During the process, the fluid molding material enters
all empty spaces on the PCB, packing all the components in place. Molding can be done by
compression molding, injection molding or transfer molding. The molding process is preceded
by a dehydration bake and plasma etching for better mold compound adhesion.
2.2.5 PCB Marking and Dicing
After molding, the PCB is marked using a laser and then diced into individual V.1 Chips
using a saw. Subsequently, the individual chips are cleaned by first spraying DI water and
isopropyl alcohol (IPA) and then cleaning using a brush. The cleaning is done to remove any
contaminants or oxides which may prevent proper J-lead adhesion.
2.2.6 J-lead Attach
In this step, J-leads are attached onto the BGA points on the bottom of the V.1 Chips. Jleads are specialized leads used to provide an interface between the V.1 Chip and the external
circuit. This is the last step in manufacturing.
2.2.7 Final Testing
After the V.1 Chips are made, the final step is the testing. At this stage electrical tests such
as high potential tests are performed. Thermal tests are also performed to test performance at
extremely high and extremely low temperatures.
2.3 PCB Cleaning Process
In Section 2.2, the process of PCB cleaning after SMT was briefly mentioned. This section
explains the cleaning process in detail, including why cleaning is done, alternative cleaning
methods and existing standards on cleaning.
2.3.1 Introduction
PCB cleaning is the process of removing solder flux residues and other stray particles from
the surface of PCB after the SMT process. The flux present in the solder paste reacts with the
metal oxide and forms metal salts [5] during the reflow process and prevents further oxidation of
the solder metal. The by-product of this reaction is the solder flux residue which gets trapped
beneath components and near the undersides of solder balls. During the cleaning process, this
residue is flushed out and dissolved by an aqueous (DI water) or semi-aqueous (DI water with
chemicals) solvent using external agitation [6].
2.3.2 Why Cleaning
The solder flux residue, which is trapped between the components and the PCB substrate
and also under the solder balls causes electro-migration. When PCBs and modules are subjected
to an external electric field, which in many cases involves large potential drops, the diffusing
flux residue particles get excited by the momentum transfer of conducting electrons in the
circuit. This leads to the particles being displaced from their positions. A problem may arise
when these particles cause bridging between two parts of a circuit, ultimately leading to a shortcircuit. This phenomenon is called electromigration [7]. Electromigration is one of the leading
causes for failure of V.1 chips. Another possible effect of flux residue presence is the improper
adhesion of the molding compound and J-leads. For proper adhesion to take place, the surface of
the PCB and BGA areas must be free of contaminants such as flux residue. Due to these
problems, effective cleaning of solder flux residue becomes imperative.
2.3.3 Factors Involved in Cleaning
The process of removing flux residue from the PCB board and its components depend on
the following factors [8]:
e
Agitation
e
Chemical Action
* Time and Temperature
" External Factors
2.3.3.1 Agitation
Agitation is the factor that loosens up the residue, forces water into low standoff areas and
forces the flux residue outside the components. The amount and type of agitation produced with
the wash solvent is completely dependent on the wash technique used. In the centrifuge based
water wash process currently in place, the agitation is produced by the rotation of container. The
different forms of agitation are explained in Section 2.3.5.1. If the agitation is insufficient, flux
residue remains and the board is not cleaned to desired levels.
2.3.3.2 Chemical Action
Although the flux residue is water soluble in nature, its dissolution can be increased by
using an alkaline chemical agent [6]. DI water is pH neutral so the surface tension and chemical
activity of the solvent is not altered while the use of alkaline solution or saponifier would reduce
decrease surface tension resulting in better flow which would dissolve the flux residue faster.
2.3.3.3 Time and Temperature
Time and temperature are two critical parameters that affect the effectiveness of the
cleaning process. The more time a product in exposed to agitation the cleaning is better.
Temperature influences cleaning by altering the surface tension of the solvent, altering the
solubility of flux residue, increasing the rate of reaction and/or by activating the chemical present
in the solvent.
2.3.3.4 External Factors Influencing Cleaning Process Performance
The other factors which are known to be responsible for ineffective cleaning include the
choice of the solder paste, reflow temperature and the architecture of the product being cleaned
[5]. The solder paste may have specific properties which may affect cleaning process. These
properties could be physical properties of the flux residue such as viscosity, water solubility, etc.,
chemical properties such as reactivity and corrosiveness or electrical properties such as
conductivity. Another major factor is the reflow temperature [5]. With the advent of lead-free
soldering, the temperature required for effective soldering has increased, leading to changes in
properties of the flux residue. One important factor is the amount of gap present between the
component and the PCB substrate, called standoff. Lower standoffs when in the order of microns
lead to less effective cleaning.
2.3.4 PCB Cleaning Process Specifications
Currently, the PCB cleaning process is carried out in two centrifugal water wash machines.
The current water wash process uses only DI water for the cleaning the PCBs. The cleaning
process occurs over three cycles namely the wash, rinse and the dry cycles each of which takes
approximately 5, 5 and 10 minutes respectively. All the three cycles are carried out in the same
machine and in the same centrifuge tank. Both washing and rinsing of the boards are done using
DI water only. Each machine has the capacity to carry two cartridges with 10 boards in each
cartridge. Thus the wash process is a batch type process consuming a total of 20 minutes for
washing, rinsing and drying a maximum of 20 boards at a time. These cartridges are suspended
using fixtures along the central axis of the centrifuge tank. The tank consists of nozzles
positioned vertically on either side of the tank. These two sets of nozzles are used for rinsing
during the rinse cycle.
2.3.5 Cleaning Methods
The semiconductor and allied industries have in the recent past been able to come up with
many alternate methods of cleaning with each method suited to a particular type of product
architecture. These different cleaning methods could be classified based on the nature of their
primary approach towards cleaning as either physical agitation or chemical action based
methods.
2.3.5.1 Agitation Methods
The three main methods which fall under this category are explained in detail below:
a) Centrifugal Cleaning
This method takes advantage of the agitation induced by the centrifugal force in a liquid
medium which could range from just plain DI water to chemical solutions containing surfactants
or solvents. The centrifugal washing process has been explained in detail in Section 2.3.4.
b) In line Cleaning
In line method of cleaning is a new development which uses water or a chemical solution
sprayed at a pressure through custom designed nozzles over the PCBs which continuously move
across a line through the machine. Recent advancements made in nozzle technologies by certain
companies have resulted in further improvement of cleaning effectiveness. Though the
throughput rates, the physical agitation levels and hence the cleaning effectiveness in an in-line
machine are higher especially when compared to the centrifugal washing machine, these
machines are characterized by high cost as well as high wastage of DI water or chemical solution
[9].
c) Ultrasonic Cleaning
This method uses the physical agitation made possible by the superimposition of the
ultrasonic waves originating from a transducer, inside a liquid medium. The superimposed waves
produce a cavitation effect where vacuum bubbles are constantly formed and undergo implosion.
This agitation effect in a chemical solution medium has been found to give encouraging cleaning
results. This method has been claimed to have mildly destructive effects on the minute SMDs.
2.3.5.2 Chemical Methods
Many commercial companies have introduced different chemicals that achieve high
levels of cleanliness. Most of these chemicals are either surfactants or solvents that tend to
reduce the surface tension of DI water so that it is able to reach the minute pockets and the
remotely accessible areas of the product. These chemicals can be used in any of the machines
described in Section 2.3.5.1 in order to provide improved cleaning results.
2.3.6 Cleaning Process Control and Testing
Cleanliness can be defined using many different tests. Tests are mainly of two types - visual and
electrochemical. Visual tests include removing components and visually observing the presence
of flux residues preferably under a microscope, while the electrochemical tests measure chemical
and electrical properties to determine cleanliness.
Though both ionic and non-ionic contaminants are found on the surface of the board, the ionic
contaminants are of particular interest since they have the potential to cause electro-migration
and similar other problems [10]. The following are some of the more commonly used
electrochemical tests: ionic contamination tests, ion chromatography (IC) tests, surface insulation
resistivity (SIR) tests, Fourier transform infra-red (FTIR) spectroscopy and visual inspection
tests [6].
At Vicor, the ionic contamination test is regularly carried out on the products coming out
of the washing process and the results of the test are plotted on control charts which are then
used for monitoring the process. On reviewing the test results and the control charts, it was
observed that the ionic contamination levels do not cross specification limits, as described by
industry standards. This occurs even though flux residues have been frequently found on the
board surface and underneath components. This shows that current process control tests are
inadequate.
2.4 Software used for Manufacturing System Analysis
The software that has been used for performing the manufacturing system analysis is 'ARENA'
simulation software from Rockwell Automation. This software was chosen because it is one of
the most preferred discrete simulation softwares in manufacturing industries and more
importantly because this software, is generally used at Vicor Corporation. Hence the software
model of the SMT line developed during the course of this project could be used in future at the
company as well. A snapshot of the screen is shown in Fig. 2.3.
a ArenaStudent- (Exasting31
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MODEL OF THE S1 4T LINE
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Hold
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Pickup ReadWrite
Release
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Seize
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2. The Bottomside Screen printing & SMD placen ent processes
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Fig. 2.3 Snapshot of the ARENA Simulation software screen.
2.4.1 Explanation of the Basic Elements of the ARENA Software
The models built using ARENA software are similar to flowchart representations of the
assembly line. Just like a flowchart has different symbols to represent the different types of
processes, ARENA too has different elements which should be used to build a model. An
explanation of the basic elements used in the software is given in Table 2.1 [11].
Table 2.1: Explanation of the basic elements of the ARENA software [11]
Name of
Element
Example
Function of the Element
It indicates that a basic process happening at a machine; It can also
Process
Sub-model
PrcBottom
Prntn
side
Process
Pull from operator
have a queue associated with it wherein the parts line up before being
processed. Process time, variability of the process time, etc. are some of
the inputs that can be entered.
A sub-model can used to represent a group of machines/ elements that
either act together as a single entity or have different purposes. A submodel is used whenever there is a need to de-clutter the model or break
a larger line into smaller parts.
An entity refers to the part/product that flows through the line. In our
case, an entity could either be a single panel or a single chip package.
An entity is not visible on the main work area of ARENA screen but is
Entity
available on the side bar.
SezSeize 38~
A 'Seize' element is used to take control of a 'process' or the resource
or the machine performing the process. This element generally used in
conditional operating situations e.g. when a machine has to wait until
the next machine is free.
Release
Hold
Release 41
9lHold
8
A 'Release' element performs the opposite function of the 'Seize' i.e. it
releases the control over a machine or a resource, more often after a
particular condition is satisfied.
A 'Hold' element is usually used in case of conditional operating
situations wherein it holds the control or the entity from going forward
until a particular condition has been satisfied.
Table 2.1 (Cont.d): Explanation of the basic elements of the ARENA software
Nae of
Example
Function of the Element
A 'Batch' element can be used to combine several entities into one
entity before or after a process. This is useful in our case, especially in
the centrifugal washing machine, where a batch of 20 boards is
simultaneously washed
Batch
Separate
A 'Separate' element is used to perform the exact opposite function of
that of a 'Batch'. It can be either used for splitting an existing batch or
in cases like where the panel is divided into 16 chip packages.
onvey Convey
A 'Convey' can be used to simulate conveying/ transferring options
from one machine to another machine or within a machine. Parameters
like conveyor length, speed, destination station would have to be
specified.
4
Route
Station
Creae
A 'Route' element is used to transfer the entities instantaneously to a
destination station which is indicated by a similar element known as
'Station'
Route 23
A 'Station' element is generally used in conjunction with the transfer
elements like 'Convey' and 'Route' to specify the origin and the
'destination' stations.
staton
[reate
A 'Create' element is used to introduce entities (like boards) into the
line and keep count of it.
8J
0
Dispose
DispoeDspos
A 'Dispose' element takes the entities out of the line and records
different statistics like cycle time, etc.
Table 2.1 (Cont.d): Explanation of the basic elements of the ARENA software
Name of
Element
Example
Function of the Element
Assign
Assign 4
An 'Assign' element is used to assign a code or an identifying name to
the entity passing through it. This is useful especially to keep track of
entities.
ecord Record
12
A 'Record' element records the details of the entity that has been
assigned a code. For example, it can be used to calculate the average
total amount of time that an entity spends in the line.
2.4.2 Building a Model using ARENA Software
Prior to building a model on the software, information about the different processes in the line,
the process sequence, the number of assembly stations, the process or the assembly times, the
number and the location of the buffers, individual buffer capacities, type of flow (pull or push),
failure rates of the machine, machine uptime and downtime and setup times has to be gathered.
The information is then used to build the model by incorporating the appropriate elements as
explained in the Table 2.1.
The screen that appears when the software is opened has three panes as shown in Fig 2.3. The
pane on the upper right corner is the main workspace area and displays the model that is being
built. The elements, examples of which have been described in the Table 2.1, are displayed on
the left pane. When a particular element has to be incorporated, it has to be selected from this
pane and dragged on to the main workspace area. The details about the element, for example, the
process times, the failure rates, etc. can be entered in the bottom right pane. If the line to be
simulated is too long, it is advisable to split the model into different subdivisions and connect
them with the help of 'Route' and 'Station' elements.
2.4.3 Simulating the Model
After the model is built, debugging can be performed by going to Run
->
Review Errors in the
main toolbar. Once the model is error-free, parameters like the length of time for which it has to
be simulated (run-length) and the animation speed will have to be specified by going to Run 4
Setup in the main toolbar. It has to be noted that though the software can give the results
instantaneously, it is preferable to run it at a slow animation speed in order to observe what
actually happens to the entities as they enter the line. This also would enable easy detection of
any inadvertent errors.
Once the simulation is complete, the software generally outputs the results in a report format.
The report has five major subdivisions as follows
*
Entity
*
Queue
*
Resource
*
System
*
User defined.
Entity subdivision gives information about the average and the maximum value-added times,
waiting times, transfer times, etc. of the entities when they pass through the line. The Queue
subdivision in general gives data about the average waiting time at every station. The Resource
subdivision supplies information about the resource utilization rates. The System subdivision
gives information about the number of entities that enter and exit from the system and also about
the total time that a single entity takes to pass through the entire line.
33
Chapter 3 - Problem Description
3.1 Problem Statement
The DI water based centrifugal washing machine is responsible of removing all flux
residues and other contaminants from the boards. However over a period of time it was found
that repeated visual inspection tests showed the presence of flux residue on the boards even after
being washed. The samples of such incidences of flux residues on the surface of the boards are
shown in Fig. 3.1 and in Fig. 3.2.
Flux residue
Fig. 3.1 Presence of flux residue under a BGA-FET [121
Flux residue
Fig. 3.2 Presence of flux residue under chip capacitor array [12]
The presence of flux residues can give rise to problems. The important among them are
electromigration,
poor
mold
compound
adhesion
and
improper
J-lead
attachment.
Electromigration is a phenomenon wherein the flux residues may migrate to nearby places and
end up bridging adjacent circuits or electrodes which ultimately causes shorting. Molding, which
is a process that follows the PCB cleaning, is also affected by the presence of flux residue. Flux
residue on the surface of the board hinders the entry of the mold compound and also reduces the
adhesion between the mold compound and the board. Similarly the presence of flux residue is
also suspected to interfere with the attachment of J-leads. Improperly attached and misaligned Jleads are one of the leading causes of component rejection at Vicor. All these problems result in
an increase in failure rates. With the company's objective of maximizing product yield and
attaining MSL levels of 4 or lower, removing flux residue completely from the boards has
become an important priority.
3.1.1 Areas of Residue Incidence on PCB
The inspection of products revealed the presence of flux residue in nearly all the inspected
products mostly around the solder joints and under certain components.
3.1.1.1 Vicinity of Solder Joints
Once the SMDs were pried off from the surface of the boards, it is possible to observe white
colored flux residue on the surface of the PCB board.
As shown in Fig. 3.3, the residues
appeared as a random scattering of white colored particles in clear areas or as rings surrounding
solder balls. Further inspection proved that they were water-soluble flux residues which were left
behind due to ineffective cleaning.
Flux residue
Flux residue
Fig.3.3 Flux residue on and near solder joints of the leads of MLP FET [121
3.1.1.2 Under "low standoff' Components
The term 'standoff refers to the distance between the bottom surface of surface mount
components and the top surface of the PCB board. Certain components such as '1210 chip
capacitors' and 'MLP FETs' have standoffs as low as 0.05 mm. Inspection revealed that
components with low standoffs were the most significant sites in terms of cleaning effectiveness
and nearly all pried-off low-standoff components showed the presence of flux residue both on
the surface of the PCB board and also on the underside of the component. The right side of the
Fig. 3.4 shows the presence of flux residue on the surface of the PCB underneath the MLP FET
component after it was pried off while the left side of the same figure shows the board before the
component was pried off. Similarly flux residues underneath 1210 chip capacitor are shown in
Fig. 3.5.
Flux residue
Fig. 3.4 Flux reside on MLP-FET footprint [121
Fig 3.5 Flux reside on 1210 chip capacitor footprint [12]
3.1.2 Root Cause Hypotheses
In order to tackle this problem, the root causes for the problem have to be first identified. Pranav
Jain [3], in his work titled, "Root cause analysis of solder flux residue incidence in the
manufacture of electronic power modules" has explained in detail about the different root causes
hypotheses as well as the methodology to test them. The following are hypotheses for what could
be the root causes for the incidence of flux residues.
3.1.2.1 Hypothesis - I: Strong Flux Residue Adhesion
The first premise about the large amount of flux residue incidence under components is that
the adhesive force between the flux residue and the surface under the components is high. If this
force is high enough, it could prevent the water or cleaning solution from cleaning and dissolving
the flux residue. One reason could be that the properties of the solder paste used might increase
the flux residue adhesion. Another reason could be that the resulting residue is insoluble in the
water being used in the process.
3.1.2.2 Hypothesis -
II: Insufficient Physical Agitation & Component
Architectural Causes
The fluid flow dynamics are defined by the cleaning method employed. As described in the
Chapter 2, the current cleaning method uses the centrifugal agitation to force water into the
component standoffs for cleaning. However, if the agitation is not enough, the water cannot enter
the standoffs. This led to the hypothesis that the water does not reach the residue with enough
agitation in the current process.
Another related sub reason for the ineffectiveness in the cleaning process can be
hypothesized as due to surface tension effects. The current water wash process uses plain DI
water to clean the boards. However, plain DI water has a high surface tension, which does not
allow it to enter the low standoffs and hence it results in insufficient agitation which in turn fails
to effectively clean the residues underneath components. This would mean that lowering the
surface tension of the cleaning medium could result in better cleaning.
During the observation stage, it was primarily seen that flux residue found under certain
components was always more than under other components. This gave rise to a premise that
component design and PCB architecture could be a possible cause for the problem. An example
would be that of the MLP FET and the 1210 chip capacitors which tend to have more flux
residues underneath them.
3.1.2.3 Hypothesis - III: Strong Flux Residue Adhesion, Insufficient Physical
Agitation & Component Architectural Causes
Hypothesis III can be interpreted as a sort of combination of the Hypotheses I & II
wherein it states that both strong flux residue adhesion and insufficient physical agitation of
water in low standoff areas are said to be responsible for poor cleaning.
3.1.2.4 Hypothesis IV: Twice Reflow causes Ineffective Cleaning
Another observation was that burnt-in brown residues were observed under the MLP FETs
on the bottom side. These may be due to the fact that the bottom side goes through reflow twice;
first for the bottom side and second for the top side. It had been highlighted earlier that the use of
lead-free solder pastes had led to higher reflow temperatures. Thus, higher temperatures
combined with twice reflow may cause burning-in and settling of flux residues which become
difficult to remove.
3.2 Project Objectives
The project aims to identify the root causes behind the ineffective cleaning by hypothesizing
them and by conducting experiments to test the hypotheses. After identifying the root causes, the
different factors that can effectively deal with the root causes as well as the effect of every factor
would be determined. Based on the gathered information, alternative cleaning solutions which
include process and machine changes will be proposed.
As a part of this project, it was also desired to conduct a throughput analysis to assess the impact
of the process and the flow changes that the company would have to make in order to improve
the existing cleaning process. Parameters like the throughput rate, cycle time, work in progress
(WIP) inventory and the waiting time would change in the event of any change in any of the
processes on the SMT line. Quantifying the changes in the above said parameters with the help
of an appropriate software would help in assessing the net benefit of the change from a
'manufacturing systems' perspective. Similarly, it would also be desirable to perform a cost
analysis on all the different process-improvement alternatives that have been proposed in this
project. This cost analysis would definitely aid in choosing a suitable alternative. Thus the
project objectives could be summarized as follows.
" Identifying the root causes of the flux residue problem.
e
Identifying the main factors involved in the cleaning process.
* Proposing alternate methods of cleaning.
*
Performing a manufacturing systems analysis on the SMT line.
e
Assessing the impact of the different alternate cleaning methods on the system's
performance.
e
Perform a cost analysis on the different alternative cleaning methods.
e
Choose, qualify and implement the most optimized alternative.
40
Chapter 4 - Literature Review
4.1 Introduction
This section provides a brief summary of the work carried out by Pranav Jain [3] and Ishan
Mukherjee [4] in the development of an alternative cleaning process for the surface mounted
PCBs. Pranav Jain [3], in his work titled, "Root cause analysis of solder flux residue incidence in
the manufacture of electronic power modules" explains not only about the different root cause
hypotheses for ineffective cleaning but also about the different tests that were conducted to test
the hypotheses. Based on the results of those tests as shown in Table A in Appendix A, the
hypotheses were either accepted or rejected. The accepted hypotheses were then used in
identifying the most appropriate cleaning method and conditions. Ishan Mukherjee [4]'s work,
"Cleaning Process Development and Optimization in the Surface Mount Assembly Line of
Power Modules" deals with the optimization of the cleaning process and the experiments that
were conducted for that purpose are shown in Table B in Appendix B. Due to the highly
interlinked nature of the works of both Pranav Jain [3] and Ishan Mukherjee [4], the experiment
methodology and the inspection methodology adopted by them are the same and are explained in
Section 4.1.1. The results from their individual studies are explained in Section 4.1.2 and in
Section 4.1.3 respectively. Also some of the trends that were observed during the experiments
are explained in Section 4.1.4. These trends and observations form the basis for the design
changes that have been recommended in Chapter 7.
4.1.1 Experiments Design and Methodology
The experiments intended to test each of the hypotheses as explained in Section 3.1.2, are shown
in the Table A in Appendix A. During the experiments, the boards that were produced in the
SMT line were taken out of the line after the top-side reflow and put into the soak/ultrasonic bath
for performing the experiments at various combinations of temperature, time, chemical
concentration and level of physical agitation. Two types of chemicals namely Chemical A and
Chemical B were used during the experiments. After the experiments were performed, the boards
were washed in the centrifugal water wash machine and then were taken for inspection. A
diagrammatic representation of the process flow followed for these experiments is shown in Fig.
4.1.
Proposed soak!
Top side
relwultrasonic
reflow
cycle
Regular
Water wash
process
Baking in
Ove
Oven
Visual
L Isetio
spection
Fig. 4.1 Process Flow followed in Experiments
After the experiments were performed on the floor of the facility at Vicor, the boards were taken
to lab and inspected under the microscope. Nine components (including BGA FETs and the 0603
chip capacitors) found on the top side and eleven components (including the MLP FETs and the
1210 chip capacitors) found on the bottom side in each of the chip packages found on the board
were pried off and observed. The footprints of these components on the surface of the boards
were also observed. The grading was made on a 1 - 5 scale where 5 represented the cleanliest
and 1 represented the dirtiest. A sample grading scheme is shown in the Appendix C. The results
of the grading are also given in Table A in Appendix A. The average cleanliness score at the
footprints of all the pried components is given for every experiment. But during the experiments
it was found that certain critical components like the MLP FET and the 1210 chip capacitors
consistently had flux residues. Hence separate indices such as 'critical footprint score' and
'critical component score' were coined which gave the average cleaning scores at the footprints
and beneath the critical components like MLP FET and 1210 chip capacitors only. A discussion
of the results of these hypotheses-testing experiments is given in Section 4.1.2.
These results were then used by Ishan Mukherjee [4] to design experiments that could help in
optimization. The hypothesis-testing experiments clearly showed that better physical agitation
(e.g. ultrasonic agitation) when aided by the chemicals (especially Chemical B) gave the best
cleanliness results. The optimization experiments that were conducted to identify the optimum
parameters when ultrasonic agitation was used with Chemical B are shown in Table B in
Appendix B. Since the currently employed cleaning process at the company used only
centrifugal agitation instead of ultrasonic agitation, it was desired to find out what would happen
when centrifugal form of agitation was combined with the effect provided by the chemicals.
Hence in some of Ishan Mukherjee's experiments [4] the boards were washed in the centrifugal
machine with varying levels of Chemical B concentration. Also some of the important
hypothesis-testing experiments were repeated in order to verify the repeatability of such results.
An experiment was also conducted to determine the significance of the temperature factor by
increasing the temperature to a higher level but keeping all the other factors constant. The results
of these optimization experiments are discussed in Section 4.1.3
4.1.2 Results of Hypothesis-Testing Experiments
These results as shown in Table A in Appendix A were then used qualitatively by Pranav Jain [3]
in his work to accept or reject the different hypotheses.
4.1.2.1 Hypothesis - I
According to hypothesis I, strong flux residue adhesion was the principal cause for ineffective
cleaning. The results of these experiments indicate that though strong flux residue adhesion was
counteracted either by using chemicals from different vendors or by allowing sufficient soak
time, the cleanliness scores were not as improved as expected. Hence we can safely contend that
this hypothesis is not true.
4.1.2.2 Hypothesis - 1
Hypothesis II states that there is insufficient physical agitation. The results of these experiments
show a vast improvement over existing process but still have room for more improvement.
Hence we can conclude that physical agitation is a significant factor but it alone is not sufficient.
4.1.2.3 Hypothesis - III
Hypothesis III states that both strong flux residue adhesion and insufficient physical agitation are
together responsible for the cleaning ineffectiveness. These experiments gave the best results on
all the three parameters and hence we can conclude that this hypothesis is true.
4.1.2.4 Hypothesis - IV
The experiments testing this hypothesis gave the worst results among all the experiments and
hence we can safely reject this hypothesis.
4.1.3 Results of Optimization Experiments
4.1.3.1 Ultrasonic Optimization Results
The results of the optimization experiments as shown in Table B in Appendix B were then
analyzed using statistical process control software by Ishan Mukherjee [4] to identify the
optimum parameters for the ultrasonic cleaning method which uses chemicals. It was found that
5% concentration of Chemical B with 7 minutes of washing time at 600C could give the most
optimum performance.
4.1.3.2 Effect of Different Factors
Ishan Mukherjee [4] also analyzed the effect of different factors like type and level of chemical
concentration, type and level of physical agitation, time and temperature on the cleanliness
scores. The study revealed that physical agitation had the most prominent effect among all the
factors and that the ultrasonic form of agitation was the best among the different forms of
physical agitation. Chemical concentration was the next most important factor with an increase
in chemical concentration producing favorable results. Chemical B was the better of the two
chemicals. The effect of time factor decreased with increasing periods of time i.e. time was a
significant factor during shorter periods of time but its effect was not so significant for longer
periods of time. The effect of temperature was negligent beyond 60 0 C.
4.1.3.3 Results of Other Experiments
The centrifugal washer experiments when used with varying chemical concentrations gave much
better results as shown in Table B in Appendix B, compared to the existing process but however
were slightly lesser than the ultrasonic form of physical agitation even when all the other factors
remained the same. The experiments also showed that the results improved with increasing
chemical concentrations.
These experiments verified the repeatability of the results with most of the repeatability
experiments of Phase II falling within + 5% limit of the results of the corresponding experiments
in Phase I. This verified the robustness of the inspection methodology. The temperature study
indicated that the temperature was an insignificant factor atleast within the maximum allowed
temperature of 70*C.
4.1.4 Common Areas of Flux Residue Incidence
The most prominent trend that was noted during the inspection that certain components were
found to be particularly very tough to clean whereas many other components could be cleaned
easily. Components namely the MLP FET and the 1210 chip capacitors found on the bottom-side
of the board were found to be difficult to clean whereas most topside components like the BGA
FETs were relatively much easier to clean i.e. even lower concentrations of chemicals or lower
times or centrifugal agitation were able to completely clean components like BGA FET but not
the MLP FET or the 1210 chip capacitors. Hence the concept of 'overall cleanliness score' for a
board became irrelevant and a new concept of 'critical component cleanliness score' which took
into account the level of cleanliness of only the MLP FET and the 1210 chip capacitors, had to
be termed. Fig 4.2 shows the MLP FET and BGA FET at the end of 'soak in plain DI water for 5
mins' and the 'ultrasonic for 10 mins in plain DI water' experiments.
Soak in plain DI water for 5 mins:
Flux residue
P FET
I|BAFET
Ultrasonic in plain DI water for 10 mins:
Flux residue
MLP FET
||BGA
Fig. 4.2: Common areas of flux incidence
FET
In Fig. 4.2, both BGA FET and MLP FET had flux residues at the end of soak experiment but
when ultrasonic agitation is introduced, the BGA FET appears to have cleaned but the MLP FET
still has burnt-in flux residues left on it despite increasing agitation.
4.1.6 Influence of Product Architecture on Cleanliness
Similar to the above observation, it was also found out that there are certain product architecture
issues that impact cleaning. For example, in the 1210 chip capacitor which is a component that is
difficult to clean, it was discovered that the flux residue presence is much more wherever there is
a copper pad right next to its leg. This was observed across all the boards irrespective of the
chemical concentration or the physical agitation used or the cleaning time provided when they
were being cleaned.
Flux residue found
only on copper pad
Flux residue is not
found on this substrate
CoOPer Pad
Leg of the component
Fig. 4.3: Image of 1210 chip capacitor
From the above Fig. 4.3, it can be seen that the grey colored substrate next to the copper pad
does not have any flux residue at the same time when the copper pad adjacent to it has greyish
flux residues. The reason is that when a copper layer is added over the substrate in a PCB, it
decreases the effective standoff of the component and hence it makes it difficult to clean. During
subsequent discussion with the company's design team, it was found that these copper pads
projecting from the leg of the component are unnecessary and that they do not perform any
function and hence they can be removed in order to improve cleaning.
4.2 Review of Previous Work
4.2.1 Work done at Vicor
Eva McDermott and Hardie Macauley [13] had in their work at Vicor Corporation titled "Water
wash process optimization" explored the impact of three different solder paste types, the effect of
water wash temperature and the effect of the post-reflow wait time on the cleanliness of the
boards being washed through the existing centrifugal machine. They also did a 'Fixture Loading
Study' wherein the effect of the board location in the fixture when placed inside the centrifugal
machine was studied. The results of the experiments conducted as part of the study showed that
none of the above mentioned factors significantly affected the cleanliness of the boards.
However the solder paste study yielded valuable information on the consistency of the solder
paste material which was then used to select the solder paste among the three options.
4.2.2 Work done by Vendor A
Vendor A performed many series of experiments on the boards that were sent to them by Vicor
using their chemical (Chemical A) across three different machines (ultrasonic machine,
centrifugal machine and the in-line machine) at different levels of chemical concentration, time
and temperature. Vendor A strongly recommended the use of the In - line machine at 15%
concentration of Chemical A and at a total time of 10 minutes and a temperature of 1504F [12].
4.2.3 Work done by Vendor B
Vendor B conducted different phases of experiments, experimenting with different levels of
concentration of their chemical (Chemical B) in the centrifugal machine at different temperatures
and time levels. Vendor B report recommended the use of 7% Chemical B solution in the
centrifugal machine with the same values for time and temperature as the existing process across
the three cycles namely the wash, rinse and dry cycles [14].
48
Chapter 5 - Software Model of the SMT Line
5.1 Introduction
This chapter explains in detail about the software model that was developed for simulating the
SMT line. The basics of the ARENA software which was used for building the model are
explained in Chapter 2. It is necessary to gather data on the process sequence and individual
process times before modeling the line. The process sequence of the SMT line is given in Section
5.2 while the process times required by the different processes are given in Section 5.3.
The following were some of the important assumptions and considerations:
e
The product/entity that was considered during modeling was the same product on which
Pranav Jain [3] and Ishan Mukherjee [4] had performed their experiments. This is important
especially since different products might take different periods of time to undergo the same
process on the same line.
e
In the software, one board is considered as one entity. It has to be noted that each board has
16 subdivisions known as chip packages.
" Only the SMT line has been simulated.
e
The SMT line is a 'pull' type of line i.e. in such a line, a machine does not start processing an
entity until its succeeding machine accepts the entity that it has just produced. For this to
happen, the succeeding machine has to be free. So the current machine waits until the
succeeding machine is free before it begins to process.
5.2 Process Sequence in the SMT Line
The following flowchart indicates the process flow in the SMT line.
Bottom Side Solder Paste Printing
Bottom side paste inspection
Solder ball attach
Bottom side component mounting
Bottom Side Solder Reflow
Bottom Side Inspection
Store in Stacker & Invert
Tpside solder paste printing
I
(
Top side solder paste inspection
1-1-111-1-11--l-, 7 -- _"----,_,- .- I
Top side component mounting -1
Top side component mounting -2
a
L
L
F
Top solder reflow
Top side Inspection
PCB Cleaning
Fig. 5.1 Process Sequence in the SMT line
50
5.3 Process Times
The results of the time study analysis that was conducted at Vicor [15] for the product under
consideration are given in Table 5.1. The times shown below are the average process times for
every process. The machines used for every process are also given in the same table.
Table 5.1: Average Process times on the SMT line [15]
Process
Time
Machine/ Operator
Process Step
No. of boards
Otpte
Outputted
a single
(Seconds) during
operation
Bottom Side Solder
DEK bottom side Screen printer
42
1
Paste Printing
Bottom side paste
inspection
Solder ball attach
Koh Young Machine
22
1
Shibuya BGA Attach Machine
44
1
Bottom side component
Bottom side Universal
Module A
34
1
mounting
Surface Mount Machine
Module B
52
1
350
16
Human Operator
FIFO Stacker
10
187
1
20
DEK top side Screen printer
45
1
Koh Young Machine
27
1
Module A
49
1
Module B
56
1
Module A
43
1
Module B
41
1
Bottom Side Solder
Reflow_____________
Bottom Side Inspection
Store in Stacker &
Invert
Top side solder paste
printing
Top side solder paste
inspection
Top side component
Topusieicmpoe
mounting -1
Top side component
mounting - 2
BTU Pyramax Bottom side Reflow Oven
__
Top side Universal
Surface Mount
Machine - 1
Top side Universal
Surface Mount
Machine -2
Top solder reflow
BTU Pyramax Top side Reflow Oven
351
16
Top side Inspection
Human Operator
10
1
PCB Cleaning
Centrifugal water wash machine
1,202
20
2,565
N.A
Total Time in the line
5.4 SMT Line Model in ARENA
Since the SMT line consists of many processes, it is advisable to split the line into several
subdivisions and these subdivisions could be modeled individually. Finally these subdivisions
could be linked together to get the entire model of the SMT line. Such splitting into smaller
subdivisions facilitates better understanding, better visualization of the line and promotes easier
debugging of problems in the model. The SMT line was split into six smaller subdivisions which
are given below:
.
Initialization of the model
.
The Bottom side screen printing and SMD placement processes
.
The Bottom side reflow process
.
The Top side screen printing and SMD placement processes
.
The Top side reflow process
.
The cleaning and allied processes
Each of these subdivisions is explained in the sections 5.4.1 to 5.4.6 and the models that were
developed to represent the subdivisions are also shown. Reviewing the basics of the software
especially the basic functions of the element types as explained in Chapter 2 is essential for
better understanding of the model.
5.4.1 Initialization of the Model
'Initialization of the model' subdivision is a vital part in the model. In this subdivision, as shown
in Fig 5.3, the 'Create' element named 'Boards Enter the line' has been used to introduce the
entities into the line. An 'Assign' element named 'Assigning Entities' has been used to assign a
code to every entity that enters the line which enables easy tracking of entities. The 'Assign'
element was instructed to especially keep track of the total time that an entity spends in the entire
line. The next element in the model is the 'Seize' element named 'DEK Bottom side printer is
seized' which checks if the DEK Bottom side printer is free. (It has to be noted that the DEK
bottom side printer performs the first operation in the line namely that of the bottom side screen
printing). The 'Separate' element named 'Separating the entities' that follows the 'Seize'
element has been used in the model to separate the entities and send them forward into the line
only if DEK bottom side printer is free or send them backward if it is not free. The next element
is the 'Route' element named 'Route to 2' which transfers the entities that successfully come out
of the 'Separate' element into the second subdivision i.e. The Bottom side screen printing and
SMD placement processes.
Fig. 5.2: Initialization of the model
5.4.2 The Bottom side Screen Printing and SMD Placement
Processes
The list of processes that were considered in the subdivision named 'The Bottom side screen
printing and SMD placement processes' are shown in the flowchart below.
Bottom Side Solder Paste Printing
Bottom side paste inspection
Solder ball attach
Bottom side component mounting
Fig. 5.3: Bottom side screen printing and SMD placement processes flowchart
The model that was developed for this subdivision is shown in Fig. 5.4. A 'Station' element
named 'Entering 2' has been used to receive the entities sent from the previous subdivision. This
element then sends the entities to the 'Process' element named 'DEK Bottom side printing
process' which performs the process of 'Bottom side solder paste printing.' The next element is a
sub-model named 'Pull from Koh Young Bottom Inspection' which pulls the entity only if the
succeeding 'Koh Young Bottom Inspection' machine is free. How a sub-model such as 'Pull
from Koh Young Bottom Inspection' performs the pull functionality in the model is explained in
detail in the Subsection 5.4.2.1. 'Koh Young Bottom Inspection' is a 'Process' element which
performs the operation of 'Bottom side paste inspection'. The 'Pull from Shibuya' sub-model
pulls entities from the 'Koh Young Bottom Inspection' element only if the Shibuya machine 1 is
free. The 'Shibuya machine 1' element performs the process of 'Solder Ball Attach'. Similarly
the 'Pull from Bottom Universal Module A' and the 'Pull from Bottom Universal Module B'
sub-models pull the entity into Module A and Module B respectively only if they are free. It has
to be noted that 'Bottom side Universal Surface Mount Machine' has two modules namely
Module A and Module B as shown in Table 5.1 and both perform the same process of 'Bottom
54
side component mounting'. Thus all the processes represented in the flowchart in Fig 5.3 have
been included in the model. The 'Pull from Stacker' then checks the Stacker's status and outputs
the entities through the 'Route' element named 'Route to 3.'
2. The Bottomside Screen printing & SMD placement processes
Pull fromBDtlmUniversal
Rulto3
Pull forn Sacker
Botue
achine Mbdule B
Fig. 5.4: Bottom side screen printing and SMD placement processes model
5.4.2.1 Explanation of the 'Pull' Sub-model
Since the SMT line is a 'pull' line, sub-models have been used in order to achieve the
functionality of a pull model. A 'pull from machinename' sub-model (e.g. 'Pull from Shibuya'
sub-model in Fig.5.4a) checks whether the succeeding machine is free and allows the current
machine to operate only when the succeeding machine has received the entity that the current
machine has sent. By including such a sub-model before every major process, a 'pull' type of
line can be simulated. The following example shows how the 'pull' type of line can be created
with the help of a sub-model. Consider the following set of elements,
Koh YarU
_________
BCttornL~Pt
from Shibuya
Inspechnm
T
rrdin
________________
PI from Bct
0
Fig. 5.4a: Explanation of a subset of the model
LKiersa
fBotboi
0
The expanded versions of the two sub-models are shown in the Table 5.2.
Table 5.2: Expanded version of some of the sub-models
Let us consider the 'Shibuya machine 1' in Fig.5.4a. According to the principles of a 'pull' line,
the Shibuya machine-i should start operating only when the succeeding 'Bottom Universal
Machine' takes in the entity processed by it i.e. the Bottom Universal Machine should pull the
Shibuya Machine -1. In the 'Pull from Bottom Universal' sub-model as shown in Table 5.2, we
can see that the control initially passes through 'Bottom Universal is seized' element, which in
turn transfers the control to 'Bottom Universal Machine' and checks if it is free. If it is free,
control returns back to this sub-model and authorizes the 'Shibuya machine 1' to do the work
through 'Shibuya is Free' element. Thus the 'pull' model is simulated.
5.4.3 The Bottom side Reflow Process
The next subdivision is 'the bottom side reflow process.' The processes that form a part of this
subdivision are shown in the flowchart in Fig. 5.5.
Bottom Side Solder Reflow
Bottom Side Inspection
Fig. 5.5: The Bottom side reflow process flowchart
It has to be noted that the reflow process is essentially a continuous flow process where the entity
(i.e. the board) which is placed on the conveyor belt continuously passes through the reflow oven
and is subjected to different temperature zones. Since it is a continuous flow process, it has to be
represented using a 'Convey' element in the model. Fig. 5.6 shows the convey element named
'Reflow oven' which is used for representing the reflow process. But in the ARENA software,
the convention is that whenever a convey element is used, an 'Access'
element (named
'Accessing the conveyor in oven') has to be used to input entities in the conveyor. Similarly, an
'Exit' element named 'Exit from Conveyor 1' has been used to output entities out of the
conveyor. The 'Route to Post Reflow Inspection' is a 'Station' element which represents a
station on the conveyor where the inspection is performed. Finally the 'Route' element named
'Route to 4' is used to transfer entities to the next subdivision.
3. The Bottomside Reflow Process
Entenrg3
Arta
Fig. 5.6: The Bottom side reflow process model
57
5.4.4 The Top side Screen Printing and SMD Placement Processes
The next subdivision is the 'Top side screen printing and SMD placement processes' which
consists of the processes shown in the following flowchart in Fig. 5.7.
Store in Stacker &Invert
Top side solder paste printing
=Top side solder paste inspection
Top side component mounting -1
Top side component mounting - 2
Fig. 5.7: The Top side screen printing and SMD placement processes flowchart
As soon as the entities come from the previous subdivision, they enter a stacker where they are
allowed to cool. The stacker also acts as a first-in-first-out (FIFO) buffer. The remaining part of
this subdivision is similar to the 'Bottom side screen printing and SMD placement processes'
subdivision and hence its model is also similar as shown in Fig. 5.8.
Fig. 5.8: The Top side screen printing and SMD placement processes model
58
5.4.5 The Top side Reflow Process
The fifth and the penultimate subdivision is the 'Top side Reflow process' which consists of the
processes shown in the flowchart in Fig 5.9.
Top solder reflow
Top side Inspection
Fig. 5.9: The Top side reflow process flowchart
This subdivision is similar to the 'Bottom side reflow process' subdivision which has been
discussed in Section 5.4.3. The model developed for this subdivision too is similar to that of the
'Bottom side reflow process.' The model is shown in Fig. 5.10.
5. The Topside Reflow Process
AccesangRthe
Enle
nspectd
nExt
ng5 topsdefeno
fam oven
-
-
Roule10D6
Fig. 5.10: The Top side reflow process model
5.4.6 The Cleaning and Allied Processes
The final subdivision 'The cleaning and allied processes' is the part that the project is most
concerned with. Different alternative cleaning solutions have different versions of this
subdivision. The different alternatives differ in parameters like process sequence, process times
and batch-type-flow/single-piece-flow. These differences impact the output variables like
throughput rate, waiting time and utilization rates of the entire line. Each of these versions would
then be simulated and the results so generated would help in comparison of the alternative
solutions. The models of the different alternatives and their simulation results are explained in
detail in Chapter 6. However a model of the existing scenario in this subdivision is shown in Fig.
5.11. Currently only the PCB cleaning operation falls within this subdivision.
In the model, the 'Station' element named 'Enter Cleaning Area' receives the entities from the
previous subdivision which are then pulled into the washing machine by the 'Pull from Water
Wash Machine' sub-model. This sub-model also performs the task of batching the entities into
groups of 20 before sending them into the water wash machine since the currently used
centrifugal water wash machine takes in entities in batches of 20. The 'Process' element named
'Water Wash' performs the PCB cleaning process. The entities coming out of the water wash
machine are then taken into the 'Recording' submodel where the batch of 20 is split up and the
details of individual entities are recorded using the 'Record' element. The entities are then
disposed from the SMT line using the 'Dispose' element named 'Exiting the line into the oven.'
This marks the end of the SMT line.
Fig. 5.11: The Cleaning and Allied Processes Model
5.5 Conclusion
All the individual models of the subdivisions which have already been linked together through
the use of 'Route' and 'Station' elements, can now be clubbed together to form a model of the
entire SMT line as shown below in Fig 5.12.
MODEL OF THE SMT LINE
1. Initialization of the model
nels enterthe i o
Atsinineentity
sidepnting &-
SMDgpa
rocesses
2. The Bottomnside Screen printing & SMVD placement processes
3. The Bottomnside Reflow Process
or
ovencr
Fig. 5.12: Model of the SMT line
4. The Topside Screen printing & SMD placement processes
5. The Topside Ref low Process
ovenn
and Allied Processes
Fig. 5.12: Model of the SMT line (Cont.d)
This model was then used in simulating the different scenarios that result when different
alternative cleaning solutions were used. The results of the simulations are discussed in Chapter
6.
63
Chapter 6 - Results and Discussions
6.1 Manufacturing System Analysis Results
Manufacturing system analysis was performed using ARENA software with the help of the basic
model that was built as explained in Chapter 5. The basic model represents the existing scenario
while different scenarios were simulated by creating slightly different versions of the final part in
the basic model (i.e. the cleaning and the allied processes subdivision of the model). In Sections
6.1.1 to 6.1.5, each of the scenarios is first introduced and the modification made in the model is
then highlighted and finally the results of the simulation are displayed.
The simulation results can be obtained by 'running' the model on the ARENA software as
explained in detail in Section 2.4.3. The models can simulated for a given length of time and the
results obtained through simulation like throughput, WIP and waiting time can be used for
comparing the different scenarios.
6.1.1 Scenario 1: Current Process Analysis
This scenario analyzes the existing SMT line setup as it is. The cleaning process in the existing
scenario is carried out in the centrifugal machine which consumes about 20 minutes per
operation. It is a batch type process wherein it can take a maximum of 20 boards with 2
cartridges consisting of 10 boards each suspended on opposite sides of the machine during
operation. There are two machines of the same specifications on the line which ensures that the
centrifugal washing process is not the bottleneck in the SMT line.
6.1.1.1 Model
Fig 6.1 represents the cleaning subsection of the model. It has to be noted that since this is the
existing scenario, no changes were made to the basic model.
Fig 6.1: Scenario 1 Cleaning Model
6.1.1.2 Results
The model was simulated and the important results are given in the Table 6.1.
Table 6.1: Manufacturing Systems Analysis Results of Scenario 1
Run
Total
Toa Roa
Time
Total no. of
nrate
boards
Throughput
(no. of
boards per
Average
Waiting
Time
Average
WIP (no.
of
(mns)
outputted
hour)
(mins)
boards)
600
600
60
31
68
_ _
_
Utilization
rate of
bottleneck
Bottleneck
Machine
machine
Top side Universal
1_
Surface
Mount
1
0.98
6.1.2 Scenario 2: Chemicals used in the Centrifugal Machine
This scenario considers the case when chemical solution would be used in the existing
centrifugal water wash machines instead of plain DI water. When chemicals (either A or B) are
used in the existing centrifugal machines and when all the other parameters like the time and the
wash, rinse and dry cycles remain the same, there would not be much impact on the line from the
manufacturing systems perspective except that the washing machine downtimes would increase
in order to facilitate frequent bath changes and chemical replenishments.
6.1.2.1 Model
The model for this scenario would be similar to that of the previous scenario except that the
failure rates (machine downtimes and uptime ratios) for the washing machines would be
different. The model that was used to simulate this scenario is shown in Fig. 6.2.
Fig 6.2: Scenario 2 Cleaning Model
6.1.2.2 Results
Table 6.2: Manufacturing Systems Analysis Results of Scenario 2
Total Run
Time
(mins)
Total no. of
boards
outputted
600
600
580
580
_
Throughput
rate (no. of
boards per
hour)
_
58
58
_
Average
WIP (no.
of
Average
Waiting
Time
(mins)
31
31
Bottleneck
Machine
boards)
_
68
68
Utilization
rate of
bottleneck
machine
Top
side Universal
Surface
Mount
1
0.98
0.90
Thus we can observe that in this scenario, the throughput rate decreases due to increased
downtimes.
6.1.3 Scenario 3: Single Piece Flow Ultrasonic Machine is used
This scenario assumes a two-step cleaning system wherein the boards would be first individually
sent into an ultrasonic bath for a total of 10 minutes (5 minutes for each side) and then would be
batched and sent into the existing centrifugal machine for performing the regular wash, rinse and
dry cycles on it. This type of cleaning method is similar to the methodology adopted by Pranav
Jain [3] and Ishan Mukherjee [4] when conducting the experiments in their works. If the same
ultrasonic baths that were used for the experiments were to be used for full scale production, then
10 such baths would be necessary to sustain the current production levels.
6.1.3.1 Model:
As explained, we can see the ultrasonic bath preceding the centrifugal water wash process in the
model. The following model has 10 ultrasonic machines and 2 centrifugal machines to sustain
the current throughput rate. This information i.e. the number of machines used in each process
has to be entered while building the model.
6. The Cleaning and Allied Processes
Fig 6.3: Scenario 3 Cleaning Model
6.1.3.2 Results
Table 6.3: Manufacturing Systems Analysis Results of Scenario 3
Total Run
Time
(mins)
Total no. of
boards
otud
Throughput
rate (no. of
boards per
Average
Waiting
Time
Average
WIP (no.
of
hour)
(mins)
boards)
600
600
60
31
75
oupue
Bottleneck
Machine
Utilization
rate of
bottleneck
machine
Top side Universal
Surface Mount 1
0.98
It can be noted that the throughput rate remains unaffected but the WIP inventory increases
slightly when compared to the existing scenario.
67
6.1.4 Scenario 4: Batch-type Ultrasonic Machine is used
As seen from the Scenario 3, following the two-step process increases the total process time and
the WIP inventory and also increases complexity in the line by adding 10 additional ultrasonic
machines. Hence a batch type ultrasonic machine which would not only impart the ultrasonic
agitation while cleaning but also perform the wash, rinse and the dry cycles was considered as a
replacement for the centrifugal water wash machine.
6.1.4.1 Model
The ultrasonic water wash machine being considered here can wash in batches of 10 boards and
takes an average of 7 minutes to wash a single batch. Wash time of 7 minutes was chosen based
on Ishan Mukherjee's [4] optimization results for ultrasonic washing. Fig 6.9 represents the
model that uses this type of batch type ultrasonic water wash machine.
6. The Cleaning and Allied Processes
Fig 6.4: Scenario 4 Cleaning Model
6.1.4.2 Results
Table 6.4: Manufacturing Systems Analysis Results of Scenario 4
Total Run
Time
(mins)
Total no. of
boards
outputted
Throughput
rate (no. of
boards per
I__hour)
600
610
61
Average
Waiting
Time
Average
WIP (no.
of
(mins)
boards)
27
61
Utilization
rate of
bottleneck
Bottleneck
Machine
machine
Top
side Universal
Surface
Mount
1
0.98
It can be seen that the throughput rate has increased and even the average waiting time and
average WIP inventory have decreased when compared to the existing scenario. This is possibly
due to the effect of the lower time consumed for washing in this scenario.
6.1.5 Scenario 5: In-line Washing Machine is used
The in line machine is another cleaning alternative that is popularly used in the industry. This
machine is a continuous flow process where pressurized water or chemical solution is sprayed
over the boards as they are sent through the machine. This necessitates the use of copious
amounts of water and chemicals and hence has high operating costs in addition to heavily
burdening the recycling system. Also this machine has relatively much higher capital costs as
shown in Table 6.8 when compared to the other alternatives.
6.1.5.1 Model
The in line machine that was considered during this model had a total traversable length of 5 feet
and with a conveyor speed of 0.5 foot per minute, the entire process consumed 10 minutes for
cleaning. Since this is a continuous flow process, the in line washing process is represented with
the help of a 'conveyor' module rather than a 'process' element in the software as shown in Fig.
6.5
Fig 6.5: Scenario 5 Cleaning Model
6.1.5.2 Results
The model was simulated and following are the important results.
Table 6.5: Manufacturing Systems Analysis Results of Scenario 5
Total Run
Time
(mins)
Total no. of
boards
outputted
Throughput
rate (no. of
boards per
Average
Waiting
Time
Average
WIP (no.
of
outputted
hour)
(mins)
boards)
600
616
62
24
53
(mms)
1
__
Bottleneck
Machine
Utilization
rate of
bottleneck
machine
Top
side Universal
Surface
Mount
1
0.98
The results show that the actual throughput has slightly increased when compared to the existing
scenario. This increase is due to the existing batch type centrifugal process being replaced by the
continuous flow in line machine and hence the boards need not wait to be batched before being
sent into the washing machine. Another result of this phenomenon is that the waiting time and
the WIP inventory also decrease slightly.
6.2
Discussion of Manufacturing System Analysis Results
In Section 6.1, manufacturing systems analysis was performed on different alternatives. The
following are salient points observed from the analysis.
*
The PCB cleaning process was not the bottleneck process in any of the scenarios. Rather
the Top side Surface Mount Machine 1 was consistently found to be the bottleneck
process across all the scenarios with a utilization rate of 0.98.
*
Since cleaning process was not the bottleneck in any scenario, variations of the cleaning
process did not adversely impact the manufacturing system performance of the SMT line
i.e. the differences between the different scenarios in terms of output parameters like
throughput rate, WIP inventory and total process time were not very significant.
*
As expected, continuous flow processes like the in-line machine gave better performance
than the existing batch type centrifugal process. The ultrasonic machine also showed
good performance thanks to the lesser time consumed by it. Adding chemicals to the
existing machine increases downtime and hence the throughput is also reduced.
A quantitative comparison of the different alternatives is given in the Table 6.6. The information
in the Table 6.6 was extracted from Table 6.1 to Table 6.5.
Table 6.6: Comparison of the different scenarios
Scenario
Throughput rate
(no. of boards per
Average Waiting Time (in
minutes)
Average WIP (no. of
boards)
60
31
68
58
31
68
60
31
75
61
27
61
62
24
53
hour)
Existing centrifugal
process
Chemicals used in
the existing
centrifugal
process
Two step process
(single piece flow
ultrasonic bath and
the existing
centrifugal
machine)
Batch Type
Ultrasonic Machine
In line machine
6.3 Cost Analysis Results
Apart from the manufacturing system analysis, cost analysis is another significant tool that aids
in the evaluation of alternatives. There are two major sources of differences in costs namely the
operational costs and the capital costs. Since these costs depend upon the cost of chemicals and
the cost of machines respectively, a comparative analysis of the different options available for
chemicals and machines are presented in Sections 6.7.1 and 6.7.2. These results are then used to
compare and evaluate the different scenarios as shown in Table 6.9.
6.3.1 Cost Comparison of Chemicals
The cost comparison of the two chemicals that were used during the experiments is given in the
Table 6.7. It has to be noted that the optimum chemical concentration level was found to be 5%
of Chemical B by Ishan Mukherjee [4] in his work on process optimization.
Table 6.7: Cost comparison of the different chemicals
Costs
Chemical A
Chemical B
Cost of One Drum
$2690
$1,980.00
Drum Volume (Gallon)
53
55
Cost per gallon of chemical
$51
$36.00
Cost per gallon of chemical
solution (at 5% concentration)
$2.55
$1.80
Cost per gallon of chemical
solution (at 10% concentration)
$5.10
$3.60
The chemicals when used in the cleaning machine will be used in two ways. One is through
evaporation and drag-out and the other is through frequent wash tank (bath) replacements. Due
to operation at elevated temperatures and also due to flow through pumps, there is some
continuous loss of chemicals through evaporation and drag-out which has to be replenished
frequently. Also since the chemical solutions in the wash tank accumulate dirt, they have to be
replaced periodically to maintain the effectiveness of the machine. The rates of evaporation and
drag-out as well as the frequency of the bath changes are machine-dependent and vary from one
machine to another. The rates and frequencies along with their associated costs are given in the
Table 6.8.
6.3.2 Cost Comparison of Machines
The Table 6.8 shows the cost comparison between different machines/options available. The
table compares
costs across four segments namely the depreciation costs, chemical
replenishment in wash tank (bath) costs, evaporation and drag-out chemical replacement costs
and finally total costs. Since the frequency of bath changes and rates. of evaporation are machine
specific, they were included in Table 6.8.
In the case of current centrifugal machine, the cost shown in the same table is that of retrofitting
cost. The machine has to be retrofitted if chemicals are to be used. A new centrifugal machine
can also be used instead of retrofitting the old machines, if chemicals were to be used. The
depreciation costs shown in Table 6.8 include only the additional costs that would be incurred
when any one of the alternatives is considered. Hence in the case of current centrifugal machine,
only the cost of retrofitting is given in Table 6.8. The costs of purchasing a new in-line machine
and a batch type ultrasonic machine are also given. The 'soak/ ultrasonic bath' is actually a twostep process as explained in Scenario 3 (Subsection 6.5.3) and since it assumes that it can use the
existing centrifugal machine, the cost given is only that of the new ultrasonic bath and the
transfer stations. The total depreciation cost for every scenario is then calculated based on the
number of machines required to sustain the current production levels.
The bath capacity and the required frequency of bath changes in every machine are given in
Table 6.8, based on which the annual chemical requirement for bath changes was calculated.
There is also a cost associated with the disposal of the chemicals which is also given in Table
6.8. Similarly the amount of chemicals lost annually to evaporation and drag-out is calculated
and the cost associated with it is also given.
Total costs of machines and chemicals for sustaining the current production rates are calculated
at the end of the table and they enable comparison of the different scenarios when either
Chemical A or B is used.
Table 6.8: Cost comparison of machines
Current
New
Centrifugal Centrifugal
Machine
Machine
DepreciationCosts
Cost of new Machine/ cost of
retrofitting
Annual Depreciation costs @
In-line
Machine
Batch type
Ultrasonic
Machine
Soak/
Ultrasonic
Bath
$30,000
$100,000
$300,000
$150,000
$11,500
$6,000
$20,000
$60,000
$30,000
$2,300
Boards per hour
60
60
120
120
12
Total Process Time Required for
20
20
10
7
30
No. of machines required to
sustain the current production
2
2
1
1
10
Total annual Depreciation costs
$12,000
$40,000
$60,000
$30,000
$23,000
20% per
machine
one complete operation
Wash Tank (Bath) Change costs:
Wash Tank (Bath) Capacity of a
machine (amount of working
25
25
75
25
2.35
Once in 1
week
Once in 3
weeks
Once in 4
weeks
Once in I
week
Once in I
week
125
41.7
93.75
125
11.75
250
83.4
93.75
125
117.5
$2500
$834
$937.5
$1250
$1175
$15,243
$5,085
$5,716
$7,621
$7,164
$11,500
$3,836
$5,750
$5,405
solution required in gallons)
Frequency of bath changes
Chemical consumed in bath
changes annually (in gallons) per
machine
Total chemical consumed in bath
changes annually (in gallons) for
all
machines
Annual Chemical disposal costs
Total Annual
bath change &
chemical disposal
costs
Chemical A
Chemical B
I
I
$4,313
I
I
Evaporation and drag-out replacement costs:
Chemical lost in evaporation and
drag-out per hour of operation
(in
0.18
0.18
0.72
0.18
0.017
1080
1080
4320
1080
102
2160
2160
4320
1080
1020
Chemical A
$110,095
$110,095
$220,190
$55,048
$51,989
Chemical B
$77,760
$77,760
$155,520
$38,880
$36,720
gallons)
Amount of Chemical lost
annually per machine
Total amount of chemical lost
across
all machines
Total annual
chemical
replacement costs
Total annualcosts (Depreciationcosts and chemical costs):
Total Annual
costs
Chemical A
Chemical B
$137,338
$101,260
$155,180
$121,596
$285,906
$92,669
$82,153
$219,833
$74,630
$65,125
6.4 Conclusion
Table 6.9 combines the results of both the manufacturing system and cost analyses and thus
provides a brief summary of the differences between the different scenarios and combinations.
Table 6.9: Summary of manufacturing system and cost analyses
Throughput rate (no.
Process
Scenario
1
2a
of boards per hour)
Existing centrifugal proc ss
Chemicals used in the existing
60
Chemical A
centrifugal machine
Chemical B
2b
Chemicals used in a new
centrifugal machine
3
Two step process (single piece
flow ultrasonic bath and the
Chemical A
Chemical B
Plain DI
water
Chemical A
existing centrifugal machine)
Chemical B
58
Batch Type Ultrasonic Machine
Chemical A
58
60
5
Chemical A
$0
$137,338
$155,180
$121,596
$82,153
$65,125
61
$30,000
$92,669
$74,630
Plain DI
In ine mchinewater
In line machine
Annual Cost
$23,000
Chemical B
5
Additional
$101,260
Plain DI
4
Total
6
62
Chemical B
$60,000
$285,906
$219,833
Each of the scenarios that were discussed in Sections 6.1.1 to 6.1.5 is compared in Table 6.9. The
total additional annual cost given in the last column of Table 6.9 represents only the additional
cost that would be incurred when each of the scenarios is implemented. The throughput rate is
also given so as to give an idea of the manufacturing system performance of each alternative. It
has to be remembered that since the cleaning process is not the bottleneck process, the
manufacturing systems performance of the SMT line was not much affected.
When the existing centrifugal water wash process is pursued in the current centrifugal machine,
there is no additional cost since it does not involve any chemical and hence it also does not need
any retrofitting. The second row gives the results for Scenario 2 when either of Chemical A or B
is used in either current centrifugal machine or in a new centrifugal machine. The next three
rows give the results for Scenarios 3, 4 and 5. Either of plain DI water, Chemical A or Chemical
B could be used in any of these scenarios. Hence the costs associated with every combination are
given in the table.
It has to be noted from Table 6.9 that Batch type ultrasonic machine represents the most optimal
scenario with good performances from the perspective of both manufacturing systems
performance and cost. It has to be understood that a particular scenario need not perform well in
both parameters. For example, the in-line machine has the best throughput rate but suffers from
very high costs.
A sensitivity analysis was also performed on the optimal solution of the batch-type ultrasonic
machine in order to understand how this scenario reacts to changes in the prices of the chemicals.
Table 6.10 shows how the total annual additional costs vary correspondingly with changes in
chemical prices.
Table 6.10: Sensitivity Analysis of Batch type ultrasonic process
Total Additional Annual costs
Percentage
Percentage change in Total additional
annual costs
changein
prices of
Plain DI
Chemical
chemicals
water
A
10%
$30,000
$86,527
$70,292
No change
$30,000
$92,669
10%
increase
$30,000
20%
increase
$30,000
30%
decrease
increase
Chemical B
Plain DI
Chemical A
Chemical B
0%
-6.63%
-5.81%
$74,630
0%
0.00%
0.00%
$98,811
$78,968
0%
6.63%
5.81%
$104,953
$83,306
0%
13.26%
11.63%
$30,000
$111,095
$
$
$87,644
0%
19.88%
17.44%
water
$
0
1
From the Table 6.10, it could be inferred that the Chemical B when used in batch type ultrasonic
machine is less sensitive to price changes than when Chemical A is used in the same machine
and also that plain DI water is least sensitive.
The analysis given in Table 6.9 assumes that the V.1 chip assembly line is run at full capacity.
But since the line can sometimes be run only at partial capacity, a sensitivity analysis was
performed wherein the costs incurred was calculated when the production line is run at different
capacities. The Table 6.11 gives the results of the analysis.
Table 6.11: Sensitivity Analysis
Scenario
1
2a
2b
3
4
5
Total Annual Additional costs
(when line is runat)
100%
75%
50%
Existing centrifugal proc ss
$0
$0
$0
$74,669
Chemical A $137,338 $106,004
Chemicals used in the existing
centrifugal machine
Chemical B $101,260
$78,945
$56,630
$97,590
$126,385
Chemical A $155,180
Chemicals used in a new
centrifugal machine
Chemical B $121,596 $101,197
$80,798
Plain DI
$2,0
$2,0
$300
water
$23,000
$23,000
$23,000
Two step process (single piece
flow ultrasonic bath and the
Chemical A $82,153
$67,365
$52,577
existing centrifugal machine)
Chemical B $65,125
$54,594
$44,063
Plain DI
$30,000
$30,000
$30,000
water
Batch Type Ultrasonic Machine
Chemical A $92,669
$77,002
$61,335
Chemical B $74,630
$63,473
$52,315
Plain DI
$60,000
$60,000
$60,000
Process
In line machine
water
_____
Chemical A
$285,906
$229,430
$172,953
Chemical B
$219,833
$179,875
$139,917
Through Table 6.11, it is possible to observe that though the cost differences among the different
scenarios narrow down as the utilization rate of the line goes down, batch type ultrasonic
machine still is a cost effective alternative.
78
Chapter 7 - Recommendations and Future Work
7.1 Recommendations
7.1.1 Recommendations for the Alternative Cleaning Method
Based on the results of the experiments conducted by Pranav Jain [3] and Ishan Mukherjee [4]
and also on the data analysis that was later performed on these results, it was discovered that the
ultrasonic physical agitation when supplemented by chemical action, especially by that of
Chemical B, gave the best cleanliness scores among all the alternatives considered. Even the
manufacturing system analysis and the cost analysis revealed that replacing the existing
centrifugal machine with the batch type ultrasonic machine gave an optimal combination of
throughput performance and cost levels as shown in Section 6.5. The WIP inventory and the
waiting time in the line were also found to be lower than the current scenario. Hence the batch
type ultrasonic machine that washes the boards with Chemical B is put forward as the
recommended alternative cleaning method. The recommended process parameters for this
method are 7 minutes for washing time and 5% concentration by volume of Chemical B [4].
The results of manufacturing system analysis revealed that the PCB cleaning process was not the
bottleneck process in the SMT line and hence none of the alternatives considered adversely
impacted the manufacturing systems performance of the SMT line.
7.1.2 Recommended Product Architecture Changes
It was observed that certain components like 1210 chip capacitors and MLP FET found on the
bottom side of the board were found to be particularly tough to clean as explained in Section
4.1.6. It was also discovered that these components had improper designs which if corrected
could greatly aid in improving the cleaning effectiveness. Hence, if design changes like
e
The elimination of the projecting copper pads beneath the 1210 chip capacitors
"
And the replacement of a dual leg MLP with a single leg MLP FET,
are made, the ultrasonic physical agitation in plain DI water itself without the aid of any
chemicals can completely clean the boards. Thus non requirement of chemicals would result in
cost savings as high as 60% annually. Also the many potential side effects that the chemicals
have on the boards like etching of board surface could be prevented apart from improving safety
on the assembly line as these chemicals are volatile. Non requirement of chemicals also
eliminate the need for costly recycling, chemical disposal and obtaining environmental
clearances. The usage of plain DI water drastically reduces the operational costs and also makes
the system insensitive to price changes in chemicals. Hence it is highly recommended that these
design changes be made and once these changes are made, the batch type ultrasonic machine that
washes boards in plain DI water should be implemented. The recommended total washing time is
7 minutes [4].
7.2 Future Work
Following are some of the directions for future work that could help in consolidating the work of
this project.
" The impact of cleanliness on the quality and performance of the V.I chip needs to be
better studied. It has been known that ineffective cleaning causes electro-migration,
improper mold adhesion, voids and inclusions in molds and improper mold underfill.
Quantifying and measuring the impact of cleanliness levels on these defects could help in
better understanding of the criticality of the cleaning process in the production.
Quantification of benefits could help in performing a cost benefit analysis on the cleaning
process.
e
The impact of the alternative cleaning method on the throughput of only the SMT line
was studied. However its impact on the throughput on the entire production line, if
studied, would enable the throughput to be expressed in terms of the revenue
increase/decrease which in turn would enable easy cost comparison of the different
scenarios.
*
Since the usage of chemicals was recommended only if the recommended design changes
were not made, it would be desirable to study the impact of the chemicals on the
materials on the board. These chemicals were suspected of causing etching on copper
pads and depositing an oily film on some of the components. Also the impact of
chemicals on the electrical performance also needs to be studied.
" Establishing a suitable and a reliable method of process control for the PCB cleaning
should also be pursued in the future.
82
Appendix
A:
Results
of
Hypothesis-Testing
Experiments
Appendix A - Table A: Experiments for Testing of Hypothesis
S. No.
Soak/Ultrasonic
1
2
3
4
5
6
7
8
9
Soak
Soak
Soak
Soak
Soak
Soak
Soak
Soak
Soak
10
11
Ultrasonic
Ultrasonic
12
13
14
Ultrasonic
Ultrasonic
Ultrasonic
15
16
Twice water washed
Twice water washed
17
No water wash
Conditions (conc. In % & time in mins)
Experiments for testing hypothesis I
0% & 5 min
0% & 10 min
0% & 20 min
0% & 40 min
0% & 60 min
7.5% Chemical A & 5 min
7.5% Chemical A & 10 min
7.5% Chemical A & 20 min
7.5% Chemical B & 10 min
Experiments for testing hypothesis II
0% & 5 min
0% & 10 min
Experiments for testing hypothesis
Overall
Footprint
Score
Critical
Footprint
Score
Critical
Component
Score
2.43
2.58
2.39
3.59
3.00
3.44
3.46
3.51
4.51
1.67
2.08
1.78
1.22
1.28
2.83
2.94
2.89
4.03
1.36
1.61
1.83
1.64
1.75
3.25
3.39
3.56
3.61
4.68
4.89
4.60
4.83
4.75
4.86
5.00
5.00
4.94
5.00
5.00
4.86
5.00
5.00
4.36
2.31
2.31
1.67
1.67
1.44
1.39
3.59
3.22
1.58
HI
7.5% Chemical A & 5 min
7.5% Chemical A & 10 min
7.5% Chemical B & 5 min
Experiments for testing hypothesis IV
N/A
N/A
Baseline Experiment
N/A
Appendix B: Results of Optimization Experiments
Appendix B - Table B: Optimization Experiments
S. No.
Board
No.
Agitation
Chemical Conc. (v/v)
Time
(mins)
Temp
(deg
C)
Critical
Component
Score
Critical
Footprin
t Score
Centrifugal washer experiments
1
396
Centrifugal
7.5% Chemical B
20
60
4.33
4.64
2
397
Centrifugal
7.5% Chemical B
20
60
4.42
4.31
3
399
Centrifugal
10% Chemical B
20
60
3.94
3.94
4
400
Centrifugal
10% Chemical B
20
60
4.00
4.06
5
401
Centrifugal
12.5% Chemical B
20
60
3.81
3.86
6
402
Centrifugal
12.5% Chemical B
20
60
3.86
3.97
7
403
Centrifugal
5% Chemical B
20
60
3.25
3.44
8
404
Centrifugal
5% Chemical B
20
60
3.28
3.67
Ultrasonic Optimization experiments
9
405
Ultrasonic
DI Water
2
60
4.75
4.03
10
407
Ultrasonic
DI Water
20
60
5.00
4.03
11
858
Ultrasonic
2.5% Chemical B
4
60
4.81
4.33
12
859
Ultrasonic
2.5% Chemical B
10
60
4.81
4.42
13
860
Ultrasonic
5% Chemical B
7
60
4.94
4.69
14
861
Ultrasonic
7.5% Chemical B
4
60
4.97
4.86
15
862
Ultrasonic
7.5% Chemical B
10
60
5.00
4.83
16
863
Ultrasonic
w/o rinse
DI Water
10
60
5.00
4.33
____________________
Repeatability experiments
17
406
Ultrasonic
DI Water
10
60
5.00
4.50
18
409
Soak
7.5% Chemical B
10
60
5.00
4.64
19
411
Soak
7.5% Chemical A
10
60
3.31
2.56
20
412
Ultrasonic
7.5% Chemical B
5
60
4.92
4.94
21
413
Ultrasonic
7.5% Chemical A
5
60
4.86
4.92
70
3.64
4.03
Temperature Study experiment
22
410
Soak
7.5% Chemical B
10
Appendix C: Grading Scale
The grading scale that was followed during the experiments is shown in the Table C below.
Appendix C - Table C: Grading Scale Explanation
Score
Description
5
Completely Clean
4
Trace - Minute Amounts
3
Low flux residue incidence
2
Non-Uniform residue presence
1
Uniform residue presence
0
Large amounts of residue
A figurative example of the grading pattern is show in Fig. 1 below.
2
4
Appendix C - Fig. A: Grading Pattern used for 0603 chip capacitors
References
[1] "Factorized Power Architecture in V.1 Chips", http://www.vicr.com/webdav/site/com.vicor.
www/shared/documents/whitepapers/fpa10l.pdf, accessed on July 22, 2011.
[2] "DC - DC Converters : A primer", www.jaycar.com.au/imagesuploaded/dcdcconv.pdf,
accessed on July 22, 2011.
[3] Jain, P., 2011, "Root cause analysis of solder flux residue incidence in the manufacture of
electronic power modules", MIT, Cambridge, MA.
[4] Mukherjee, I., 2011, "Cleaning Process Development and Optimization
Surface Mount Assembly Line of Power Modules", MIT, Cambridge, MA.
in the
[5] Lee N.C., 2009, "Lead-Free Flux Technology and Influence on Cleaning", 11th Electronics
PackagingTechnology Conference.
[6] Bivins, B.A., Juan, A.A., Starkweather, B., Lee, N.C., and Negi, S., September 2000, "PostSolder Cleaning of Lead-Free Solder Paste Residues", SMT International,Chicago, IL.
[7] Sinni, A., and Palmer, M.A., 1997, "Kinetics of Flux Residue Formation in a Humid
Environment", IEEE/CPMTInternationalManufacturing Technology Symposium.
[8] Lee, N.C., and Bixenman, M., 2002 "Flux Technology for Lead-Free Alloys and its Impact
on Cleaning",
SEMI Technology Symposium: International Electronics Manufacturing
Technology (IEMT) Synposium SEMICON West.
[9] Hansen, K.S., Jellesen, M.S., Moller, P., Westermann, P.J.S, and Ambat R., 2009, "Effect of
Solder Flux Residues on Corrosion of Electronics", IEEE.
[10] Chaoyun, L., Sang, Z. C., Hongchun, Z., Jifan, W., and Xin. Z., 2006, "Analysis of SMT
residues after reflow" 8th InternationalConference on Electronic Materialand Packaging.
[11] "ARENA Online Help Manual", 2011, Rockwell Automation.
[12] Parthasarathy, R., and Ravindran, R., 2011, "DOE for Identification & Development of PCB
Defluxing Process" Zestron America, Manassas, VA.
[13] McDermott E., and Macauley H., 2008, "Water wash process optimization", Vicor
Corporation, Andover, MA.
[14] Bixenman M., and Lober D., 2011, "Technical Report", Kyzen, Nashville, TN.
[15] Barabde K., 2010, "V.1 Chip Time Study Report", Vicor Corporation, Andover, MA.
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