Hydrogen Degradation of InP HEMTs
by
Roxann Russell Blanchard
B.S., University of Vermont (1989)
M.S., Massachusetts Institute of Technology (1994)
Submitted to the Department of
Electrical Engineering and Computer Science
in Partial Fulfillment
of the Requirements for the Degree of
Doctor of Philosophy
at the
MASSACHUSETTS INSTITUTE OF TECHNOLOGY
June 1999
®1999 Massachusetts Institute of Technology
All rights reserved.
. . Fl ec i.al.F.i
A u th o r .. . . . . . . . ..
Department of Electrical Engi~eeing
c
nd Comptrc
May 17, 1999
...................
Jesdls A. del Alamo
Professor of Electrical Engineering
Thesis Supervisor
C ertified by .................................
Accepted by ...................
...
.....
...
...
Arthur C. Smith
Chairman, Departmental Committee on Graduate Students
Hydrogen Degradation of InP HEMTs
by
Roxann Russell Blanchard
Submitted to the Department of Electrical Engineering and Computer Science
on May 17, 1999 in partial fulfillment of the
requirements for the degree of
Doctor of Philosophy
Abstract
Hydrogen degradation is a serious reliability concern for III-V FETs. Exposure can
occur when hydrogen out-gasses from packaging material and becomes trapped inside
hermetically sealed packages. The detailed mechanism by which H2 degrades FETs is
not understood and a device-level solution to this problem has not been reported.
This work investigates the hydrogen degradation of InP High-Electron-Mobility
Transistors (HEMTs) fabricated at MIT. We show that there are three independent
degradation mechanisms: two that affect the intrinsic portion of the device and one
that affects the extrinsic portion of the device.
In the intrinsic region, H reacts with Ti in the Ti/Pt/Au gate metallization to
form TiH,. Since TiH has a larger lattice than Ti, this causes compressive stress in
the gate. This stress affects the transistor threshold voltage, VT, through the piezoelectric effect, which alters the equilibrium carrier concentration in the channel. This
hypothesis is supported with both theoretical calculations and material characterization (Auger spectroscopy and stress measurements) of Ti/Pt bilayers. Along with the
piezoelectric effect, there is an additional, negative AV which we hypothesize is due
to H+1 penetration into the semiconductor. Both AVT mechanisms are found to be
largely recoverable with further annealing in N 2 .
In the recessed regions next to the gate, hydrogen modifies the surface stoichiometry of the exposed InAlAs by facilitating As desorption through the formation of
AsH 3 . This causes a reduction in the sheet carrier concentration underneath, and an
improvement in the breakdown voltage. Changes in the InAlAs surface stoichiometry
have been confirmed through XPS. This mechanism is not found to be recoverable.
The physical understanding obtained through this work should be instrumental
in identifying a device-level solution to this problem.
Thesis Supervisor: Jesus A. del Alamo
Title: Professor of Electrical Engineering
3
4
Acknowledgments
Earning the Ph.D. has been one of the more harrowing experiences of my life.
That I have emerged from this process wiser, more confident, and most importantly
still smiling, is testimony to the support and encouragement that I have received from
many people. It will be impossible to do justice to them all.
To my advisor, Prof. Jesd's del Alamo, I owe a debt of gratitude that I can only
repay by trying to maintain his same standards of excellence, dedication and integrity
in my own career. It has been an honor and privilege to work under his direction.
This work has benefitted greatly from interactions with Sanders Lockheed-Martin.
I sincerely believe that the quality research produced at institutions such as MIT would
be impossible without this important connection to industry. In particular, I thank
Alan Swanson for his steadfast support of this work, in its various forms. I would
also like to thank P.C. Chao, Wen Hu and Steve Adams for many helpful discussions
and insights into the problem of hydrogen degradation, and for the original idea of
investigating the piezoelectric effect.
This work has also benefitted from the outstanding colleagues at MIT with whom
it has been my privilege to work. I thank Vicky Diadiuk and all of the MTL staff, both
in the fabrication facilities and out, for their hard work and dedication. The device
fabrication, which has been so important to this work, would have been impossible
without their efforts. My sincere thanks to Prof. Albert Cornet from the University
of Barcelona for his help on many aspects of this work. In addition to helping with
the AES measurements, many of the hypotheses developed in this work were fleshed
out through daily discussions during his stay. The AES and XPS measurements would
have been impossible without the help and expertise of Libby Shaw from the MRSEC
Shared Facilities here at MIT. I would also like to thank Mauro Kobrinsky from the
Materials Science department for his help in understanding the kinetics of hydride
formation.
To my friends, thank you for helping me keep my sanity (if indeed I did?) during
the dark days of the Ph.D. In particlar, I thank Melanie Sherony for sharing
laughter,
frustrations, and mystery books. The "old group" - David Greenberg, Thalia Rich, and
Mark Somerville - and the new - Chris Putnam, Sergei Krupenin, Joerg
Appenzeller,
Jim Fiorenza, Samuel Mertens and Tassanee Payakapan - all made coming to the office
5
fun. They not only provided friendship and camaraderie, but also a stimulating work
environment with such a free exchange of ideas.
I'd also like to thank my non-MIT
friends - "the Gang" - for reminding me that there is life outside of work. And to my
tennis partner, Prof. Hank Smith, I'd like to say thanks for so many fun games (and
keep your front knee bent on your backhand).
Last, but never least, I wish to thank my family for their love and support, which
ultimately made this achievement possible. And to Michael, I don't think I could have
done this without you. Every day, I feel blessed to share my life with you.
This work has been made possible by Sanders Lockheed-Martin and the Joint
Services Electronics Program Fellowship. This work made use of the MRSEC Shared
Facilities supported by the National Science Foundation under Award Number DMR-
9400334.
6
for James and Margareta Russell
7
when the spinner on the coater sends your wafer for a ride,
and you finally get it working, but you've coated the wrong side,
now you'll miss your reservations on the !*#%@$! karl suss,
ain't no doubt about it, you've got the fabrication blues.
when the label on the bottle says ocg 3:2,
but your image just washed off, and you don't know what to do,
because some fool put solvent waste in the bottle that you used,
i hate to have to say it, you've got the fabrication blues.
when the rie reflections just don't seem to want to tune,
and field service won't be coming until possibly next june,
and your index of refraction isn't anywhere near two,
let me tell you honey, you've got the fabrication blues.
when your wafer is held hostage 'cuz the cda is down,
and the lift-pins in the chamber just made that awful sound,
looks like you'll have to vent - it's just a year's work that you'll lose,
you can always start all over, it's the fabrication blues.
now i'm here pushing a button every 10 minutes for 3 hours,
and the terminal i was working on has suddenly lost power,
on the net i won't be surfing, no i can't even read news,
so i'm writing stupid poems about the fabrication blues.
rrb '98
8
Contents
1
2
3
19
Introduction
. . . . . . . . .
19
InP HEMT Reliability ...........
. . . . . . . . .
21
1.3
Hydrogen Effects in III-V Semiconductors
. . . . . . . . .
22
1.4
Thesis goals and outline
. . . . . . . . .
24
1.1
Background ....
1.2
.................
. . . . . . . . . .
27
Fabrication Technology
2.1
Device Heterostructure
2.2
Fabrication Process
. . . . . . . . . . . . . . . . . . . . . . . . . .
28
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
28
2.2.1
RIE Mesa Isolation
. . . . . . . . . . . . . . . . . . . . . . . .
30
2.2.2
Silicon Nitride Passivation . . . . . . . . . . . . . . . . . . . . .
34
. . . . . . . . . . . . . . . . . . . . . . . . . . .
37
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
39
2.3
Device Characteristics
2.4
Sum m ary
Hydrogen Degradation: Electrical Measurements
3.1
3.2
41
Experimental Procedure.....
. . . .
42
3.1.1
Thermal Burn-in.....
. . . .
42
3.1.2
Hydrogen Exposure
Results: Intrinsic Region
.
42
. .
43
3.2.1
Pre/Post Degradation Measurements . . . . . . . . . . . . . . .
43
3.2.2
In situ Measurements
. . . . . . . . . . . . . . . . . . . . . . .
44
3.2.3
Recovery of Intrinsic Degradation
. . . . . . . . . . . . . . . .
46
. . . . . . . . . . . . . . . . . . . . . . . . .
48
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
3.3
Results: Extrinsic Region
3.4
H ypothesis
3.4.1
Intrinsic Region: the Piezoelectric Effect
. . . . . . . . . . . . .
49
3.4.2
Intrinsic Region: H+ Ion Penetration . . . . . . . . . . . . . . .
51
9
3.4.3
3.5
4
Extrinsic Region: Decrease in n,ext .
55
. . . . . . . . . . . . . . . . . . .
56
Sum m ary
59
Discussion
4.1
4.2
4.3
4.4
4.5
4.6
. . . . . .
60
. . . .
60
. . . . . . . . . . . . . .
60
Confirmation of TiH Formation
4.1.1
Auger Electron Spectroscopy
4.1.2
Experiment
4.1.3
Results
4.1.4
Discussion
4.1.5
Summary
. . . . . . . . . . . . . . . .
61
. . . . . . . . . . . . . .
63
. . . . . . . . . . . . . . .
65
. . . . . . . . . . . .
66
4.2.1
Radius-of-Curvature Measurements .
66
4.2.2
Experiment
. . . . . . . . . . . . . .
66
4.2.3
Results
4.2.4
Discussion
4.2.5
Summary
Confirmation of Stress
. . . . . . . . . . . . . . . .
67
. . . . . . . . . . . . . .
68
. . . . . . . . . . . . . . .
70
. . . . . . . . . . . . .
70
H+ Ion Penetration
. . . . . . . . . . . . . .
71
. . . . . . .
71
4.3.1
Experiment
4.3.2
Results and Discussion
. . . . . . . . . . . .
73
. . . . . . . . . . . . . .
73
. . . . . . .
73
The decrease in nq,ext
4.4.1
Experiment
4.4.2
Results and Discussion
Confirmation of As Desorption at the InAlAs surface
74
4.5.1
X-ray Photoelectron Spectroscopy
4.5.2
Experiment
4.5.3
R esults
4.5.4
Discussion
. . . . . . . . . . . . . .
4.5.5
Summary
. . . . . . . . . . . . . . .
81
. . . . . . .
81
. . . . . . . .
81
75
. . . . . . . . . . . . . .
75
. . . . . . . . . . . . . . . .
76
Self-consistency of Hypotheses
4.6.1
VT and BVDG Models
4.6.2
Effects of Hydrogen
4.6.3
Modeling Results . . . . . . . . . . .
4.6.4
Summary
. . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
80
83
85
87
4.7
5
91
Impact of Hydrogen on Industry HEMTs
91
5.1
Experimental Procedure .........
. . . . . . . . . . . . . . . . .
5.2
Results: Strained-channel InP HEMTs
5.2.1 Pre/Post Anneal Measurements
. . . . . . . . . . . . . . . . . 92
5.2.2
5.3
In situ Measurements
. . . . . . . . . . . . . . . . . 92
. . . . . . . . . . . . . . . . . . . . . . . 92
Results: GaAs PHEMTs . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4
5.3.1 Pre/Post Anneal Measurements . . . . . . . . . . . . . . . . . . 94
5.3.2
6
88
Summary ......................
In situ Measurements
5.4
Discussion
5.5
Summ ary
. . . . . . . . . . . . . . . . . . . . . . . 95
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
101
Conclusions
6.1
Hydrogen Degradation in the Intrinsic Region
. . . . . . . . . . . . . . 101
. . . . . . . . . . . . . . . . . . . . . . 102
6.1.1
The Piezoelectric Effect
6.1.2
Hydrogen Ion Penetration
. . . . . . . . . . . . . .
. . . . . . . 102
6.2
Hydrogen Degradation in the Extrinsic Region . . . . . . . . . . . . . . 102
6.3
Future W ork . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3.1
Short-Channel Devices: Modeling and Experiments
6.3.2
Device-Level Solutions
. . . . . . . . . . . . . . . .
. . . . . . . 103
. . . . . . . 103
. . . . . . . 104
Appendix A: Fabrication Process Flow
107
Appendix B: Calculation of Piezoelectric Polarization
117
11
List of Figures
1.1
1.2
Cross-section of a typical InP-based InAlAs/InGaAs Modulation-Doped
Field-Effect Transistor, or MODFET. Because this configuration provides excellent electron mobility, this structure is commonly referred to
as a High-Electron-Mobility Transistor, or HEMT. . . . . . . . . . . . .
Energy band diagram of an InP HEMT. . . . . . . . . . . . . . . . . .
2.1
2.2
InGaAs/InAlAs on InP heterostructure used in this study. . . . . . . .
Process flow diagrams: (a) Mesa isolation and DALO deposition. (b)
20
21
29
Ohmic contact formation using 50A Ni/ 15ooA AuGe/ 300A Ni. (c)
Recess of the InGaAs capping layer and deposition of gate metalliza-
tion of 250A Ti/ 250A Pt/ 3000k Au. (d) Top view of device. Si 3 N4
2.3
2.4
2.5
2.6
2.7
3.1
3.2
3.3
passivation. Via etching and pad metalization. . . . . . . . . . . . . . .
Wafer samples used to characterize the ECR-enhanced RIE CH 4 /H 2
m esa-isolation etch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparison of source-gate diode characteristic of a 1.0 pm transistor
before and after Si 3 N 4 passivation. Measurement with drain floating.
Output characteristics for a passivated 0.6 pm transistor. . . . . . . . .
Transconductance (gm) characteristics of a passivated 0.6 pm transistor.
gmo is the intrinsic transconductance obtained when gm is corrected for
the effects of source resistance blow-up due to velocity saturation in the
extrinsic regions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Off-state breakdown voltage characteristic of a passivated 0.6 pm transistor. BVDG defined at IG = 1 mA/mm. . . . . . . . . . . . . . . . . .
Transconductance vs. VGS before and after a thermal burn-in. Device
annealed in N 2 at 270 'C for 40 min. The increase in VT and gm are a
result of gate sinking. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AV vs. LG after annealing in forming-gas at 200'C for 3 hours. Open
symbols are control samples annealed in N 2 at 200 C. Error bars on
control samples annealed for longer times indicate standard deviation in
measurement over time. VT defined at ID=
4 mA/mm. Measurements
at room temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Orientation dependence of AVT as a function of LG for passivated devices, showing greater negative AV for [011] devices. Forming-gas anneal for 3 hrs. at 200'C. Measurements at room temperature. . . . . .
12
31
34
36
37
38
38
43
44
45
3.4
3.5
3.6
3.7
Orientation dependence of AVT as a function of LG for unpassivated devices. These results are nearly identical to passivated devices, indicating
that the Si 3 N 4 passivation is not a source of stress. Forming-gas anneal
for 3 hrs. at 200 'C. Measurements at room temperature. . . . . . . . .
AV vs. Vi for [011] devices during early stages of degradation in forming gas anneal. Measurements performed in situ at 200'C. VT defined
at ID = 5 mA/mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AVT vs. V7 for longer times, revealing the presence of a second AVT
mechanism. Measurements performed in situ at 200'C. VT defined at
ID - 5 m A/m m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AVT vs. t/LG, showing that the onset of the second AVT mechanism is
linearly proportional to LG- Measurements performed in situ at 200'C.
VT
3.8
3.9
3.10
3.11
3.12
3.13
4.1
defined at ID = 5 mA/mm.
. . . . . . . . . . . . . . . . ... . . . . .
AVT vs. Vi during N2 recovery anneal. Linear behavior indicates a
diffusion-limited process. Measurements performed in situ at 200'C. VT
defined at ID = 5 mA/mm. . . . . . . . . . . . . . . . . . . . . . . . .
ABVDG vs. LG, showing no LG dependence. ABVDG also showed no orientation dependence, and did not recover. Forming-gas anneal for 3 hrs.
at 200'C. Recovery anneal in N 2 at 200'C for 15 hours. Measurements
at room temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparison of measured AVT vs. LG data with the predicted AVT due
to piezoelectric effect arising from compressive stress in the gate. ....
Cartoon illustration of the proposed H 2 degradation mechanism in the
intrinsic region. We hypothesize that H2 exposure leads to the formation
of TiH, and compressive stress in the Ti/Pt/Au gate. This imparts tensile stress to the underlying semiconductor. Because the semiconductor
is piezoelectric, this creates a polarization charge density. The heavy
lines indicate contours of constant charge density for a device oriented
in the [011] direction. A device oriented in the [011] direction would
have charges of the opposite sign. This effect accounts for the LG and
orientation dependencies of AVT. . . . . . . . . . . . . . . . . . . . . .
The proposed second mechanism of H 2 degradation in the intrinsic region: H+ ions penetrating into the semiconductor. This effect produces
a negative AVT which is independent of LG and orientation. . . . . . .
The proposed degradation mechanism in the extrinsic region: a reduction in ns,ext either through donor passivation, or through changes in the
surface potential of the exposed InAlAs region . . . . . . . . . . . . . .
45
46
47
47
48
49
51
52
55
56
Diagram depicting the energy transitions which take place when and
incident electron with energy Ei ejects a core 181/2 electron. Higher
energy electrons transition into the empty core level. The excess energy
is either emitted as a photon, or is imparted to another electron which
is emitted as an Auger electron. To the right of the energy diagram are
the common orbital designations and the nomenclature used in AES.
Diagram adapted from [75].
. . . . . . . . . . . . . . . . . . . . . . . .
13
61
4.2
Auger spectra obtained 20A into the Ti layer after anneals in either
forming-gas (-) or pure N 2 (- -) at 200 C for 1 hour. The 1 eV shift
in the low energy Ti peak, and the emergence of a new peak 5 eV below
the main peak, are the characteristic signature of TiH.. . . . . . . . . .
4.3 Depth profile of Auger spectra in the Ti layer of Ti/Pt films. The full
1 eV shift and large H-induced peaks in spectra obtained near Ti/Pt
interface indicate near stoichiometric compositions of TiHX, where x
approaches 2. The hydrogen content in the hydrides decreases with
increasing depth into the Ti layer. . . . . . . . . . . . . . . . . . . . . .
4.4 Plot of the ratio of the H-induced peak intensity to the total peak intensities (Ti-peak + H-induced peak), as a function of depth into the
Ti layer. Solid line indicates profile obtained after forming-gas anneal
at 200'C for 1 hour. Dashed line indicates the profile obtained after a
subsequent recovery anneal in pure N 2 at 200 C for 15 hours. Only the
hydrides with near stoichiometric composition remain after recovery. . .
4.5 Stress in 250A Ti/ 250A Pt films calculated from in situ radius-ofcurvature measurements, showing compressive stress in hydrogenated
Ti/Pt films. Solid symbols for films annealed in forming-gas for 1 hrs at
various temperatures. N 2 control sample annealed for 1 hrs. at 250'C.
4.6 In situ radius-of-curvature measurements showing that stress in hydrogenated Ti/Pt films recovers after further annealing in N 2 . . . . . . . .
4.7 Stress relaxation in Ti/Pt films during forming-gas anneal. The log t
dependence indicates stress is relaxing through the movement of dislocation s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8 Stress relaxation in Ti/Pt films during recovery anneals in N 2 at various
temperatures. For low temperatures, stress relaxation is well described
by a dislocation glide mechanism. Kinetics of stress relaxation at higher
temperatures may be governed by breakup of TiH. . . . . . . . . . . .
4.9 AVT vs. time for a 2 pm device annealed in forming-gas under various
bias conditions. Solid squares show AVT after annealing unbiased. Open
circles indicate AVT after annealing with a VGS,GD= -1.5 V bias, which
increases the built-in electric field of the device (opposes H+ diffusion).
Open triangles indicate AVT after annealing with a VGS,GD= ±0.3 V
bias, which reduces the built-in electric field. . . . . . . . . . . . . . . .
4.10 Measured n. values after annealing in forming gas or N 2 . H 2 degrades
uncapped structures, but not capped structures. This rules out donor
passivation as the cause of the reduction in ns,ext.
62
63
64
67
68
69
70
72
. . . . . . . . . . . .
74
4.11 XPS results comparing the Al-2p core level spectra for an uncapped
HEMT samples either untreated or annealed in N 2 at 200 C for 1 hour.
Raw data is indicated in the open squares for the untreated sample, and
in solid squares for the N 2 annealed sample. The overall curve fits are
deconvolved into a substrate component (dark grey) and a native-oxide
component (light grey). . . . . . . . . . . . . . . . . . . . . . . . . . . .
76
14
4.12 XPS results comparing samples annealed in either N 2 or forming-gas
at 200'C for 1 hour. The Al(ox)/Al(sub) area ratio of the forming-gas
sample increased by 13%. Values normalized to composite peak height.
4.13 Comparison of As-3d spectra from samples annealed in either N 2 or
forming-gas at 200'C for 1 hour. The As(ox)/As(sub) area ratio of the
sample annealed in forming-gas decreased by 24%. . . . . . . . . . . . .
4.14 XPS results comparing In-3d3 / 2 and In-3d5 / 2 spectra from samples annealed in either N2 or forming-gas. For samples annealed in forming-gas,
the In(ox)/In(sub) area ratio increased by 8% for In-3d5 / 2 , but decreased
by 14% for In-3d 3 / 2 compared to N 2 annealed samples. . . . . . . . . .
4.15 Bar graphs summarizing the results of XPS measurements of the InAlAs
surface. All numbers are relative to the N 2 control sample. Recovery
...
data not available for In-3d3 / 2 or In-3d5 /2. . . . . . . . . . . . . .
4.16 Plot of BVDG and VT vs. #B, showing the impact of varying #kB on
BVDG and VT, while holding all other parameters constant. . . . . . . .
4.17 Parametric plot of ABVDG vs. AVT showing the impact of varying #B,
n,,ext, and ND,int, while holding all other parameters constant. Values
for A#B, Ans,ext, and AND indicate the increment between data points.
Arrows show direction of increasing parameter value. . . . . . . . . . .
4.18 Parametric plot of ABVDG vs. AVT showing hydrogen degradation for
the 0.6 pm [011] and [01i] devices. The center star represents the initial
(post burn-in) device state. The light gray star shows the device state
following the forming-gas anneal. . . . . . . . . . . . . . . . . . . . . .
4.19 Parametric plot of ABVDG vS. AVT showing the N 2 recovery behavior
for the 0.6 pm [011] and [011] devices. The center star represents the
initial (post burn-in) device state. The light gray star shows the device
state following the forming-gas anneal. The dark grey star shows AV
after the N 2 recovery anneal. . . . . . . . . . . . . . . . . . . . . . . . .
5.1
5.2
5.3
gm and ID vs. VGS for strained-channel, 0.1 pm InP HEMTs, showing
that VT shifts positive after exposure to forming-gas at 200 C. Measurements taken at 30 0 C with VDS -0.1 V. . . . . . . . . . . . . . . . . . .
Breakdown characteristics for InP HEMTs. The ±0.5V ABVDG after the
forming-gas anneal is comparable to results on the N 2 control sample.
Measurements at 30 0 C. Breakdown defined at IG= 1 mA/mm. ..'. .
In situ AVT measurements of passivated and unpassivated strainedchannel InP HEMTs. Both devices exhibit some amount of recovery
during forming-gas anneals at 200 C. Measurements at 200 C with VDS
0 .1 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4
AV vs. time for passivated InP HEMTs measured during the recovery
5.5
. . .
. . . . . - -.
.. .
anneal in N 2 . . . . . . . . . . . . . . . . .
gm and ID vs. VGs for passivated, GaAs PHEMTs before annealing,
after the forming-gas anneal, and after the recovery anneal in N 2 . The
positive AV is more than twice that of the InP HEMTs. Measurements
at room temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
77
78
79
79
84
84
86
87
93
93
94
95
96
5.6
96
5.7
AVT of the GaAs PHEMT measured in situ during forming-gas anneal
at 200'C. N 2 control sample shown in open squares. . . . . . . . . . . .
AVT measured in situ during the recovery anneal at 200'C in N 2 for the
GaAs PHEM Ts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AVT vs. t 5 / 2 for 0.1 pm InP HEMTs and GaAs PHEMTS during
97
5.8
forming-gas anneals at 200'C, revealing a behavior characteristic of hydride precipitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.9
AVT vs.
99
t for 0.1 pum InP HEMTs and GaAs PHEMTS during N2
recovery anneal. AVT recovery is well-described by a dislocation glide
m echanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
1
Diagram depicting the model used for calculating the stress in the semiconductor resulting from compressive stress in the gate. Fig. adapted
from [101]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
2
3
Diagram showing the main crystal directions relative to the axes defined
for the devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Profile of p,, in the semiconductor. Lines represent contours of constant
pO,, normalized by 2d 14 (4 - v)F/(7rL2). . . . . . . . . . . . . . . . . . . 124
16
List of Tables
2.1
2.2
2.3
4.1
4.2
1
Table listing the final recipe for the ECR-enhanced RIE mesa isolation
. . . . . . . . . . . . . .
. . . . .. .
etch . . . . . . . . . . . . ...
Etch depth results for the ECR-enhanced RIE mesa isolation etch. . . .
Table listing the ECR-enhanced Si 3 N 4 deposition recipe for a 600A pas. . . . . .
sivating layer. . . . . . . . . . . . . . . . . . . . . . - - - .
Table listing the heat of formation for various oxides [93]. . . . . . . . .
Table listing the parameter values used to calculate BVDG and VT, and
the values determined from measurements. ND,int was measured on
gated Hall structures from processed wafers. ns,ext was measured on
uncapped Hall structures. Measured VT extrapolated from maximum
. . .
- - - - - - - - - - - - - - - -.
slope of gm. . . . . . . . . . . .
Table listing relevant material parameters used for calculating the piezo. . . . . . . . . . . . . . . . . . . ...
electric polarization vector [105] ..
17
33
33
35
81
83
121
18
Chapter 1
Introduction
1.1
Background
The demand for millimeter-wave performance has now progressed beyond its traditional realms of space and military applications. There is a growing consumer market
for millimeter-wave applications in the area of wireless LANs, automotive radar, toll
debiting and other road-to-vehicle communication systems, all operating at frequencies
of 60 GHz and above [1, 2, 3, 41. InP-based FETs are emerging as legitimate contenders
for many of these applications. This class of electronic devices, so named because of
the starting InP substrate, has demonstrated the highest recorded
frn.
fT
(343 GHz) and
(600 GHz), the lowest noise figure and the highest power-added-efficiency of any
solid-state device technology to date [1].
The InP transistor heterostructure that has achieved these record performances
is the InGaAs/InAlAs Modulation-Doped Field-Effect Transistor, or MODFET. Fig.
1.1 shows the cross-section of a typical InP-based InGaAs/InAlAs MODFET. The
epitaxial heterostructure consists of a conducting InGaAs channel sandwiched between
two InAlAs layers, all grown on an InP substrate.
The top InAlAs layer acts as
an insulating barrier between the gate and the InGaAs channel. Because InAlAs is
unstable when exposed to air, this layer must be capped with a more stable material,
such as InGaAs. The dopant atoms in a MODFET structure are introduced outside of
the channel, often in a single atomic layer called a 6-doping layer. This configuration
provides excellent electron mobility, and so this structure is commonly referred to as a
High-Electron-Mobility Transistor, or HEMT.
The InP HEMT energy band diagram is shown in Fig. 1.2. InAlAs is a wide-
19
gate
Figure 1.1: Cross-section of a typical InP-based InAlAs/InGaAs Modulation-Doped
Field-Effect Transistor, or MODFET. Because this configuration provides excellent
electron mobility, this structure is commonly referred to as a High-Electron-Mobility
Transistor, or HEMT.
bandgap semiconductor, and serves as a pseudo-insulator between the metal gate and
the InGaAs channel. The metal gate forms a Schottky contact on InAlAs. The Schottky barrier height, <$B, of the most common gate contact metals on InAlAs is 0.6 eV
to 0.8 eV. High electron mobility is achieved by placing the donor-atoms outside of the
InGaAs channel, which minimizes coulombic scattering of the conducting electrons.
Using an Ino.,5 3Gao.47 As channel (lattice-matched to InP), electron mobilities of about
10,000 cm 2 /V sec at room temperature are routinely achieved on a HEMT structure.
In addition, the conduction band discontinuity between InAlAs and InGaAs is roughly
0.5 eV. This large AEC efficiently confines the electrons in the channel, which leads
to high transconductance and gain, low noise figure and excellent frequency response.
It also allows high electron concentrations and current densities for improved power
performance. The high thermal conductivity of the InP substrate also has distinct
advantages over its GaAs counterpart for high power applications.
Despite the excellent performance of InP HEMTs, their success in the commercial market is far from certain. Barriers for their insertion into future systems include
the high cost and relative immaturity of the InP material system, and long-term reli-
20
Si
S-doping
4B
gate
A
Ec
--------------------------E F
InAlAs
InGaAs
InAlAs
pseudo-insulator
channel
buffer
Ey
Figure 1.2: Energy band diagram of an InP HEMT.
ability issues. The long-term reliability issues are particularly important for satellite
applications, whose 10 to 15 year mission life cycle demands a Mean-time-to-failure
(MTTF) criteria of > 10' hrs. While a number of authors have reported on low-noise
InP HEMTs that pass these stringent requirements, these results are not routine.
1.2
InP HEMT Reliability
The field of InP HEMT reliability is still in its infancy, and the long-term reliability
issues of InP HEMTs have only recently been addressed in the literature. The reliability
of InP HEMTs is currently within an order of magnitude of the more mature GaAs
pseudomorphic-HEMTs (PHEMTs) [3, 4, 5].
While the MTTF of InP HEMTs lags
GaAs PHEMTs, both technologies have reported MTTF > 108 hours at a channel
temperature of 100 C for low-noise devices [3, 4, 5].
This is enough for the most
stringent space requirements. Typical reliability testing of these devices includes d.c.
accelerated life testing at temperatures ranging from 150'C to 270'C, and r.f. burn-in
at 125 C for 1000 - 5000 hours [3]. The parameters of interest are ID at VGS
0 (IDss),
peak transconductance, threshold voltage and reverse gate leakage current, with failure
criteria of either a 20% decrease in IDSS or a 10% decrease in peak transconductance.
The reported degradation activation energies measured for InP HEMTs during these
21
accelerated life tests are as high as 1.9 eV [3].
Initial investigations into the degradation of InP HEMTs have revealed 2 main
degradation mechanisms. The first is increased parasitic resistance due to degradation
of the ohmic contacts [4, 6]. The second mechanism is associated with exposed InAlAs
layers, often accompanied by a significant decrease in channel carrier concentration, n.
[4, 5, 7, 8, 9, 10, 11, 12]. Most authors report that degradation due to exposed InAlAs
layers is significantly reduced or eliminated by passivating this region with a dielectric
such as silicon nitride [4, 10, 11, 12].
In summary, there have been reports of devices in both GaAs PHEMT and InP
HEMT technologies which are able to pass stringent reliability requirements [1, 3].
However, GaAs MESFETs, GaAs PHEMTs and InP HEMTs have all reported unique
degradation in device performance when these test were performed in a hydrogen ambient [13, 14, 15, 16, 17]. Hydrogen partial-pressures of only 2 to 3 Torr have produced
significant reductions in MTTF [14]. These low amounts of hydrogen can come about
when hydrogen out-gasses from packaging material and becomes trapped inside hermetically sealed packages. This problem is likely to worsen with the advent of plastic
packages required in commercial applications. Thus, in nearly all 111-V FET technologies, hydrogen sensitivity poses a serious reliability concern for which there is no known
device-level solution.
1.3
Hydrogen Effects in III-V Semiconductors
The important role of hydrogen in compound semiconductors has been studied extensively [18, 19, 20, 21, 22, 23]. Hydrogen has long been used to passivate defects in compound semiconductors during epitaxial growth [19]. These defect-hydrogen complexes
are very stable, and the hydrogen generally cannot be liberated below temperatures of
about 425 C [18]. However, hydrogen passivation of shallow impurities in compound
semiconductors has also been well documented [20, 21, 22, 23]. This effect is much less
stable. Hydrogen passivates both donors and acceptors, although the mechanism of
passivation appear to be somewhat different. While acceptor passivation most likely
occurs through charge compensation, donor passivation is due to the formation of
hydrogen-donor bonds. This mechanism has been supported through work examining
the thermal stability of donor neutralization, in addition to electrical measurements
22
showing increased mobilities after hydrogen exposure.
In addition to impurity passivation, the effects of hydrogen on semiconductor
surfaces have also been examined in detail [18, 24, 25]. Hydrogen plasmas are often used
for reducing C and N concentrations on semiconductor surfaces [24, 25]. In fact, it is
believed that H plays a crucial role in the effectiveness of passivation layers in improving
device reliability [18]. In this case, hydrogen bonds with free As at the semiconductor
surface.
Free As is known to produce deep surface states, resulting in generation-
recombination centers and surface leakage currents [18].
Hydrogen can remove As
from the surface through the formation of volatile arsine. Subsequent bonding of the
dangling cation (Ga, In or Al) with nitrogen forms a more stable surface configuration
[18].
Despite the volumes of work detailing the effects of hydrogen in semiconductors,
the understanding of why hydrogen in the ambient degrades device performance has
remained cloudy. The problem of hydrogen sensitivity in III-V FETs was first reported
by Camp [13] in 1989. Camp eventually traced the source of degradation in packaged
GaAs MMICs to small amounts of hydrogen trapped within the package.
Further
investigation of this problem revealed that hydrogen was out-gassing from the packaging
material, becoming trapped inside hermetically sealed packages. The packaged MMICs
exhibited significant degradation after only 1 week at 125 C.
Extensive work on GaAs PHEMTs by Hu [14] found that degradation depended
on hydrogen partial pressure. Hu found that the degradation activation energy dropped
from 1.73 eV in pure nitrogen, to 0.98 eV in a hydrogen partial-pressure of 0.76 Torr,
and to just 0.34 eV with a hydrogen partial-pressure of 28.8 Torr [14]. The MTTF for
these devices degraded by more than 7 orders of magnitude, from 10" hours down to
just 104 hours at 60 'C, with a H2 partial-pressure of just 6 Torr.
Along with determining that hydrogen was the source of degradation, Camp [13]
also suggested that Pt in the Ti/Pt/Au gate played a significant role in degradation.
Pt is known to be a catalyst for hydrogen, breaking molecular hydrogen into elemental
hydrogen when H 2 adsorbs onto the Pt surface [26]. Camp proposed that elemental
hydrogen then diffused into the semiconductor and passivated Si donors. This would
explain the observed decrease in drain current and transconductance. The importance
of Pt was further supported by Chao in 1994, where degradation in GaAs PHEMTs
was found to be dependent on the Pt layer thickness [16].
23
However, Chao's work in 1997 showed that Pt was not the whole story [17]. Working again with GaAs PHEMTs, Chao found nearly identical amounts of degradation
in devices fabricated with Ti-only gates, compared to devices with Ti/Pt/Au gates,
although the MTTF was significantly longer. The Ti/Pt/Au gated devices showed a
40% decrease in IDSS after less than 1 hour at 270'C. The onset of significant degradation for the Ti-only gated devices was nearly 5 hours, but they showed equivalent
amounts of degradation after less than 6 hours at 270 C.
Finally, we note that the reported behavior of GaAs PHEMTs and InP HEMTs
is quite different. For GaAs PHEMTs, the threshold voltage shifts positive, with a
corresponding decrease in IDSS [14, 16, 17].
For InP HEMTs, the threshold voltage
is generally reported to shift negative, with a corresponding increase in IDSS[1O, 17]
although there has been at least one case of a reported positive VT shift for an InP
HEMT after hydrogen exposure [17].
A device-level solution to hydrogen sensitivity in III-V FETs has not been reported. Indeed, the only reported solution to this problem is the elimination of the
hydrogen source through packaging selection and pre-treatments [27], or hydrogen gettering within the sealed package [28]. The development of a device-level solution demands a detailed physical understanding of the effects of hydrogen. A major obstacle
to understanding the physics of hydrogen degradation has been the lack of test structures used to study the problem. This has been addressed in this study by developing
an industry-compatible InP HEMT process at MIT's Microsystems Technology Laboratory. This technology enables us to fabricate our own devices and take advantage of
a wide range of test structures. Using these test structures, the physical mechanisms
by which hydrogen degrades InP HEMTs can be isolated and identified.
1.4
Thesis goals and outline
With this background, the goals of this thesis are to understand the physical mechanisms responsible for hydrogen degradation of InP HEMTs.
A key component of
developing this understanding is the fabrication our own devices and test structures.
In order to carry out relevant reliability studies, the MIT InP HEMT process also must
be comparable to processes used in industry. Chapter 2 details the MIT InP HEMT
process developed for this study. An important contribution has been the develop-
24
ment of a high-quality silicon nitride passivation which properly passivates the InAlAs
surface.
The results of systematic experiments performed on these devices and test structures are presented in Chapter 3. These experiments carefully separate thermal degradation from hydrogen-induced degradation. A key result of these experiments is that
hydrogen exposure produces a threshold voltage shift which exhibits gate length and
orientation dependencies consistent with a piezoelectric effect. This leads us to hypothesize that hydrogen exposure leads to the formation of TiH,, which causes compressive
stress in the gate. We also find that the VT shift has an additional component which
is independent of gate length and orientation, which we hypothesize is due to H+ ions
penetrating into the semiconductor. Chapter 3 also presents results of breakdown voltage measurements, from which we hypothesize that hydrogen leads to a decrease of the
carrier concentration in the regions outside of the gate as well.
A discussion of these results in presented in Chapter 4, where we have tested each
hypothesis independently. Material characterization of Ti/Pt bilayers has been used
to confirm 1) the formation of TiHX and 2) the presence of compressive stress after
exposure to hydrogen.
The hypothesis that H+ penetration also occurs was tested
by annealing transistors under various bias conditions.
Hall measurements and X-
ray Photoelectron Spectroscopy have been used to confirm that the extrinsic carrier
concentration decreases due to As desorption from the native oxide of the exposed InAlAs surface. This changes the InAlAs surface stoichiometry, affecting the equilibrium
carrier concentration underneath.
The same set of systematic electrical experiments has also been applied to 0.1
pm InP HEMTs and GaAs PHEMTs obtained from industry. The results of these
experiments are presented in Chapter 5, which show that the picture for short-channel
devices is considerably more complicated. Further studies are therefore warranted.
Finally, the conclusions of this work are presented in Chapter 6, including suggestions for a device-level solution to this problem.
25
26
Chapter 2
Fabrication Technology
The backbone of this thesis is device fabrication.
Equipped with our own process
technology, we have been able to exploit the highly-specialized test structures developed
on the MIT mask set over the last 10 years. The importance of this element cannot
be overstated. To date, the investigation of hydrogen degradation has been largely
limited to a single test structure - the deep-submicron transistor [14, 15, 16, 17]. In
light of the findings of this work, namely that hydrogen degradation is in part due to
the piezoelectric effect, it is easy to see why this key piece of physics has only now been
uncovered.
To ensure that this study is relevant, it is equally important that our process
be compatible with those found in industry. To this end, we have developed an InP
HEMT process which is nearly state-of-the-art. The only exception to this is the use
of optical contact-photolithography to pattern the gates. The transistor gates on most
industrial devices are sub-0.25 pm with T-gates defined by e-beam photolithography.
This process is impractical for defining the 0.6 pm to 10.0 pm gates used in this study.
The advantage of using these long gate-length transistors is that they don't suffer from
short-channel effects, therefore key physical mechanisms are more easily isolated.
The fabrication technology developed for this effort is presented in this chapter.
We will begin by describing the InGaAs/InAlAs InP HEMT heterostructure used in
this study in Section 2.1.
Originally designed for high-power applications, this het-
erostructure is nonetheless comparable to many industrial devices, and has proved to
be an excellent vehicle for hydrogen testing.
Next, the fabrication process is described in Section 2.2. Key features of the
existing MIT InP HEMT process included: alloyed Ni/AuGe/Ni ohmic contacts, a
27
fully selective gate recess technology, a sidewall channel recess and a dielectric-assisted
metal lift-off technology [29, 30, 31]. In addition to adapting this process to the Microsystems Technology Lab at MIT, this work has added two features to the existing
process. The first is an RIE mesa-isolation etch technology, which provides flexibility
for heterostructures containing InP in the epitaxial structure. The second important
addition is a silicon nitride passivation technology. The exposed InAlAs region has
been identified as a key reliability concern [4, 10, 11, 12], and its proper passivation is
essential for credible reliability studies.
Finally, having detailed the heterostructure and fabrication process, Section 2.3
presents the device characteristics yielded by this process.
2.1
Device Heterostructure
The InGaAs/InAlAs heterostructure used in this study is shown in Fig. 2.1. This heterostructure, originally designed for high-power HEMT studies, was grown by molecular
beam epitaxy (MBE) by Bill Hoke at Raytheon, Co. (Andover, MA). All layers were
lattice-matched to the semi-insulating InP substrate. The design contains two 6-doping
layers, located in the InAlAs above and below the channel. The addition of the bottom 6-doping layer in this double-heterostructure design provides added electrons in the
channel without compromising the forward gate swing of the transistor due to parallel
MESFET formation [31]. The InAlAs pseudo-insulating layer is 300A and undoped.
On top of this is an undoped, 70A InGaAs capping layer. In addition to covering the
problematic InAlAs surface, the InGaAs cap has the added benefit of improving the
ohmic contact formation. The undoped cap is typical of a heterostructure designed for
power applications [31].
2.2
Fabrication Process
The fabrication process, briefly summarized in this section, is listed in detail in
Appendix A. The process consists of 5 mask layers defining: electrical isolation,
source/drain ohmic contacts, gates, vias through the Si 3 N4 passivation, and pad metallization. Fig.'s 2.2(a) - 2.2(d) are cartoon illustrations of the process flow.
Fig. 2.2(a): Electrical isolation is achieved by removing all material outside of the
28
70A
InGaAs cap
-doping
InAlAs insulator 270A
30A
InGaAs channel 200A
8-doping InAlAs buffer
2500A
semi-insulating InP
Figure 2.1: InGaAs/InAlAs on InP heterostructure used in this study.
device active area, down to the InP substrate. This is referred to as mesa isolation.
Mesa isolation was done using reactive-ion etching (RIE), and is described in detail
in Section 2.2.1.
Following electrical isolation, a thick Si 3 N 4 layer (-
2000A) was
deposited. This Si 3 N 4 , referred to as the dielectric-assisted lift-off (DALO) layer, aides
in lifting-off metal layers defined by positive photoresist [30].
All photolithography
steps except for the pad metallization use positive photoresist.
Fig. 2.2(b): The source/drain regions were then patterned for ohmic metal deposition. After removing the DALO with buffered-oxide etch (BOE), ohmic metal layers
of 50A Ni/ 1500A AuGe/ 300A Ni were e-beam deposited. The AuGe eutectic is 12%
Ge by weight. Following lift-off, the ohmic contacts were sequentially annealed in an
RTA until the minimum contact resistance was obtained, generally around 355 C for
15 seconds.
Fig. 2.2(c): The gates were defined with a high-resolution Karl Suss M4 aligner (280
- 350 nm source). Using vacuum contact we were able to pattern gate lengths down
to 0.6 pm. Following DALO removal, the InGaAs capping layer was etched-off using
succinic acid based etchant [31, 32]. This etchant etches InGaAs at roughly 11/sec.,
and has a selectivity of InGaAs over InAlAs of >25:1 when the pH is between 5 and
5.6 [32]. The lateral etch rate is even greater at 33X/sec. Thus the cap recess has
the added benefit of recessing the InGaAs at the mesa side-walls, which reduces gate
29
leakage [29]. Following the cap recess, the native oxide was removed by etching in 5%
NH 4 0H for 15 sec. The wafer was then immediately loaded into an e-beam evaporator
for gate metal deposition onto the exposed InAlAs. The gate metalization was 250A
Ti/250A Pt/3000A Au. This metallization is amenable to lift-off techniques, and is by
far the most common in technologies targeted for mm-wave applications [33].
Fig. 2.2(d): Following gate lift-off, the wafer was passivated with a low-temperature,
low-stress ECR-enhanced Si 3 N 4 passivation. This process is described in detail in
Section 2.2.2. Via holes were then patterned and etched into the Si 3 N4 passivation to
provide access to electrical contacts. The final photolithography step defined the pads
used for wafer probing. To ensure that the Si 3 N 4 passivation was not compromised,
the DALO was not removed for pad metal lift-off. The pads were therefore defined in
an image reversal (negative) photoresist.
2.2.1
RIE Mesa Isolation
There is growing interest for including InP in the epitaxial structure of InP HEMTs,
both as the conducting channel and as an etchstop layer, [34, 35, 36, 37, 38]. As a
conducting channel, InP has a number of advantages over InGaAs [34, 35, 36]. InGaAs
suffers from low breakdown voltages and limited power capabilities due to its small
bandgap of only 0.74 eV. InP has a larger bandgap of 1.24 eV, and therefore less
impact ionization, leading to higher breakdown voltages [37, 39]. Although the low-field
mobility of InP (- 5000 cm 2 /Vsec) is inferior to InGaAs (-
10,000 cm 2 /Vsec), its peak
electron velocity is comparable to InGaAs. State-of-the-art 0.1 ptm HEMTs generally
operate in the velocity-overshoot regime, where it is not clear which mechanism limits
the frequency performance. Hence, InP-channel HEMTs may have comparable speed
performance.
The inclusion of a thin InP layer as an etchstop for the critical gate recess step
could have a profound impact on the reproducibility of the HFET fabrication process.
There are several well known etchants available for selectively etching InAlAs and
InGaAs over InP with selectivities of better that 300:1 [37, 38]. Selective gate recessing
using an InP etchstop layer have resulted in a threshold voltage standard deviation of
less than 16 mV across a two inch wafer [38]. This corresponds to controlling the gate
recess depth to within a few angstroms [2].
30
Ni/AuGe/Ni ohmic metal
SiaN4 DALO
InP substrate
(a)
InP substrate
(b)
contact via
Ti/Pt/Au gate
drain
source
metal
InGa s cap recess
(c)
gate
gt.....
pasvio
(d)
Figure 2.2: Process flow diagrams: (a) Mesa isolation and DALO deposition. (b) Ohmic
contact formation using
50A
Ni/ 1500A AuGe/ 300A Ni. (c) Recess of the InGaAs
capping layer and deposition of gate metallization of 250A Ti/ 250A Pt/ 3000A Au.
(d) Top view of device. Si 3 N 4 passivation. Via etching and pad metalization.
31
However, it is precisely this selectivity which makes InP layers in the epitaxy difficult to handle when it comes to mesa isolation. No chemical etchants have been identified which will non-selectively etch both As- and P-containing compounds. And while
there are certainly chemical etchants which etch ternary compounds, the quaternary
compounds that are inevitably formed at the InAlAs/InP or InGaAs/InP interfaces
are poorly etched.
To alleviate this problem, we have developed a reactive ion etch (RIE), enhanced
with an Electron Cyclotron Resonance(ECR) source, using a methane/hydrogen chemistry. This chemistry etches all III-V compound semiconductors to some extent [40,
41, 42]. The etch reaction is essentially a reverse of a metal organic CVD process,
with the formation of trimethyl gallium [(CH 3 ) 3 Ga], trimethyl aluminum [(CH ) A],
3 3
arsine [AsH 3 ] and phosphine [PH 3 ] [43]. Pearton [42] obtained InP and InGaAs etch
rates of roughly 25A/sec. using CH 4 /H 2 (5/17) with a microwave power of 200 W.
However, the InAlAs etch rate was significantly lower, less than 20A/min. This can be
attributed to the low volatility of the Al etch product [42].
To improve the InAlAs etch rate, we have performed the mesa etch at 80 C, which
increases the volatility of the trimethyl aluminum etch product. In addition, it is only
necessary to etch completely through any InP layers in the epitaxy; the remaining
InAlAs buffer can be chemically etched down to the InP substrate. This means that
the methane/hydrogen etch will generally only need to remove 300A - 600A of InAlAs.
The mesa-isolation etch recipe was developed using a Plasmaquest Series II singlechamber, ECR-enhanced RIE/PECVD. This system uses an upstream Nd-Fe-B permanent magnet of 4600 G to generate resonance. Microwaves are transmitted to the
ECR source from a magnetron. The walls of the reaction chamber contain permanent
magnets (1200 G) to focus plasma into center of chamber. The rf source operates at
13.56 MHz, and has a maximum output power of 500W. The final recipe is given in
Table 2.1. The 02 cleaning step at the end is necessary to remove any carbon polymer
that may have re-deposited as an etch byproduct.
This recipe was tested on the wafer samples shown in Fig. 2.3. The wafers were
first coated with a sacrificial Si 3 N 4 layer which was used as a hard mask. After patterning the wafers, the Si 3 N 4 mask was etched in BOE. The photoresist was stripped,
and the wafers then underwent the mesa isolation etch. The etch depth was measured
using a profilometer. The samples were then etched in H 2 SO 4 :H2 0 2 :H2 0 (1:10:220)
32
ECR-Enhanced RIE Mesa Isolation Etch Recipe
Step 1
H2
CH 4
10 sccm
34 sccm
02
-
Microwave Power
rf Power
Pressure
Temperature
Time
200 W
10 W
15 mT
80 0 C
600 sec.
Step 2
-
20 scem
200 W
10 W
15 mT
80 0 C
60 sec.
Table 2.1: Table listing the final recipe for the ECR-enhanced RIE mesa isolation etch.
Mesa Isolation Etch Results
v11051 F970813-1 InP
Sample
1890A
after ECR etch 1380A 1410A
1900A
3000A 2830A
after wet etch
GaAs
1390A
2230A
Table 2.2: Etch depth results for the ECR-enhanced RIE mesa isolation etch.
for 1 min. This etchant, which etches InAlAs at roughly 3500A/min., has a selectivity
of more than 300:1 for InAlAs over InP. The etch depth was measured again after the
wet etch. The Si3 N4 hard mask was then completely removed in BOE.
Table 2.2 gives the profilometer measurements after the mesa-isolation etch, and
again after a subsequent wet etch. The thickness of the Si 3 N4 hard mask has been
subtracted out. The estimated etch rates for the InP and GaAs sample are approximately 380A/min. and 280 A/min., respectively. These etch rates are less than those
obtained by Pearton [42]. We attribute this to a much lower DC bias of less that 50
V compared to 100 V for [42]. The composite etch rate of the heterostructure samples
was comparable to the GaAs sample. Most importantly, the combination of the ECRetch and subsequent wet chemical etch successfully etched down to the InP substrate
for the sample which contained both InP etchstop and InP channel layers.
33
n*lnGaAs cap 120A
n+ InAIAs ~capInnlasscappI70A
170A
I~~ a 0
InAlAs spacer 30A
lnP etchstop 50A
InAlAs insulator 300A
InAlAs insulator 250A
- - - - - - - - - - - -
semi-insultating InP
InP
InGaAs channel 200A
InP channel 300A
InAlAs buffer 1550A
InAlAs buffer 2500A
S.I. inP substrate
S.I. InP substrate
F970813-1
V11051
semi-insulating GaAs
-I
GaAs
Figure 2.3: Wafer samples used to characterize the ECR-enhanced RIE CH 4 /H
isolation etch.
2.2.2
2
mesa-
Silicon Nitride Passivation
Although the field of InP HEMT reliability is still in its infancy, there is a consensus
emerging that exposed InAlAs surfaces hasten degradation [4, 5, 7, 8, 9, 10, 11, 12]. This
is troublesome because some amount of InAlAs is inevitably left exposed after removing
the InGaAs cap prior to gate metal deposition (see Fig.2.2(c)). The reason why exposed
InAlAs leads to degradation is still under investigation. The two possibilities cited most
often are 1) donor passivation due to fluorine diffusing exclusively through InAlAs [5],
[4, 7, 8, 9] or 2) changes in the InAlAs surface potential [10, 11, 12].
While there is still no agreement on the cause of degradation in exposed InAlAs
layers, there is growing agreement that the application of a passivating Si3 N 4 layer
improves or eliminates this degradation [4, 10, 11, 12, 44, 45]. The wide recognition of
this problem makes the development of a suitable Si 3 N 4 passivation essential if we are
to perform credible reliability studies.
In developing our Si 3 N 4 passivation technology, several factors were considered.
First, in order to be an effective environmental barrier, we would like a good quality
dielectric. Second, the deposition technique cannot damage the underlying heterostructure [45, 46, 47].
Finally, the passivation must be very low stress to avoid inducing
changes in the device characteristics due to the piezoelectric effect [48, 49, 50, 51].
34
ECR-Enhanced Silicon Nitride Deposition Recipe
N2
Step 1
6 seem
SiH 4
54 sccm
Microwave Power
rf Power
Pressure
Temperature
Time
200 W
40 mT
800 C
180 sec.
Table 2.3: Table listing the ECR-enhanced Si 3 N 4 deposition recipe for a 600A passivating layer.
The Plasmaquest Series II single-chamber ECR-enhanced RIE/PECVD tool
which was used for the mesa isolation etch was also used to deposit the Si 3 N 4 . The
use of the ECR source leads to plasma ion densities that are an order of magnitude
greater than those of conventional RIE reactors [52].
The improved plasma density
means that a smaller DC bias develops on the wafer substrate, reducing damage due
to ion bombardment [46].
The energetic ions produced by the ECR source require
less thermal activation, which allows the deposition to be done at temperatures as low
as 80 0 C. The low-temperature deposition produces low-stress films. The draw back
of using ECR-enhanced deposition is that the films tend to be columnar with larger
pinhole densities.
The nitride recipe developed for this process is given in Table 2.3. This recipe
produced films with an index of refraction of 1.95 to 2.05, indicating that we have
attained a Si 3 N4 composition (ideally 2.0).
The deposition rate was approximately
200A/min. The BOE etch rate for these films was typically 200A/min., which compares
very well to conventional PECVD nitrides deposited at 250 or 300 C, showing that the
film quality was reasonably good. The film stress was very low, less than the 1 x 10'
dyn/cm 2 resolution of the stress measurement unit. Measured stress values were as
low as 6 x 10' dyn/cm 2 (tensile).
The benefits of the Si 3 N 4 passivation can be seen clearly in Fig. 2.4, which plots
the gate-diode characteristics of a 1 pm device before and after passivation. Here we
see a clear reduction in the gate leakage current, consistent with the observation of
35
1xi02
before
---
passivation
E 1x1
E 1x1o.
after
passivation
01 X10-4
1x103
-2
-1
0
1
VGS (V)
Figure 2.4: Comparison of source-gate diode characteristic of a 1.0 pm transistor before
and after Si 3 N 4 passivation. Measurement with drain floating.
other researchers [18, 10].
There was also a +150 mV shift in the device threshold
voltage, consistent with the findings of
[10].
There was no increase in the device
off-state breakdown voltage, suggesting that the Schottky barrier height, <pB, is not
increasing. The transconductance measurements showed no indication of gate sinking.
The shift in VT is therefore probably a result of a decrease in
risint,
either through donor
passivation by the H 2 plasma, or possibly from H passivation of interface charges. The
diode ideality factor is 1.2, which suggests that there may be a thin interfacial layer
impeding the communication between the InAlAs and the gate metal.
The reduction in leakage current can be understood as the result of a reduction
in the surface leakage contribution [18]. Recent theories have attributed Fermi-level
pinning in III-V's to a large density of antisite defects at the surface [53]. Work on the
GaAs material system has consistently shown excess As at the surface, attributed to
As,
antisites [53, 54]. Free As produces deep surface states which act as generation-
recombination centers [18]. The H2 plasma generated during the Si 3 N 4 deposition can
remove As through the formation of volatile AsH 3 , reducing the number of surface
states. In addition to reducing the surface leakage component, this would also cause
the Fermi level to move toward the valence band, reducing n, underneath. Consistent
with this, we have also observed a reduction in the maximum drain current.
36
600
E 400
E
200-
0.
1.0
0.5
1.5
2.0
VDS (V)
Figure 2.5: Output characteristics for a passivated 0.6 pim transistor.
2.3
Device Characteristics
Fig.'s 2.5 through 2.7 show the characteristics for a passivated 0.6 pum device. The output characteristics (Fig. 2.5) show a maximum drain current of nearly 600 mA/mm,
with a knee voltage between 1.0 and 1.5 V. The maximum drain current corresponds
2
well to the n, and pL measured values of n, = 3.0 x 1012 cm- 2 and I = 9600 cm /Vsec.
The measured peak transconductance (Fig. 2.6) is > 350 mS/mm, giving an intrinsic
peak transconductance of > 580 mS/mm when corrected for the effects of source resistance blow-up in the extrinsic regions [39]. The d.c. source resistance was roughly
0.7 Q - mm, with a contact resistance of 0.5 Q - mm.
Fig. 2.7 shows the results of off-state breakdown voltage measurements using the
drain-current injection technique [55]. The off-state breakdown voltage is defined as
the drain-to-gate voltage required to sustain 1 mA/mm of reverse leakage current out
of the gate. The measurement technique, also shown in Fig. 2.7, injects 1 mA/mm into
the drain. As the VGS is swept negative, pinching off the device, this current is forced
out of the gate. The drain voltage then rises to the value necessary to sustain this
current, defining BVDG. The BVDG value of 6.7 V for a Ti-metal on InAlAs compares
very well to other values reported in the literature.
37
600
E
E
C) 400
E
0
E
C200
E
0
-1.0
0.0
1.0
VGs (V)
Figure 2.6: Transconductance (gm) characteristics of a passivated 0.6 pIm transistor.
gmo is the intrinsic transconductance obtained when gm is corrected for the effects of
source resistance blow-up due to velocity saturation in the extrinsic regions.
8.0
1.0
1 mA/mm
>6.0
>
>
0.8E
0.6
E
E
0.4
k
0.2
-
/
\
4.0
2.0
0.0
0.0
-3
-2
-1
VGS
.'
/
breakdown
measurement
0
VGS (V)
Figure 2.7: Off-state breakdown voltage characteristic of a passivated 0.6 pm transistor.
BVDG defined at Ic=
1 mA/mm.
38
2.4
Summary
In this chapter we have presented the details of the MIT InP HEMT process that was
developed for this study. This process is nearly state-of-the-art, except for the gate
photolithography technology, and is compatible with industry fabrication processes. A
key contribution made in this work has been the development of a low-temperature, lowstress, high-quality Si 3 N4 passivation layer. This Si 3 N 4 properly passivates the exposed
InAlAs layer, which is essential for credible reliability studies. We have presented the
device characteristics yielded by our process, which demonstrates that it is suitable
for reliability studies. The remainder of this work will now be devoted to using these
devices to study the physics of hydrogen degradation of InP HEMTs.
39
40
Chapter 3
Hydrogen Degradation: Electrical
Measurements
Having verified the fabrication process and device performance, we now present the
results of electrical measurements of InP HEMTs before and after exposure to hydrogen.
Because hydrogen is known to interact with surfaces and interfaces, as well as passivate
donors, we have tried to isolate these mechanisms. To aid in this, we have drawn a
distinction between degradation which can occur in the intrinsic portion of the device,
the area directly beneath the gate, and degradation which occurs in the extrinsic regions
on either side of the gate. In addition, we have monitored primitives which are sensitive
to physically meaningful parameters, and whose dependencies are well understood.
For example, to monitor degradation in the intrinsic region, we will use the device
threshold voltage, VT. VT is sensitive to the Schottky barrier height of the gate,
3
B,
and the carrier concentration in the intrinsic region, n,in. In the extrinsic region, we
will use the off-state breakdown voltage, BVDG, to monitor changes in the extrinsic
region. The breakdown voltage is most sensitive to changes in
#B
and to changes in
the carrier concentration in the extrinsic region, n,,ext [56].
Because BVDG is dependent on
#$,
it does not monitor changes only in the
extrinsic regions. However, by monitoring both VT and BVDG, we can exploit their
mutual dependence on
#B
to gain insight into the effects of hydrogen on
41
#B.
3.1
3.1.1
Experimental Procedure
Thermal Burn-in
To accelerate the degradation mechanism, hydrogen exposures were carried out at elevated temperatures. However, our devices exhibited significant changes due to thermal
processing, producing VT shifts greater than 100 mV, which overwhelmed the effects
of hydrogen.
Because of this, all devices underwent a thermal burn-in prior to H 2
exposures in order to separate thermal effects from the effect of H 2 . Fig. 3.1 shows the
device transconductance measurements before and after a burn-in anneal performed in
pure N 2 at 270 C. The main effect of the thermal burn-in was gate sinking of the Ti, in
which Ti reacts with the InAlAs underneath to form a metallic compound. When this
occurs, InAlAs is consumed and the effective insulator thickness decreases. While this
effect is well known for Pt [57, 58], it also occurs to a lesser degree with Ti/Pt layers
[59, 60]. Based on the amount of VT shift, and the increase in the device K-factor, we
estimate that the effective insulator thickness decreases by about 20A. Once the Ti has
fully reacted with the InAlAs, there are no further changes in device characteristics.
For the results presented in this chapter, the devices first underwent a thermal burn-in
at 230'C until no further changes in VT were observed. Generally, this was 1 to 2 hours.
3.1.2
Hydrogen Exposure
The test structures used in this experiment were transistors of varying gate length,
LG, and orientation. On a (100) substrate, devices with gates oriented along the [011],
[010], and [011] were measured, where the [011] orientation has its gate parallel to the
major flat. LG varied from 0.6 pum to 10.0 pum. The devices were exposed to hydrogen
through anneals in forming-gas (5% H 2 in N 2 ) at 200'C. The exposures took place in
a temperature controlled wafer probe station equipped with a sealed chamber allowing
the introduction of either N 2 or forming-gas. The devices were annealed unbiased at
200 C for 3 hours in forming-gas.
For reference, selected devices were annealed in
pure N2 under identical conditions. Detailed room-temperature characterizations were
performed before and after annealing. VT was measured with VDS
0.1 V to sample
n,,intnear the center of the gate. BVDG was measured using the drain-current injection
technique with an
IG=
1 mA/mm criteria, as shown in Fig. 2.7 [55]. In a subset of
devices, AVT was monitored in situ at 200'C as a function of time. Attempts were
42
300 - before
E
burn-in
E
U
-------
20 -
after
IE
E 100burn-in
10
-1.5
-1.0
-0.5
0.0
0.5
VGS (V)
Figure 3.1: Transconductance vs. VGS before and after a thermal burn-in. Device
annealed in N2 at 270 'C for 40 min. The increase in VT and gm are a result of gate
sinking.
made to monitor BVDG in situ. However, measuring BVDG at elevated temperatures
significantly degraded the devices, even during N 2 anneals. Therefore BVDG was only
measured at room temperature.
Following the H 2 degradation exposures, the devices underwent a subsequent
recovery anneal in pure N2 at 200 0 C for up to 24 hours.
This recovery anneal is
designed to see if any of the hydrogen degradation can be annealed out with further
thermal processing in pure N 2 . Recovery behavior has been reported for both GaAs
PHEMTs and InP HEMTs in the literature [16, 17].
AV
was monitored in situ at
200 C as a function of time during the recovery anneal also.
3.2
3.2.1
VT
Results: Intrinsic Region
Pre/Post Degradation Measurements
shifted negative after annealing in forming-gas, as shown in Fig.
3.2.
This is
consistent with previous reports InP HEMTs [10, 16]. While the measured VT shifts
are small, they are statistically significant when compared to the N 2 control. AVT also
showed a distinct LG dependence.
43
a
N2 control, 200 C o
5-
A
1 hrs.
11 hrs.
14 hrs.
0-I---.------------.---------------------------
E -5-[01
0110
>-10 -.
-15-
e
-20
.
0
forming-gas
200 C, 3hr.
2
6
4
6
8
1
10
LG (9M)
Figure 3.2: AVT vs. LG after annealing in forming-gas at 200 0 C for 3 hours. Open
symbols are control samples annealed in N 2 at 2000 C. Error bars on control samples
annealed for longer times indicate standard deviation in measurement over time. VT
defined at ID = 4 mA/mm. Measurements at room temperature.
The orientation dependence of AVT is shown in Fig. 3.3. The [011] devices shifted
the most, followed by the [010], and then the [011].
The LG and orientation dependencies are a key signature of the piezoelectric
effect, and suggests that stress is playing a role in hydrogen degradation [48, 49, 61].
The stress could be coming from either the gate itself, or from the dielectric passivation
layer. Fig. 3.4 shows the results from unpassivated devices which were also annealed
in forming-gas at 200'C for 3 hours. The unpassivated devices show nearly identical
results, indicating that the gate is the source of the stress.
3.2.2
In situ Measurements
We obtain further insight by examining the time evolution of AV.
AVT as a function of V/.
Fig. 3.5 plots
Degradation begins immediately, consistent with behavior
reported for gates containing Pt [16, 17]. Pt is known to catalyze H 2 into 2H, which
speeds up degradation [13, 17]. Initially, the [011] and [011] devices shift in opposite
directions, consistent with a stress-related effect. Fig. 3.5 also shows that this stage of
degradation is also linear in V/.
The rate of degradation decreases for increasing LG.
44
passivated
0-
[011]
S-5-
E
0
.
AA
-10-
[010]
A
...
A. .
....
[011]
<-15-20 40.5
1.0
1.5
LG (9i)
Figure 3.3: Orientation dependence of AVT as a function of LG for passivated devices,
showing greater negative AVT for [011] devices. Forming-gas anneal for 3 hrs. at 200'C.
Measurements at room temperature.
unpassivated
0-
*[011]
*
E
[010]
-10H-
[011]
-200.5
1.0
LG
1.5
Gin)
Figure 3.4: Orientation dependence of AVT as a function of L0 for unpassivated devices. These results are nearly identical to passivated devices, indicating that the
Si 3 N 4 passivation is not a source of stress. Forming-gas anneal for 3 hrs. at 200 'C.
Measurements at room temperature.
45
5N2 reference sample
000ft*
0
-------
-5-10-
[011]
G
eL
= 1.6 gim
GLG3.0
-15
0
.
2
4
1;
6
8
'\t (mi .1/2)
Rm
10
Figure 3.5: AVT vs. v/i for [011] devices during early stages of degradation in forming
gas anneal. Measurements performed in situ at 200'C. VT defined at ID = 5 mA/mm.
The Vi behavior of AVT suggests that early degradation is rate limited by H diffusion
through the gate.
Fig.
3.6 shows AVT vs.
V/t for longer times, and reveals the presence of a
second degradation mechanism in the intrinsic region. After a certain annealing time
in forming-gas there is a sudden drop in VT, followed by almost a complete saturation in
its value. This additional, negative AVT even occurs for devices oriented along the [01h]
direction. The magnitude of the drop is about 8 mV, and appears to be independent
of LG and orientation.
The time required for this sudden drop is proportional to LG.
in Fig. 3.7, which plots AV
This is shown
vs. t/LG. The data in this figure is from a separate
experiment on another die from the same wafer, in which this effect was even more
pronounced.
The fact that the onset of the second mechanism is related to the gate
length suggests that it is limited by lateral diffusion through the gate.
3.2.3
Recovery of Intrinsic Degradation
The time-dependent recovery behavior of AV
AVT vs.
is shown in Fig. 3.8. This figure plots
v/i for data taken in situ at 200'C during the recovery anneal in pure N 2 ,
following H 2 degradation. First, it is apparent that AV
46
recovers for the [011] devices.
-=-LG=
-A-LG= 3.0 m
-+--LG1.0gm
[011]
E
T8
[011]
0.8 Rm
1.6 m
-=
V
~---
-20-
15
10
5
0
ST (in.
1/2
Figure 3.6: AVT vs. v/- for longer times, revealing the presence of a second AVT
mechanism. Measurements performed in situ at 200'C. VT defined at ID-= 5 mA/mm.
--
onset of second
AVT
-A--
-- L=00.6jim
G=
1.6 ptm
LG = 3.0
gm
-- + LG=.m
----- - -- -- --------------
--------------
>0
E
-10
0
30
20
10
t/LG
40
50
(min./km)
Figure 3.7: AVT vs. t/LG, showing that the onset of the second AV mechanism is
linearly proportional to LG. Measurements performed in situ at 200*C. VT defined at
ID = 5 mA/mm.
47
0
-10
-- Le = 1.6 gm
A-L
m
G 3
-20
0
10
20
30
Tl l1/2)
t(min.1
40
Figure 3.8: AVT vs.
/ 7 during N 2 recovery anneal. Linear behavior indicates a
diffusion-limited process. Measurements performed in situ at 200 C. VT defined at
ID
= 5 mA/mm.
The apparent discrepancy between the [011] and [011] devices is addressed in Chap. 4.
The final AVT for short-channel devices is slightly positive. However, the N 2 control
sample, shown in open symbols, is also moving positive after very long anneals. Thus,
the positive AVT may be a result of incomplete burn-in. The linear dependence of AV
on
V/E indicates that recovery is also a diffusion limited process.
3.3
Results: Extrinsic Region
BVDG, the monitor for degradation in the extrinsic region, exhibits a strikingly different
behavior from VT. After annealing in forming-gas at 200 0 C for 3 hours, BVDG increased
on average 0.9 V
(±
0.12 V standard deviation) for all devices, and exhibited no LG
or orientation dependence, as shown in Fig. 3.9. In comparison, the control samples
annealed in N 2 showed only a 0.06 ± 0.17 V change in BVDG.
The ABVDG after a subsequent recovery anneal in N 2 for 15 hours is shown in the
grey squares of Fig. 3.9. In contrast to the AVT behavior, ABVDG shows no recovery
behavior.
48
1.5-
post forming-gas anneal, 200 C, 3 hr.
post N2 recovery anneal, 200 *C, 15 hr.
N2 reference: N2 , 200 *C, 1 hr.
N
*
o
1.0 -
.
mo.m
0.5-
0.0 - ------------------------------------------------'3
0
2
4
6
8
10
LG (9i)
Figure 3.9: ABVDG vs. LG, showing no LG dependence. ABVDG also showed no
orientation dependence, and did not recover. Forming-gas anneal for 3 hrs. at 200 0 C.
Recovery anneal in N 2 at 200'C for 15 hours. Measurements at room temperature.
3.4
Hypothesis
The different behaviors of VT and BVDG leads us to postulate that there are independent
physical mechanisms responsible for degradation in the intrinsic and extrinsic portions
of the device. In addition, the time dependence of the AVT data suggests that there are
two different mechanisms in the intrinsic region. Thus, our hypothesis of how hydrogen
degrades in InP HEMTs consists of three independent mechanism, which are presented
in this section.
3.4.1
Intrinsic Region: the Piezoelectric Effect
The LG and orientation dependence of AVT are key signatures of the piezoelectric effect.
Chao et al. have observed H2 induced degradation in Ti-only gate PHEMTs [17], which
lead them to speculate on the formation of titanium hydride and a change in Schottky
barrier height. This explanation should not result in an LG or orientation dependence.
Instead, the formation of TiH, can affect VT by producing stress in the gate [62]. Since
all III-V semiconductors are piezoelectric, stress in the gate would induce piezoelectric
polarization charges in the heterostructure.
49
In fact, the Ti-H phase diagram shows
that formation of TiH
is possible under our experimental conditions [63], [64].
In
conditions with a low atomic percent of hydrogen such as we have, the formation of
TiH2 precipitates has been reported in monocrystaline a-Ti [63]. These precipitates
have a volume 15% larger than the Ti-matrix [63].
The volume expansion resulting
from TiH2 formation would produce compressive stress in the gate, which would impart
a tensile stress in the underlying semiconductor.
To examine this hypothesis more critically, we now take a closer look at the
LG dependence of AVT.
Using the method of Asbeck, Lee and Chang [48], we can
calculate the LG dependence of a threshold voltage shift due to the piezoelectric effect.
In this calculation, the change in VT is due to a change in the equilibrium electron
concentration in the channel at the center of the gate. The stress-induced piezoelectric
polarization charge density, p,,,, affects the unpaired volume charge density in the
channel. The details of the p,,p calculation are given in Appendix B. The number of
electrons required to compensate the polarization charge in the channel region, ne, can
be calculated by integrating p,,p in the channel at the center of the gate:
n =
tchan
p,,p(x = 0, z)dz
(3.1)
The resulting change in the device threshold voltage, AVT, is calculated from:
AVT
(qn-)ti"
(3.2)
Eins
The results of this calculation are shown in Fig. 3.10.
The stress value used was
1.5 x 109 dyn/cm 2 . Aside from a rigid offset of about 8 mV due to the second AVT
mechanism, the LG and orientation dependencies of AV
model.
are well captured by this
For comparison, a simple calculation of the film stress predicted for a 5%
H2 content and a 15% precipitated volume increase producing a net Av/v of 1%, is
approximately 2.2 x 10' dyn/cm 2 . This value compares very well to the stress used in
this simulation.
Fig. 3.11 is a cartoon illustration summarizing our hypothesis. Here were are
zooming in on the gate region at the drain end of the device. We propose the following
mechanism:
H2 impinges on the Pt surface of the gate. Pt catalyzes the adsorbed
H 2 into 2H, which then diffuses through the gate laterally and vertically. When it
enters the Ti region, it reacts with the Ti to form TiHx. Based on the work of other
50
0
0
E
measured [011_]
measured [01]
.E
-4-
calculated AV
for [01]
-4
-8-8
for [011
S-12-
*
>
calculated AVT
LLG
-16.
0
-8
5
10
LG (9in)
Figure 3.10: Comparison of measured AVT vs. LG data with the predicted AVT due
to piezoelectric effect arising from compressive stress in the gate.
researchers who have examined TiH, reactions under similar H 2 concentrations [63],
we expect the TiH to be in the form of precipitates which have a 15% volume increase
over the Ti-matrix.
This volume increase produces compressive stress in the gate,
which imparts tensile stress to the underlying semiconductor.
Because the semiconductor is piezoelectric, the tensile stress in the semiconductor
produces a polarization volume charge density in the semiconductor, po-P. The heavy
lines in Fig. 3.11 indicate contours of constant charge density for a device oriented in
the [011] direction. A device oriented in the [011] direction would have charges of the
opposite sign (see Appendix B). This effect accounts for the orientation dependence in
AVT. We note that, because AVT is fully recoverable in our devices, the formation of
TiH2 should also be a recoverable process.
3.4.2
Intrinsic Region: H+ Ion Penetration
It is apparent from Fig. 3.10 that the piezoelectric effect does not completely explain
the changes in the intrinsic region. We observe an additional degradation mechanism
which causes a negative AVT, independent of the gate length and orientation. Processes which could explain this are either a decrease in <ps or positive charges within the
semiconductor or at the semiconductor/Ti interface. These positive charges would re-
51
piezoel
charg
Figure 3.11: Cartoon illustration of the proposed H2 degradation mechanism in the
intrinsic region. We hypothesize that H2 exposure leads to the formation of TiH and
compressive stress in the Ti/Pt/Au gate. This imparts tensile stress to the underlying
semiconductor. Because the semiconductor is piezoelectric, this creates a polarization
charge density. The heavy lines indicate contours of constant charge density for a
device oriented in the [011] direction. A device oriented in the [011] direction would
have charges of the opposite sign. This effect accounts for the L0 and orientation
dependencies of AVT.
52
quire additional electrons in the channel to maintain charge neutrality, thereby causing
a negative AVT.
A change in
change in
#B
#B
of about -8 meV is required to produce a AV
of -8 mV. A
could occur from TiH formation affecting the Ti/InAlAs interface. The
formation of a dipole layer at the Ti/InAlAs interface could also change the effective
Schottky barrier height [65, 66]. Dipole formation has been well documented in the
Pd/SiO 2 /Si system [65, 66]. During dipole formation, H diffuses through the metal
and adsorbs onto the inner insulator surface [65].
The H proton becomes separated
from its electron, which remains in the metal [65].
This produces a dipole moment.
The sign of the dipole moment is correct in order to produce a decrease in
However, a decrease in
#B
#B-
of 8 meV would also cause a decrease in BVDG of
roughly 0.6 V. In contrast to this, we observe that BVDG increases by nearly 1 V
(Fig. 3.9).
Even more problematic is the very different recovery behaviors exhibited
by BVDG and VT. The nearly complete recovery of AVT suggests that any decrease in
#B would
be a recoverable process. On the other hand, we see that ABVDG does not
recover. Because of the very different behaviors of AVT and ABVDG, a decrease in
seems unlikely.
B
Next we examine the possibility that positive charges entering the semiconductor
are shifting VT by inducing additional electrons in the channel. We require roughly 2.2
x
1010 cm
2
additional electrons in the channel to produce a decrease in VT of 8 mV.
This is only a 1% change in the n, measured on uncapped Hall structures. This small
increase in the electron concentration due to positive charges would have a negligible
impact on BVDG.
Processes which could be responsible for this effect are positive
interface charges or the penetration of H+ ions into the semiconductor.
First we consider the possibility of positive interface charges. This requires an
interfacial layer between the gate metal and the semiconductor substantial enough to
impede communication of the metal electrons with the interface states. Since our diode
ideality factor is 1.2 - 1.3, this may be possible in our devices [67].
Donor interface
states contribute a positive charge when empty, and are neutral when filled. Acceptor
states are negative when filled, and neutral when empty. If hydrogen filled a donor
state, this would remove a positive charge. On the other hand, if hydrogen filled an
acceptor state, it would add a negative charge. Neutral hydrogen could not contribute
a net positive charge through this mechanism.
53
Finally, we consider the possibility that H+ ions are penetrating into the semiconductor. There is very little work on the H diffusion state in InAlAs [18]. However,
the hydrogen donor level is within the bandgap of nearly all compound semiconductors
[68]. The ionization of H which has diffused into the semiconductor would introduce
positive charges which must be compensated by additional electrons in the channel.
We note that H+ compensation of a filled acceptor state would be indistinguishable
from this effect. The presence of H+ in the InAlAs would change the insulator field
only slightly, and would not impact
#B.
The impact on BVDG would be minimal. In
addition, this mechanism would also be recoverable when the H source is removed.
Based on these arguments, we believe that this mechanism best explains our results.
On a different note, we recall from Fig. 3.7 that the onset this mechanism was
proportional to LG.
Because the onset of this mechanism appears to be controlled
by lateral diffusion through the gate, it is natural to speculate that this occurs when
a critical number of hydrogen atoms have reached the center of the gate. We have
calculated the concentration profiles in the gate using a 1-dimensional model of lateral
diffusion through the gate, assuming constant-concentration boundary conditions [69].
Our results predict that the number of atoms to reach the center of the gate at any
given time would be proportional to L2 rather than LG. We have also examined the
concentration profiles including the effects of diffusion with H absorption [69], or even
diffusion with a chemical reaction [69]. Neither effect explains this linear dependence.
Such a dependence has been observed in glass polymer studies [70, 71, 72, 73].
The source of this behavior was stress-enhanced diffusion. While studying the diffusion
of solvents in the polymer, the phase transition front advanced linearly proportional
to time, and not
Vt
[70, 71, 72]. The phase transition of the polymer caused a volume
expansion and stress in the polymer. The stress gradient acts as a force pushing the
diffusing atoms.
This process is completely analogous to current flow by drift and
diffusion, where the drift term corresponds to the stress gradient [73]. Similar behavior
in our devices is further evidence that stress is developing in the gate region. We
speculate that the second mechanism occurs after the TiH2. phase fronts diffusing from
the edges of the gate meet at the center of the gate.
In summary, we hypothesize that, in addition to the piezoelectric effect, H+ ions
eventually penetrate into the semiconductor. Fig 3.12 is a cartoon illustration of this
process. The presence of H+ in the semiconductor requires additional electrons in the
54
H2
ioni
Figure 3.12: The proposed second mechanism of H2 degradation in the intrinsic region:
H+ ions penetrating into the semiconductor. This effect produces a negative AVT
which is independent of LG and orientation.
channel to maintain charge neutrality. This causes a negative AVT which is independent
of gate length and orientation. This effect would also be recoverable. The onset of this
mechanism was found to be proportional to LG. This unusual time dependence has
been associated with stress-enhanced diffusion in the literature [70, 71, 72]. This leads
us to speculate that H+ ions penetrate into the semiconductor after the Ti has fully
reacted.
3.4.3
Extrinsic Region: Decrease in n,,ext
Finally, we examine degradation in the extrinsic region. The increase in BVDG can be
explained with either an increase in 4B, or a decrease in n,ext [56]. To produce a 0.9
V increase in BVDG, we require an increase in
B of nearly 15 meV. This increase in
#Bis inconsistent
with the negative V shift observed for all devices. Thus we propose
that degradation in the extrinsic region is due to a reduction of n,ext.
The reduction in n,ext required to realize the increase in BVDG is roughly 7 x
1011 cm-2, or about 23%. This reduction of n,,ext could occur through donor passiva-
tion, changes in the extrinsic surface potential or induced piezoelectric charges in the
extrinsic region. Piezoelectric charges are ruled out as the main cause of the n,,ext de-
55
H2
H2
Au
2H
Pt
2H
As-H
Ti
anges
SIationA
Figure 3.13: The proposed degradation mechanism in the extrinsic region: a reduction
in n,,ext either through donor passivation, or through changes in the surface potential
of the exposed InAlAs region.
crease because there is no LG or orientation dependence to ABVDG . Also, the charge
required is more that 1 order of magnitude greater than the piezoelectric charge predicted from AVT. Therefore, we are left with a decrease in n,,.,t either through donor
passivation or changes in the surface potential of the exposed InAlAs. A change in
the surface potential of the exposed InAlAs could come about through As desorption,
leaving behind a cation rich surface [10, 11, 74]. This mechanism can reduce n,,ext by
changing the surface stoichiometry [53, 54]. This effect would not be recoverable. Fig.
3.13 is a cartoon illustration of this mechanism.
3.5
Summary
In this chapter, we have presented the results of systematic electrical measurements
which have carefully separated thermal effects from the effect of H2 on InP HEMTs. To
aid in our analysis, we have drawn a distinction between degradation occurring in the
intrinsic and extrinsic portions of the device. We have used VT to monitor degradation
in the intrinsic region, and BVDG to monitor degradation in the extrinsic region.
In the intrinsic region, we found that VT shifts negative after exposure to hy-
56
drogen. Time dependent measurements of AVT suggest that there are two different
mechanism in the intrinsic region. The first exhibits a gate length and orientation dependence. These dependencies indicate that this mechanism is related to stress. The
second mechanism produces a negative AVT which is independent of LG and device
orientation. N2 recovery anneals performed after H2 degradation show that AVT is
largely recoverable.
In the extrinsic region, BVDG exhibits very different behavior. After exposure
to H2, BVDG increases and does not exhibit a gate length or orientation dependence.
ABVDG is not recoverable with further annealing in N 2 .
Based on these results, we propose that hydrogen affects the intrinsic and extrinsic
regions of InP HEMTs independently. We have postulated three distinct degradation
mechanisms: TiHX formation leading to the piezoelectric effect, H+ ion penetration
into the semiconductor, and a reduction of n, in the extrinsic region. The N 2 recovery
anneals performed after H 2 degradation suggest that the degradation mechanisms in
the intrinsic region are recoverable, while the degradation mechanisms in the extrinsic
region are not.
For the stress-related (piezoelectric) degradation mechanism affecting the intrinsic
region, we have proposed the following explanation: Hydrogen in the ambient impinges
on the Pt surface of the gate. Pt catalyzes H2 into 2H, which diffuses through the gate
structure both laterally and vertically. When it enters the Ti region, it reacts with Ti
to form TiH2. We postulate that this TiH is in the form of precipitates which have a
15% volume increase over the Ti matrix. This increase in volume produces compressive stress in the gate, and tensile stress in the underlying semiconductor. Because the
semiconductor is a piezoelectric material, this stress alters the semiconductor polarization. The charge density arising from the piezoelectric-induced polarization affects the
number of electrons in the channel region, which in tern affects VT. This mechanism
explains the gate length and orientation dependence of AV.
Since AVT is recoverable,
this mechanism should also be recoverable.
The second degradation mechanism in the intrinsic region causes a negative AVT
which is independent of the device gate length and orientation. We hypothesize that
this is due to the eventual penetration of H+ ions into the semiconductor. The effect
would cause an increase in the equilibrium carrier concentration under the gate, leading
to a negative VT shift. It would also be recoverable.
57
In the extrinsic region, we propose that H 2 exposure causes a decrease in the carrier concentration in the extrinsic region, either through donor passivation or through
changes in the InAlAs surface potential. This effect is independent of LG and device
orientation, and should not be recoverable.
In Chapter 4 we will test each of these hypotheses to provide independent verification of the physical mechanisms we have proposed.
58
Chapter 4
Discussion
In Chapter 3, we presented experimental results which indicated that there were three
distinct mechanisms responsible for H 2 degradation in InP HEMTs; we hypothesized
that there are two mechanisms that affect the intrinsic device region, and one mechanism that affects the extrinsic region. In the intrinsic region, we have postulated 1)
that the formation of TiH, during forming-gas anneals creates compressive stress in
the gate and 2) that the H+ ions eventually diffuse into the semiconductor. In the
extrinsic region, we have postulated that hydrogen causes a reduction of n, 9,t.
We have independently tested these hypotheses, and the results are presented in
this chapter. In Section 4.1, we use Auger Electron Spectroscopy to confirm the formation of TiHX. Radius-of-curvature measurements, presented in Section 4.2, confirm the
presence of compressive stress in hydrogenated Ti/Pt films. And finally, the results of
experiments addressing the hypothesis of H+ penetration are discussed in Section 4.3.
Regarding degradation in the extrinsic region, Hall measurements are presented in
Section 4.4 which demonstrate that the reduction in n,ext is associated with the exposed
InAlAs surface. Following this, Section 4.5 presents XPS studies which examine this
surface chemistry in detail, confirming As desorption from the InAlAs surface.
Finally, in Section 4.6 we present a unified picture encompassing both the intrinsic
and extrinsic regions, which shows that the individual hypotheses, when taken as a
whole, are self-consistent.
59
4.1
Confirmation of TiHX Formation
The presence of hydrogen in Ti cannot be detected directly because of its light atomic
weight. Using Auger Electron Spectroscopy (AES), hydrogen can be detected indirectly
through its effects on the valence band density of states and on the energies of core
levels in Ti when TiH2 is formed.
4.1.1
Auger Electron Spectroscopy
Auger Electron Spectroscopy (AES) is a surface characterization technique which uses
an electron beam to scatter electrons from the material under study. Fig. 4.1 shows
an illustration of this process. When an incident electron with energy E scatters an
electron from the core level of the atom, the electron is emitted with a characteristic
energy. The free electron state is then filled with an electron from a higher orbital.
The energy difference between the transition electron and the core electron can either
be emitted as a photon of energy hv = Eemitted - Etransition, or it can be imparted to
another electron. In the latter case, a secondary electron is emitted, called an Auger
electron. In the example of Fig. 4.1, the KL 1 L 2,3 Auger electron emitted in this process
has an energy, E
given by
EA =EK - EL 1 - EL 2 3
(4.1)
where EK is the core electron energy, EL1 is the transition electron energy, and EL,,
is energy of the secondary electron (in the presence of a hole in level EL1 [75]). Each
element has a unique set of Auger energies by which it can be identified. By convention, the spectral information obtained using AES is given in the differential mode by
EdN(E)/dE, and the Auger electron energy is assigned to the relative minimum of
the peak.
4.1.2
Experiment
The test structures used for AES measurements were 250A Ti/ 250A Pt bilayers deposited on Si/Si3 N 4 wafers. Because Ti readily reacts with both Si and 0, the Si wafers
were coated with 1450A of LPCVD Si 3 N4 . The Auger spectra were collected with a
cylindrical mirror analyzer using a primary beam energy of 2 keV and a signal modulation voltage of 2 V peak to peak. The measurement system used a rastered beam to
60
Auger electron
V
valence band
3s 2, 3p/ 2, 3p= ...
EF
or
M1, 2,p3..
2p/ 2, 2pa/
L2,3
-
- EK - EL1
22 Lhv =
2 S 1/2
orbital
designation
K- 1
t
S
--
t
detected in
AES
notation
X-ray Photoelectron
Spectroscopy
Figure 4.1: Diagram depicting the energy transitions which take place when and incident electron with energy Ei ejects a core 181/2 electron. Higher energy electrons
transition into the empty core level. The excess energy is either emitted as a photon,
or is imparted to another electron which is emitted as an Auger electron. To the right
of the energy diagram are the common orbital designations and the nomenclature used
in AES. Diagram adapted from [75].
avoid problems associated with surface decomposition after prolonged electron bombardment [76]. Argon ion sputtering was used to obtain composition profiles through
the structure.
Hydrogen exposure for the AES measurement samples occurred in the same wafer
probe-station in which the transistors were tested. The samples were annealed at 200 C
for 1 hour in forming-gas (5% H 2 in N 2 ). Control samples were annealed in pure N 2
under identical conditions. Following the degradation anneal, some samples underwent
a subsequent recovery anneal in pure N 2 at 200 0 C for 15 hours.
4.1.3
Results
The results of the Auger analysis performed on hydrogenated Ti/Pt test films are
presented in Fig. 4.2, which shows the Auger spectra in the Ti layer, 20A from the
Ti/Pt interface. Relative to the N 2 control sample, the sample annealed in forming-gas
shows a +1 eV shift in the low-energy Ti peak, and the emergence of a prominent second
peak 5 eV below the main peak. These are the characteristic signatures of titanium
hydride [77]. We are focusing on the low-energy (26 eV) MVV Ti peak because, unlike
the other main Ti peaks, this region is not affected by the presence of Ti-O or Ti-N
61
H-induced peak
4
c_
forming-gas
200 C, 1 hr.
250A Ti
1 eV shift
C)
20A
200 0C, 1 hr.
-0-0
a)
10
20
40
30
energy (eV)
Figure 4.2: Auger spectra obtained 20A into the Ti layer after anneals in either forminggas (-) or pure N2 (- -) at 200 C for 1 hour. The 1 eV shift in the low energy Ti
peak, and the emergence of a new peak 5 eV below the main peak, are the characteristic
signature of TiHX.
bondings [64], [78]. Thus, this energy region provides unambiguous evidence of hydride
formation.
Fig. 4.3 shows the depth profile of the Auger spectra in the Ti layer for hydrogenated Ti/Pt samples. Those spectra that show large H-induced peaks and the full
+1 eV shift in the main Ti peak correspond to nearly stoichiometric TiHx compositions, where x approaches 2 [77]. The nearly stoichiometric hydride compositions are
found close to the Ti/Pt interface. As we approach the Si 3N 4 /Ti interface, the hydrides
become increasingly non-stoichiometric. This can be observed by the decrease in the
intensity of the H-induced peak, and the decrease in the +1 eV shift of the main Ti
peak.
To show more clearly the evolution of the hydride composition through the layer,
in Fig. 4.4 we have plotted the ratio of the H-induced peak intensity to the total
(Ti + H-induced) peak intensities as a function of distance into the Ti layer. The
nearly stoichiometric compositions exist only in the first 40A. Upon reaching the Si 3 N4
interface, the H-induced peak has nearly disappeared.
Fig. 4.4 also shows the results obtained from hydrogenated Ti/Pt samples which
62
-depth
cdinto Ti
Ti/Pt
interface
>
__
15
Si 3N/Ti1
ci)I interface
25
20
30
energy (eV)
Figure 4.3: Depth profile of Auger spectra in the Ti layer of Ti/Pt films. The full 1 eV
shift and large H-induced peaks in spectra obtained near Ti/Pt interface indicate near
stoichiometric compositions of TiHX, where x approaches 2. The hydrogen content in
the hydrides decreases with increasing depth into the Ti layer.
were subjected to an additional recovery anneal in pure N 2 at 200'C for 15 hrs. The
recovery of AVT (Fig. 3.8) suggests that TiHx should dissociate upon annealing in N 2.
Consistent with our electrical results, the amount of TiHx detected by AES decreases
following the recovery anneal. The hydride remains only in the upper regions of the
Ti layer near the Ti/Pt interface. It appears that the stoichiometric hydrides are more
stable and remain after the N 2 recovery anneal, and the non-stoichiometric hydrides
decompose.
4.1.4
Discussion
The phase diagram of the Ti-H system shows that the equilibrium system at 200 C for
low to moderate concentrations of hydrogen consists of an a-solution of H in Ti, and
a hydride phase [64]. This hydride phase is normally face-centered cubic (f.c.c.) with
a volume increase, Av/v, of 21% The compositions range from TiH 1.5 to TiH 1.9 f [79].
However, Numakura showed that at very low atomic % of hydrogen (< 20%), hydride
precipitates form which have an face-centered tetragonal (f.c.t.) structure, with Av/v
of 15% [63, 80]. These precipitates are expected to have a TiHi composition [64, 63].
63
peak
2'.806-
(D-
C)
forming-gas
0
anneal
-
Tipeak
0.6 -energy
F0.4-s
D 0.2
after N2
recovery
0.0
0
L
100
200
Depth into Ti (A)
Figure 4.4: Plot of the ratio of the H-induced peak intensity to the total peak intensities
(Ti-peak + H-induced peak), as a function of depth into the Ti layer. Solid line
indicates profile obtained after forming-gas anneal at 200'C for 1 hour. Dashed line
indicates the profile obtained after a subsequent recovery anneal in pure N 2 at 2000 C
for 15 hours. Only the hydrides with near stoichiometric composition remain after
recovery.
64
This f.c.t. titanium hydride is similar to the -- phase f.c.t. hydride precipitate found in
the Zr-H system, which is considered to be metastable because it converts to an f.c.c.
structure upon aging [79, 63]. In contrast to this, the f.c.t. hydride in the Ti-H system
does not revert to the f.c.c. structure upon aging [63]. This is most likely because of
the larger volume increase of the f.c.c. structure, making its formation more difficult.
Nevertheless, the f.c.t. titanium hydride is still considered to be a metastable phase
which forms only at very low H concentrations [63]. In our experiment, the presence
of stable, nearly stoichiometric hydrides near the Ti/Pt interface indicates that the
hydrides in this region may have an f.c.c. structure.
The detection by AES of TiH2 in the Ti/Pt specimens after exposure to hydrogen
coincides with the piezoelectric-induced VT shifts observed by electrical measurements
of the HEMT samples. This supports the hypothesis that the compressive stress produced by the volume increase associated with the formation of TiHX causes changes
in HEMT characteristics due to the piezoelectric effect.
Based on the 15% volume
increase of the f.c.t. precipitates and an equilibrium H concentration of 5%, a simple
calculation predicts the stress due to the 1% overall volume increase to be 2.2 x 10'
dyn/cm 2 . This value compares very well to the simulated stress value of 1.5 x 10'
dyn/cm 2 used in Fig. 3.10.
Likewise, the amount of TiHX detected by AES in hydrogenated Ti/Pt films
decreases after a recovery anneal in pure N2 , which coincides with the recovery of the
VT
shift observed in HEMTs after an identical N2 recovery anneal. It is interesting
to note that while the VT shift fully recovers in the shortest devices (Fig. 3.8), AES
measurements show that some TiH, still remains near the Ti/Pt interface in the Ti/Pt
specimens.
This may indicate that hydrides formed close to the semiconductor/Ti
interface have a greater contribution to the stress fields induced in the semiconductor.
4.1.5
Summary
AES analysis of Ti/Pt bilayers deposited on Si 3 N4 /Si substrates has confirmed that
TiHX forms after exposure to forming-gas at 200'C. After further annealing in N 2 ,
the amount of TiH
detected decreases.
These results are consistent with electrical
measurements of AVT, and support our hypothesis that AV
piezoelectric effect arising from TiHX formation.
65
is partly due to the
4.2
Confirmation of Stress
Having confirmed that TiH2 could form under our experimental conditions, we now
present radius-of-curvature measurements which confirm that Ti/Pt films undergo a
volume expansion leading to compressive stress after exposure to hydrogen.
4.2.1
Radius-of-Curvature Measurements
For thin films deposited on thick, rigid substrates, the edge forces exerted by the film
on the substrate causes the substrate to deform elastically in biaxial bending [81]. If
the biaxial modulus is isotropic in the plane of the substrate, then the film/substrate
composite adopts the shape of a spherical shell [81].
In this case, the stress of the
thin film can be determined by measuring the radius-of-curvature of the film/substrate
composite, giving:
Mh 2
6Rtf
(4.2)
where h is the substrate thickness, tf is the film thickness, and R is the wafer radius.
M is the biaxial elastic modulus, E/(1 - v), calculated from the Young's modulus, E,
and Poisson's ratio, v of the substrate. The elastic bending of the substrate doesn't
depend on the elastic properties (or any other mechanical properties) of the film [81].
For multiple films, each film causes a fixed amount of bending, irrespective of the order
of deposition. The total bending is determined by the stress and thickness of each film
[81].
4.2.2
Experiment
The test samples used in this experiment were 250A Ti/ 250A Pt bilayers deposited on
4" Si substrates coated with 1450A Si3 N 4 , identical to those used in AES measurements.
The radius-of-curvature was measured using a Tencor FLX-2320, with lasers operating
at either 670 or 750 nm. The measurement unit has a heated chuck and gas inlets for
introducing either forming-gas or pure N2 into the ambient. After reaching thermal
equilibrium in pure N 2 , the baseline radius-of-curvature was measured.
During the
anneals, the change in wafer curvature was measured in situ as a function of time,
for temperatures ranging from 50'C to 250'C. Following the forming-gas anneal, the
66
forming-gas anneal
-20.0
--.-
T = 500C
T=100-C
T 2500C
-15.0
-10.0
0>
X
-50
N2 reference
T = 2500C
n-- -----
0.0 - -
0
10
5
15
20
t (min.)
Figure 4.5: Stress in 250A Ti/ 250A Pt films calculated from in situ radius-of-curvature
measurements, showing compressive stress in hydrogenated Ti/Pt films. Solid symbols
for films annealed in forming-gas for 1 hrs at various temperatures. N 2 control sample
annealed for 1 hrs. at 250'C.
ambient gas was switched to N 2 and the recovery behavior of the stress was monitored
as a function of time.
4.2.3
Results
For all temperatures, the wafer bow increased as a result of annealing in forming-gas.
The increase in wafer bow indicates that the Ti/Pt films are undergoing a volume
expansion. This volume expansion represents compressive stress in the film, relative
to its initial state. Fig. 4.5 shows the stress as a function of time for films which were
annealed at 50 C, 100 C, and 250'C. In comparison, the stress of the N2 control sample
remains relatively unchanged throughout the anneal. The stress which develops in the
films is greater for lower temperatures. This behavior can be explained by the increased
entropy of the H molecules at higher temperatures, which decreases their likelihood of
forming TiH2 bonds.
Fig. 4.6 shows the recovery behavior of a sample which underwent a recovery
anneal in N 2 following hydrogenation.
Consistent with the AVT measurements, we
find that the stress in hydrogenated films completely recovers when the ambient gas
67
-20.0-
E
N2
i forming-gas
N2
-15.0-10.01
'-
-5.0
0
0.0
T= 250*C
."
0
100
200
300
t (min.)
Figure 4.6: In situ radius-of-curvature measurements showing that stress in hydrogenated Ti/Pt films recovers after further annealing in N 2 .
is switched from forming-gas to N 2 . At 250 C this recovery takes only 20 minutes.
Fig. 4.6 also shows that some amount of isothermal relaxation occurs even during the
forming-gas anneal.
4.2.4
Discussion
A closer examination of the isothermal relaxation exhibited during the forming-gas
anneal at 250 C reveals a log t dependence, as shown in Fig. 4.7. A log t dependence
during stress relaxation has been associated with a dislocation glide mechanism [81,
82, 83, 84, 85, 861. In this model, isothermal relaxation of stress in thin films is due
to the movement of dislocations [81, 82, 83]. In order for dislocations to move, they
must overcome obstacles such as precipitates, grain boundaries, etc. either through
thermal activation, or through being "pushed" by stresses [81]. In a standard treatment
of this phenomena, U is defined as the activation energy required to overcome an
obstacle through thermal energy, and T is the critical stress required to move the
dislocation through a stress mechanism [81]. If some stress o- is present, the effective
barrier height for dislocation movement is reduced by the factor U(o-/T).
Under
isothermal conditions, the equation describing stress relaxation due to a dislocation
glide mechanism is given by [83, 85]:
68
forming-gas anneal
-20,
E
-15-
-
-10-
0C
0)
X~-
-5+
010
10
10~1
measured
calculated
102
t (min.)
Figure 4.7: Stress relaxation in Ti/Pt films during forming-gas anneal. The log t
dependence indicates stress is relaxing through the movement of dislocations.
o- = o - Pln(1 + Ct)
(4.3)
where o-i is the initial stress in the film [83, 85]. P and C are given by:
_
C
kTo
U
= k
Ax
A
e p
(
(1 -?)
For our samples, the value of TO/U extracted from this analysis for the data in Fig.
4.7 is 13 x 109 dyn/cm 2 /eV. This value compares well to values calculated by other
2
researchers for Au films on Si substrates (15 x 109 dyn/cm /eV) [84] and Al films on
2
/Si substrates (3 x 109 dyn/cm /eV) [85]. This behavior is significant because
recovery of device degradation during H2 exposure has been reported for both GaAs
Si0
2
PHEMTs and InP HEMTs [14, 16].
To examine the kinetics of the stress recovery during the N 2 recovery anneal,
we have plotted the film stress vs. log t for various temperatures in Fig. 4.8. For
low temperatures (50 0 C, 100 0 C), the stress relaxation is relatively well described by a
dislocation glide mechanism. The curve fits for this mechanism were obtained using
the same TO/U value as in Fig. 4.7, and are shown in heavy lines. This approximation
69
-20-
N2 recovery anneal
-P
.
500C
In(1 + Ct)
E-150
-a
A A-.A&\100*C
_10-
-10100
-5-
2000C
250*C
0
10
10
104
102
103
t (min.)
Figure 4.8: Stress relaxation in Ti/Pt films during recovery anneals in N 2 at various
temperatures. For low temperatures, stress relaxation is well described by a dislocation
glide mechanism. Kinetics of stress relaxation at higher temperatures may be governed
by breakup of TiHX.
fails for the higher temperatures of 200'C and 250'C. For the highest temperatures we
speculate that the kinetics of stress relaxation may be governed by the breakup of TiH
[87]. This is in contrast to the 2D problem present in the HEMT samples, where the
AVT recovery exhibited a Vt behavior, indicating that AVT recovery was rate-limited
by H diffusion.
4.2.5
Summary
In situ radius-of-curvature measurements have confirmed that Ti/Pt bilayers undergo a
volume expansion leading to compressive stress after exposure to H 2 . Further annealing
in N 2 at 200 C and 250 C has shown that this stress completely recovers. Both results
are consistent with AVT measurements.
This supports our hypothesis that AVT is
partly due to the piezoelectric effect, and that this effect is recoverable in our samples.
4.3
H+ Ion Penetration
In this section we examine in more detail the origins of the second mechanism causing
degradation in the intrinsic region. The electrical results show that this mechanism
70
causes a negative VT shift on the order of 8 mV, which is independent of gate length and
orientation. In Section 3.4.2, we hypothesized that this second AVT mechanism was
due to H+ ion penetration into the semiconductor. If the second VT shift is indeed due
to H+ ion penetration, then the amount of H+ which diffuses into the semiconductor
should be affected by the application of a bias during annealing.
Here we present
evidence that this mechanism is affected by the application of an electrical bias during
annealing, in support of this hypothesis.
Experiment
4.3.1
To examine H+ penetration, we have annealed a 2.0 pm transistor in forming-gas at
2000 C, unbiased, until the AVT has saturated. The VT was monitored in situ at 200 C
to determine when AV had saturated. We then applied a bias of either -1.5 V or
+0.3 V to the gate, with respect to both the source and the drain, for 20 minute
intervals. A bias of VGS,GD
-1.5 V increases the built-in electric field, opposing H+
±0.3 V reduces the built-in electric field,
ion diffusion. The application of VGS,GD
allowing additional H+ ion diffusion. Measurements of VT were taken in situ at 200 C
to determine the effects of the electrical bias. All VT measurements were taken with
- 0.1
VDS
4.3.2
V.
Results and Discussion
The results of this experiment are shown in Fig. 4.9. This plot shows a slight (10%)
decrease in AV after the application of -1.5 V for 20 min. After the application of a
0.3 V bias, AVT increases by 25%.
The application of a bias during hydrogen annealing modulates the AVT only
0
slightly. The amount of charge required to produce a AV of 8 mV is only 2.2 x 10'
cm- 2 . We can estimate the equilibrium H concentration in the Ti by estimating the
H partial-pressure in the chamber, assuming it to be near atmospheric pressure. We
further assume that the H diffuses in exclusively from the edges of the Pt layer. Under
these assumptions, the equilibrium H concentration at the InAlAs/Ti interface would
be approximately 1.8 x 1012 cm
2
charge that we estimate from AV,
. Comparing this to the total amount of positive
this would indicate just over 1% penetration of
H into the semiconductor. For this heterostructure, the built-in electric field is quite
71
forming-gas anneal, T = 200*C
04
-5I-
VGS
-1.5 V
.10-I
VGS
-15-
0
50
+0.3V
10
150
260
260
t (min.)
Figure 4.9: AVT vs. time for a 2 pm device annealed in forming-gas under various bias
conditions. Solid squares show AVT after annealing unbiased. Open circles indicate
AVT after annealing with a VGS,GD
-1.5 V bias, which increases the built-in electric
field of the device (opposes H+ diffusion). Open triangles indicate AVT after annealing
-0.3 V bias, which reduces the built-in electric field.
with a VGS,GD
72
large at approximately 2.3 x 10' V/cm. From this it seems reasonable to speculate
that the built-in electric field may be much stronger than the diffusive force. With
the biases that we have applied in this experiment, we are able to vary this field from
1.1 to nearly 8 x 105 V/cm. These results may indicate that our ability to modify the
electric field strength, relative to the diffusive force, is limited.
4.4
The decrease in n,ext
Based on the electrical results of degradation in the extrinsic region, we believe that
the increase in BVDG is due to a decrease in n,,ext. We have hypothesized that this
decrease could come about either through donor passivation or through changes in
the surface potential of the exposed InAlAs region. In this section, we present Hall
measurement results which show that the reduction in n,ext is occuring due to changes
in the surface of the exposed InAlAs, and not donor passivation.
4.4.1
Experiment
To address this issue, we have directly measured n, on Hall samples prepared from the
identical heterostructure used in the transistor testing. To improve the accuracy and
repeatability of the measurement, the samples were etched in a cloverleaf pattern with
the mesa chemical etchant. One set of samples retained the InGaAs capping layer.
In the second set of samples, the InGaAs capping layer was selectively etched off in
the center of the sample, leaving the InAlAs insulating layer exposed. The InGaAs
capping layer was left at the corners of the cloverleaf on the uncapped sample to aid
in ohmic contact formation. Non-alloyed ohmic contacts were made with pure In. Hall
measurements determined the carrier concentration and mobility prior to testing. The
samples were then annealed in the wafer probe station in either forming-gas or N2 at
200 C for 1 hour, and then re-measured to determine n, and mobility after thermal
processing. Note that the samples did not undergo a burn-in step prior to testing.
4.4.2
Results and Discussion
The results of this experiment are shown in Fig. 4.10. There was no change in n,
for the capped device under either annealing condition.
For the uncapped devices,
there was a 20% decrease in n, for the forming-gas annealed sample, and less that 10%
73
N2 anneal, 2000C, 1 hrs.
forming-gas anneal, 20000, 1 hrs.
10-
capped
uncapped
samples
samples
capped sample
C
0
uncapped sample
CU
-10-20 Figure 4.10: Measured n, values after annealing in forming gas or N2 . H2 degrades
uncapped structures, but not capped structures. This rules out donor passivation as
the cause of the reduction in n,,ext.
decrease for the sample annealed in N2 . Since it is unlikely that the InGaAs cap is a
significant barrier to hydrogen, this experiments allows us to rule out donor passivation
as the source of the n, reduction.
Based on these results, we attribute ABVDg to a reduction in ns,ext due to H
2
modifying the surface stoichiometry of the exposed InAlAs region. The desorption of
As from InAlAs layers is a well known phenomena [18, 74, 88, 89]. Hydrogen could aid
this process through the formation of volatile arsine, AsH 3 . This would leave behind a
cation-rich surface, which could reduce the carrier concentration underneath [53]. This
effect would not be recoverable in N2 , consistent with our electrical results which show
that the ABVDG is not recoverable.
4.5
Confirmation of As Desorption at the InAlAs
surface
Having demonstrated through Hall measurements of HEMT samples that the decrease
in ns,ext is associated with the surface potential of the exposed InAlAs, we now examine
74
the hypothesis that the change in surface potential is due to As desorption. In this
section, we present the results of X-ray Photoelectron Spectroscopy (XPS) experiments
on uncapped HEMT samples which reveal that As is desorbing from the native oxide.
X-ray Photoelectron Spectroscopy
4.5.1
X-ray Photoelectron Spectroscopy (XPS) is a surface analysis technique closely related
to AES, where the core electrons are scattered using an X-ray source, rather than an
electron beam.
As shown in Fig. 4.1, it is the emitted electron which is detected
in XPS. It is conventional to refer to this electron by its orbital name. Chemical
bonds with other elements cause small but measurable changes in the energy of the
core electron. These differences can be used to assess the constitutive elements of the
surface.
4.5.2
Experiment
The samples used for XPS measurements were InAlAs/InGaAs HEMT samples very
similar to the transistor heterostructure used in the electrical measurements (Fig. 2.1),
with the exception that there is no bottom 8-doping layer. Instead, the second 8-doping
layer in the center of the channel. This should not affect the experiment in any way.
The samples were prepared by selectively etching off the InGaAs capping layer. This
process step occurred anywhere from 1 week to several months before testing. The
samples were annealed in the wafer probe station at 200 C for 1 hour in either N 2 or
forming-gas. The temperature was lowered to 100'C before the samples were exposed
to air. Finally, the chuck was brought down to room temperature, and the samples were
removed for XPS measurements. For comparison, some samples were left untreated.
The XPS measurements were performed using a Physical Electronics Model
5200C X-ray Photoelectron Spectrometer.
The excitation source was an un-
monochromatized Mg X-ray source operating at 300 W. The beam incident angle was
45'. The average escape depth for electrons was 30A. Adsorbed C was used to calibrate
the relative peak positions from different samples.
75
Al-2p
untreated
1.0 - reference
.
N
anneal
0.80.6) 0.4-
0.2 - 13
0.0
72
74
73
75
76
energy (eV)
Figure 4.11: XPS results comparing the Al-2p core level spectra for an uncapped HEMT
samples either untreated or annealed in N2 at 200'C for 1 hour. Raw data is indicated
in the open squares for the untreated sample, and in solid squares for the N2 annealed
sample. The overall curve fits are deconvolved into a substrate component (dark grey)
and a native-oxide component (light grey).
4.5.3
Results
Fig. 4.11 compares the Al-2p core level spectrum from the untreated control sample to
the N2 annealed reference sample. In both samples, deconvolution of the spectra reveals
a substrate AlAs component (-
73.6 eV) and a A12 0 3 native-oxide component (74.3 -
74.7 eV) [90]. This plot shows that the thermal treatment alone causes some amount
of change in the InAlAs surface. There is a distinct shift in the Al-2p spectrum towards
the Al 2 03 bonding energy, with a reduction in the AlAs component and a broadening of
the Al 2 03 component, as a result of the N2 anneal. This finding is consistent with the
Hall measurements presented in Fig. 4.10, which show that the N2 anneal resulted in
a 10% decrease in n.,ext. Note that, unlike the HEMT samples, the Hall measurement
and XPS samples did not undergo a burn-in step prior to testing.
The rest of the results presented in this section will reference samples annealed
in forming-gas to samples annealed in N2 .
Fig. 4.12 compares the Al-2p core level spectra from uncapped HEMT samples
annealed in either N2 or forming-gas.
While there is not a significant shift of the
76
Al-2p
forming-gas anneal
1.0--
,2
N
anneal
=0.8-
,
O.6 -'
C6
O.4 c0.20.0
73
74
75
76
energy (eV)
Figure 4.12: XPS results comparing samples annealed in either N2 or forming-gas at
200 C for 1 hour. The Al(ox)/Al(sub) area ratio of the forming-gas sample increased
by 13%. Values normalized to composite peak height.
composite spectra, deconvolution of the spectra reveals that there is a measurable
difference between the relative peak intensities of the substrate component and the
native-oxide component. Compared to the N2 control sample, the sample annealed
in forming gas showed a 13% increase in the total integrated area of the Al(oxide)
component relative to the Al(substrate) component. There is also a 13% increase in
the Al(oxide)/Al(substrate) peak ratio.
We next examine the As-3d core level spectra. In case of As, the substrate
contains components associated with both InAs (40.6 eV [90], 41.0 eV [91]) and AlAs
(41.0 eV [90]). In addition, the As-3d3 / 2 and As-3d5 / 2 binding energies are within
1 eV of each other [91]. No attempt was made to separate these components. The
oxide components at 44.9 eV for As 2 0 3 [90] and 46.2 eV for As 2 0 5 [90] are sufficiently
far enough removed to avoid confusion. Therefore, we only distinguish between the
As(substrate) (-
Fig.
41.0 eV) and the As(oxide) (-
44.6 eV) components.
4.13 compares As-3d core level spectra for samples annealed in either
forming-gas or N2 . Because the peaks were normalized to the main peak value, there
is no observable difference between the substrate components. However, comparing
the As(oxide)/As(substrate) integrated area ratios, we see that the sample annealed in
77
As-3d
1.00.8-
/.
-N
2
C
forming-gas
aN-a
4-8
0.0
40
42
44
46
energy (eV)
Figure 4.13: Comparison of As-3d spectra from samples annealed in either N2 or
forming-gas at 200'C for 1 hour. The As(ox)/As(sub) area ratio of the sample annealed in forming-gas decreased by 24%.
forming-gas showed a decrease of more than a 24%. There was also a 28% decrease in
the peak ratio.
The In-3d3 / 2 and In-3d5 / 2 core level spectra are shown in Fig. 4.14. For the In3d 5 / 2 spectra, there is a slight broadening of the oxide component and a slight narrowing
of the substrate component producing an 8% decrease in the In(oxide)/In(substrate)
area ratio. The peak height ratios changed by less than 1%. On the other hand, the
In-3d3 / 2 (oxide)/ (substrate) peak ratio and area ratio both decreased by 14% after
annealing in forming-gas. The In data may be complicated by the a large number of
electrons escaping from the bulk of the substrate. This could be a greater problem for
In because the XPS sensitivity to In-3d5 / 2 is nearly 20X more than Al-2p, and 6X more
than As-3d.
We have also examined the effects of a subsequent recovery anneal in N2 on the
InAlAs surface. Fig. 4.15 summarizes the results from Fig.'s 4.12 - 4.14, along with
the N2 recovery anneal results. In this figure we have plotted the percent change in the
(oxide)/(substrate) area ratio for the forming-gas annealed samples and N2 recovery
samples. All numbers are relative to the N2 control sample. These results indicate that
InAlAs surface does not recover after further annealing in N2.
78
.forming-gas anneal
---
N2 anneal
In - 3d 312
\n - 3d5 12
1.0
0.80.6 -
CU
0.4
.D
0.2
0.0 PO
444
442
450
446
452
454
energy (eV)
energy (eV)
Figure 4.14: XPS results comparing In-3d3 / 2 and In-3d5 / 2 spectra from samples
annealed in either N2 or forming-gas. For samples annealed in forming-gas, the
In(ox)/In(sub) area ratio increased by 8% for In-3d5 / 2 , but decreased by 14% for In3d 3 / 2 compared to N2 annealed samples.
forming-gas anneal
M forming-gas anneal + N2 recovery anneal
3
CO)
xo
20
-
10
-
As-3d
l
0Al-2p
0
-10
-
-20
-
-30
-
(N/A)
In-3d,
In-3d5/
Figure 4.15: Bar graphs summarizing the results of XPS measurements of the InAlAs
surface. All numbers are relative to the N2 control sample. Recovery data not available
for In-3d3 / 2 or In-3d5 / 2 .
79
4.5.4
Discussion
The increase in the Al(oxide)/Al(substrate) ratio, combined with the decrease in the
As(oxide)/As(substrate) ratio after exposure to hydrogen are evidence that As is desorbing from the native oxide. Similar effects have been observed on AlGaAs surfaces
[74, 88, 89]. In this reaction, the adsorbtion of H onto the substrate surface leads to
the formation of volatile AsH 3 , with an H20 byproduct [92]. Physisorbed H20 on the
InAlAs substrate can lead to additional cation oxidation and AsH 3 desorption [74, 92].
A balanced reaction would result in the following 2-step process:
2As 2 0
3
+ 18H -+ 6H20 + 4AsH 3
2InAlAs + 6H 2 0 -+ In 2 0
3
+ A12 0
3
+ 2AsH 3
In both cases, the volatile AsH 3 desorbs.
We now consider the question of whether this reaction would cause a change in
the surface stoichiometry. The Fermi level pinning of the InAlAs surface is considered
to be a result of native surface antisite defects [53]. The removal of As antisite defects
from the InAlAs surface wold cause the Fermi level to move toward the valence band,
reducing n,. However, our evidence only suggests that As is desorbing form the native
oxide. If the preceding chemical process dominates, it is not clear that there would be
a change in the surface stoichiometry.
However, we see that the In(oxide) component either increased less than the
Al(oxide), or actually decreased. This behavior may be understood by considering
the heat of formation of the relevant oxides, which are summarized in Table 4.1 [93].
Al 2 03 is significantly more stable than both the indium and arsenic oxides. It seems
reasonable that Al oxidizes preferentially.
In this case, there are two possible paths for the second reaction. Either the In
bonds with the As, or the As desorbs as AsH 3 and leaving excess In at the surface.
2InAlAs + 61120 - 2A12 0 3 + 2InAs + 6H2
or
2InAlAs + 6H 2 0
-+
2Al 2 0 3 + 2AsH 3 + 21n
In both cases, there is a change in the surface stoichiometry. Further experiments using
angle resolved XPS are necessary to ensure that we are not measuring the effects of
electrons being excited from the within the bulk of the substrate.
80
A12 0 3
As 2 0 3
As 2 0 5
AH
(kcal/mol)
-400
-156
-219
In 2 0 3
-222
Table 4.1: Table listing the heat of formation for various oxides [93].
Summary
4.5.5
XPS results from the As-3d and Al-2p spectra indicate that As desorbs from the native
oxide at the InAlAs surface after exposure to H 2 . This supports our hypothesis that
H 2 causes changes in the stoichiometry of the InAlAs surface. No significant changes
in the As-3d and Al-2p spectra were observed after recovery anneals in N 2 (following
H 2 exposure). This indicates that changes in the InAlAs surface are not recoverable,
consistent with BVDG electrical measurements.
4.6
Self-consistency of Hypotheses
So far, we have treated hydrogen degradation in the intrinsic region and extrinsic
regions separately. In fact, VT and BVDG are interdependent. In this section, we will
exploit their interdependence to examine the self-consistency of our hypotheses.
VT and BVDG Models
4.6.1
Using a simple 1-D model we can describe VT,
the threshold voltage in the absence of
hydrogen degradation effects, as:
VTO =0
q
$B
-
(qND,int
Ein,
in, --
1 (AEc
q
+
EN)
(4.4)
#B
is the Schottky barrier height of the gate and ND,int is the donor concentration
in the intrinsic region of the device. Generally, this is the same for the extrinsic region.
are the thickness and permittivity of the InAlAs pseudo-insulator. AEc
tins and Ei,
where
is the conduction band offset between InAlAs and InGaAs. EN is the energy difference
between Ec and EF in the channel under flat-band conditions.
81
The off-state breakdown voltage measurements presented in this work use the
drain-current-injection technique [55], as described in Section 2.3. This measurement
technique defines the off-state breakdown voltage as the drain-gate voltage needed to
sustain 1 mA/mm of reverse leakage current through the gate Schottky diode. In this
case, the tunneling-limited breakdown model provides a reasonable estimation of BVDG
[56].
In the tunneling-limited breakdown model, the tunneling component of the gate
current is calculated by estimating the vertical electric field under the gate as a function
of position along the gate, x [56]. Using a conformal mapping technique [56], [94], this
field can be estimated as:
Egate(x)
-
Ew
6ins
+ 4x )./
(q1s,extD
7r(1+
)/ref
(4.5)
fX
where teff is effective distance of the charge centroid in the channel to the gate, and
XD
is the extent of the channel depletion region into the extrinsic region. Here we have
referred to the channel carrier concentration in the extrinsic region as simply ns,ext. ET
is the magnitude of the vertical electric field in the insulator when the channel region
directly beneath the gate has been fully depleted (i.e. VGS
VT).
Assuming a simple
capacitive model between the gate metal and the channel, this field is estimated as:
E
qND,int(4.6)
Oins
Having estimated the electric field under the gate, the gate current due to thermionicfield emission over the Schottky barrier can be calculated from [56, 95]:
aL 2 mF2gte
IG
L
Ixmin
-4Xqm*
) exp
qm&g
87rhm*B
j
3h~gate(x)
Em*
1dx
j
(4.7)
where m* is the electron effective mass in the semiconductor and mno is the effective
mass in free space.
In considering Eq.'s 4.4 through 4.7, we see that the only parameters that are
input into this model are the structural parameters of the device,
#B, rs,ext
and ND,int-
Using this device description, we can determine the effect on VT and BVDG of individually varying each parameter. This exercise is carried out in Fig. 4.16, which plots
BVDG and VT as a function of
#B,
holding all other parameters constant. The values
used in this calculation are summarized in Table 4.2. The use of 250A for the insulator
82
Parameter Values: Model and Measured
parameter
model value
measured value
tins
250A
0.5 eV
0.35 eV
-
AEc
EN
ND,it
3 x 1012
#B
-
cm- 2
3 x 1012 cm0.63 eV
ns,ext
-
2
3.0 x 1012 cm-2
3 x 1012 cm-2
0.63 eV
VT
-1.27 V
-1.21 V
BVDG
6.7 V
6.4 V
Table 4.2: Table listing the parameter values used to calculate BVDG and VT, and the
values determined from measurements. ND,int was measured on gated Hall structures
from processed wafers. ns,ext was measured on uncapped Hall structures. Measured VT
extrapolated from maximum slope of gm.
thickness includes the effects of gate sinking due to thermal burn-in on our test samples
The calculated and measured values for VT and BVDG match to
within 5%, showing that this models gives a reasonably good description of the device.
(see Section 3.1.1).
Here we see that decreasing
#B
by 100 mV causes VT to decrease by 100 mV, and
causes BVDG to decrease by more than 7 V.
This exercise can be repeated to determine the effects of varying either n,,xt or
ND,int while holding all other parameters constant.
The results of this analysis can
be used to generate a parametric plot ABVDG vs- AVT, which shows the individual
impact of changing
#B,
ns,ext, or ND,int. This parametric plot is shown in Fig. 4.17.
From this plot we see that variations in n,ext and ND,int produce nearly orthogonal
lines. This demonstrates that changes in NDint essentially only affect VT, while changes
in ns,ext only affect BVDG-
4.6.2
Effects of Hydrogen
After exposure to H 2 , we observe changes in both VT and BVDG- We have hypothesized that changes in VT are due to changes in the equilibrium carrier concentration in
the intrinsic region arising from the piezoelectric effect and H+ ions penetrating into
the semiconductor. In Section 3.4.1, we saw that we could estimate the change in the
equilibrium carrier concentration due to stress, n,, from the piezoelectric polarization
83
1-
-1.0
12
-1.1
10
-1.2
8
-1.3
6 >D
-1.4
4
-1.5
0.60
2
0.65
$B (eV)
Figure 4.16: Plot of BVDG and VT vs. qB, showing the impact of varying
and VT, while holding all other parameters constant.
#B on BVDG
Ans,et = 1 x 1011 cm-2
1.0-
0
0.5-
0
0.0-
m
-0.5-1.0 -
0AND,int = 1 x 1010 CM-2
4
U.
A
, El
-20
UAd
= 2 meV
-
0
-10
10
20
AVT (mV)
Figure 4.17: Parametric plot of ABVDG vs. AVT showing the impact of varying #B,
ns,ext, and ND,int, while holding all other parameters constant. Values for A#B, Ans,ext
, and AND indicate the increment between data points. Arrows show direction of
increasing parameter value.
84
(see also Appendix B). n, may be positive or negative, depending on the device orientation. The presence of H+ ions in the semiconductor requires additional electrons in
the channel, which we will denote by nH+.
nH+
is always positive. We can model the
effect of these two mechanisms on VT by:
VT =
1
-$
q
(9ND,inttl
1in
(qmo.)ins
( AEc + EN) ~
q
6ins
-
7ins
q'nH+)tins
(4.8)
6ins
For simplicity, we are assuming that all of the charge is located at the channel/insulator
interface. From Eq. 4.8 we see that n, and nH+ have the same functional dependence
on VT as ND,int, and therefore can be thought of as affecting the effective donor concentration.
To account for the effects of H2 on BVDG we have postulated that ns,ext decreases
due to changes in the Fermi level pinning of the exposed InAlAs surface caused by
hydrogen-induced As desorption. We see from Eq.'s 4.5 - 4.7 that BVDG also depends
on the electric field in the insulator at threshold, which is determined by the effective
donor concentration:
q(ND,int +
Er ~l-
no + nH+)
(4.9)
sins
Finally, we note that, although we have not postulated any change in
OB,
any change
can be simply captured by including a A3B term.
cB
in
4.6.3
Modeling Results
Based on the simulation results from Section 3.4.1, we estimate that
device is approximately 1.9
x
In.j
for a 0.6 pam
1010 cm-2. n, is positive for a [011] device and would
account for a A VT of -7 mV. n, is negative for a [011] device and would account for a
AVT of +7 mV. The number of additional electrons required to compensate H+ ions,
nH+ , is roughly 2.2 x 1010 cm-2, accounting for -8 mV of AV. To account for ABVDG,
we have proposed a reduction in ns,ext of - 7 x 1011 cm-2 due to changes in the InAlAs
surface stoichiometry caused by As desorption.
These hypotheses are shown graphically using the parametric plots developed in
Section 4.6.1 in Fig. 4.18. Fig. 4.18(a) shows this analysis applied to a 0.6 pm [011]
device, and Fig. 4.18(b) shows this analysis applied to a 0.6 pm [011] device. The
85
H2 degradation
H2 degradation
Ans,ext
1.5.
1.5-
.. n
Ans,ext
1.0-
2.'
(90%*
0.5-
*tt0
0.5-
n ...
amlSOr
0.0-
C)
"
a.
*
naU
a
...
0 0.0 - ,
-1.5
0
.
0*
0
-0.5 -
-0.5-
-1.0-
.u
-1.0
U
-20
-1.5
[011]
-10
0
10
[011]
-20
20
-10
0
10
AVT (mV)
AVT (mV)
(a)
(b)
20
Figure 4.18: Parametric plot of ABVDG vS. AVT showing hydrogen degradation for
the 0.6 pim [011] and [011] devices. The center star represents the initial (post burnin) device state. The light gray star shows the device state following the forming-gas
anneal.
white star represents the state of the each device before H 2 degradation, and the light
grey star shows the state of each device following H 2 exposure.
Following the recovery anneal in N 2 , we observe that AVT is recoverable, while
ABVDG is not. We have postulated that piezoelectric effect (n.) and H+ ion diffusion
(nH+) are recoverable, and that As desorption from the InAlAs surface (An,ext) is
not recoverable. Fig. 4.19 shows the results of this analysis, again applied to the 0.6
pm [011] and [011] devices. The apparent difference in recovery behavior for the [011]
and [011] orientations observed in the time-dependent AVT data (Fig. 3.8) can now
be understood. In the [011] devices, we see a competition of two mechanisms, and the
net result is no apparent change in AVT during recovery.
With the aid of these parametric plots, we can now see more clearly why a change
in
#B
seems unlikely. If the second AVT mechanism, which we have attributed to H+
penetration, were instead due to a decrease in #B of 8 mV, this would cause BVDG to
decrease by 0.5 V. This could easily be accommodated by a larger decrease in ns,ext
of 1 x 1012 cm 2 in order to realize a 1 V increase in BVDG. However, since AV
86
N 2 recovery
N2 recovery
nca
1.5-
U.
#
CD0.5-
..
"E
0.5-
0D 0.00
0
as
..
-1.0-
A
A
U
0000
0
@0
-0.5[11
.
-1.0 -
.. "
[011]
-10
0
10
U
[011]
-1.5-20
20
0
A
A
U
"
-20
U
.mE
AU0
0 0.0m -0.5-
U
U
1.0-
1.0-
-1.5-
1.5-
mom
nH+
-10
0
10
AVT (mV)
AVT (mV)
(a)
(b)
20
Figure 4.19: Parametric plot of ABVDG vs- AVT showing the N2 recovery behavior for
the 0.6 pm [011] and [011] devices. The center star represents the initial (post burnin) device state. The light gray star shows the device state following the forming-gas
anneal. The dark grey star shows AVT after the N2 recovery anneal.
is recoverable, we require that the change in 4B also be recoverable. To explain the
apparent lack of recovery in ABVDG, we would require that a portion of the decrease
in ns,ext be recoverable in order to compensate for the effects of a recovery in #B. From
the XPS experiments, we have seen that there is no significant change in the surface
of the InAlAs region following the N2 recovery anneal.
4.6.4
Summary
In this section, we have developed an analytical frame work which examines the interdependency of VT and BVDG- Using relatively simple models for VT and BVDG, we have
developed parametric plots of ABVDG and AV which capture the effects of stress, H+
ion penetration, and As desorption from the InAlAs surface on both AVT and ABVDGThis pictorial representation demonstrates that our hypotheses are self-consistent.
87
4.7
Summary
In this chapter, we examined in detail the hypotheses presented in Section 3.4.
We first examined the hypothesis that AVT is in part due to the piezoelectric effect
arising from TiH, formation in the Ti/Pt/Au gate. Electrical measurements suggested
that this effect was largely recoverable.
that TiH
In this chapter, we independently verified
forms during forming-gas anneals through Auger Electron Spectroscopy
on Ti/Pt bilayers deposited on Si 3 N4 /Si substrates. The amount of TiH
decreased
after further annealing in N 2 , showing that this was indeed a recoverable process.
We further independently confirmed, through radius-of-curvature measurements, that
Ti/Pt bilayers underwent a volume expansion leading to compressive stress.
This
stress completely recovered with further annealing in N 2 . These results convincingly
support our hypothesis that TiH forms in the Ti/Pt/Au gate, and that this produces
compressive stress in the gate.
Next we examined the hypothesis that AVT had a second component due to the
eventual penetration of H+ into the semiconductor. In Section 4.3, we demonstrated
that a portion of the AVT was influenced by biasing the gate during the forming-gas
anneals. The application of a negative bias which would oppose H+ diffusion reduced
AVT, while the application of a positive bias produced a greater AVT. This supports
our hypothesis that the second mechanism involved in degradation in the intrinsic
region may be due to H+ ion penetration into the semiconductor.
Regarding degradation in the extrinsic region, we hypothesized that there was a
reduction in n.,t
caused by either donor passivation or a change in the surface poten-
tial of the exposed InAlAs. Electrical measurements showed that this effect was not
recoverable. In this chapter, we demonstrated through Hall measurements that the
reduction in n occured only in samples with exposed InAlAs, which ruled out donor
passivation. XPS measurements verified that after exposure to hydrogen there was a
reduction of the As in the native oxide of InAlAs layers, changing the surface stoichiometry. Furthermore, this effect did not recover after further annealing in N 2 . Based on
these results, we have refined our hypothesis, and postulate that hydrogen causes As
desorption from the InAlAs native oxide. This changes the surface stoichiometry and
Fermi-pinning of the InAlAs, leading to a reduction of n,,ext.
Finally, we examined the interdependency of the intrinsic and extrinsic degrada-
88
tion mechanisms in Section 4.6. This analysis showed that the individual hypotheses,
when taken as a whole, are self-consistent.
Having established that our hypotheses are sound, in Chapter 5 we will apply
the knowledge we have gained on the MIT devices to 0.1 pm devices obtained from
industry.
89
90
Chapter 5
Impact of Hydrogen on Industry
HEMTs
The MIT devices that we have examined so far in this thesis are important tools for
diagnosing the problem of hydrogen degradation. They present a physical picture which
is not complicated by short-channel effects, and they are well understood. However,
if H 2 degradation were limited to the 20 - 30 mV of AVT that we have observed on
MIT devices, this would be within the AVT tolerance of most processes [2]. In fact,
the AVT's reported on industry devices range from 100 to 400 mV [13, 14, 16, 17].
Therefore, an important next step is to apply the knowledge we have gained on the
long-channel MIT devices to state-of-the-art 0.1 pLm devices from industry.
In this chapter, we present results of hydrogen degradation of industrial 0.1 Pm
strained-channel InP HEMTs and GaAs pseudomorphic-HEMTs (PHEMTs). We have
applied the same systematic set of experiments presented in Chapter 3 to these devices.
Contrary to the results on MIT devices and reports in the literature [10, 16], we have
found that VT shifts positive for InP HEMTs. The AV of GaAs PHEMTs was also
positive, as expected from literature reports [13, 14, 16].
5.1
Experimental Procedure
The devices used for this experiment were 0.1 pm strained-channel InP HEMTs and
GaAs PHEMTs obtained from industry. All devices were oriented in the [011] direction.
Both passivated and unpassivated InP HEMTs were measured. Only passivated GaAs
PHEMTs were measured. The heterostructure details are not available.
The experimental procedure used to test the 0.1 p.m InP HEMTs and GaAs
91
PHEMTs was very similar to that used on the MIT fabricated devices (see Section
3.1).
All samples underwent a thermal burn-in at 250'C - 270'C in N 2 for 1 hour.
The samples were then annealed in the wafer probe station in forming-gas at 200'C.
Recovery anneals on hydrogenated samples were performed at 200 C in pure N2 for 12
hours. The devices were characterized at room temperature before and after hydrogen
exposure, and again after the recovery anneal in N 2 . The VT of one device was monitored in situ at 200 C during the forming-gas and recovery anneals. Control samples
were annealed in N 2 at 200 C for up to 2 hours.
As with the MIT devices, VT was used to monitor degradation in the intrinsic
region, and BVDG was used to monitor degradation in the extrinsic region. VT was
measured with VDS
5.2
5.2.1
0.1 V to sample n,,
near the center of the gate.
Results: Strained-channel InP HEMTs
Pre/Post Anneal Measurements
Fig. 5.1 shows the transconductance measurements before and after hydrogen exposure,
and after the N 2 recovery anneal, for the strained-channel InP HEMTs. Contrary to
results on MIT devices, and to reports in the literature [10, 16], we found that VT shifted
positive for the InP HEMTs by nearly 80 mV. Unpassivated devices showed similar
behavior. Fig. 5.1 also shows that there is roughly a 20% decrease in the maximum
drain current, ID,max. There was no change in the peak transconductance. Following
the N 2 recovery anneal, ID,max partially recovers by about 5 - 10%. VT recovers by 25
mV.
Fig. 5.2 shows the breakdown characteristics for passivated InP HEMTs. Following the forming-gas anneal, we observe a negligible shift in BVDG of ± 5%. For
comparison, the ABVDG of the N 2 control sample was -0.5 V, or about -8%. Following the recovery anneal in N2 for 28 hrs., there was a consistent increase in BVDG Of
roughly 1.5 V, or 25%.
5.2.2
In situ Measurements
The in situ measurements of AVT for both passivated and unpassivated InP HEMTs are
shown in Fig. 5.3. Consistent with results on MIT devices, the presence of passivation
had little effect on AVT. Some amount of AVT recovery during the forming-gas anneal
92
passivated InP HEMTs
-
before degradation
---- after forming-gas anneal
-.-.........after N2 recovery anneal
1000
600
E
-400
C/)
E
500
-200
E
c,)
o'
-0.5
E
0
0.5
0.0
E
E
VGS (V)
Figure 5.1: gm and ID vs. VGS for strained-channel, 0.1 pum InP HEMTs, showing that
VT shifts positive after exposure to forming-gas at 200'C. Measurements taken at 30'C
with VDS -0.1 V.
passivated InP HEMTs
before degradation
---- after forming-gas anneal
-.-..-.....after N2 recovery anneal
6
4
0
0
2
o
-1.5
-0.5
-1.0
0.0
VGS (V)
Figure 5.2: Breakdown characteristics for InP HEMTs. The ±0.5V ABVDG after the
forming-gas anneal is comparable to results on the N2 control sample. Measurements
at 30'C. Breakdown defined at IG= 1 mA/mm.
93
150
E 10050-
N2 control sample
0
2040
60
80
100
t (min.)
Figure 5.3: In situ AVT measurements of passivated and unpassivated strained-channel
InP HEMTs. Both devices exhibit some amount of recovery during forming-gas anneals
at 200'C. Measurements at 200'C with VDS = 0.1 V.
occurred for both devices. This behavior was not observed on the MIT InP HEMTs,
but has been reported for both InP HEMTs and GaAs PHEMTs in the literature
[14, 17].
The behavior of AVT during the N 2 recovery anneal for the passivated InP HEMTs
is shown in Fig.5.4. AVT recovered only 25 mV after 28 hours at 200 'C in pure N .
2
5.3
Results: GaAs PHEMTs
5.3.1
Pre/Post Anneal Measurements
After exposure to H 2 , the VT of GaAs PHEMTs increased, consistent with GaAs
PHEMT behavior reported in the literature [14, 16, 17]. Fig. 5.5 plots the transconductance of several devices measured before and after annealing in forming-gas. The
amount of AVT is more than twice that observed on the InP HEMTs. There is no
indication of a decrease in ID,max- The results of BVDG measurements on the GaAs
PHEMTs were inconclusive due to measurement problems.
Also shown in Fig. 5.5 is the transconductance measured after the recovery anneal
in N 2 . The AVT of most devices recovered by about 150 mV. One device showed a
94
150 r passivated InP HEMT
100
E
>
50
100
10
1000
t (min.)
Figure 5.4: AVT vs. time for passivated InP HEMTs measured during the recovery
anneal in N 2 .
AVT recovery of less that 30 mV. This device was the monitor device for the in situ
measurements during the degradation and N2 recovery anneals (shown below).
5.3.2
In situ Measurements
The in situ AVT for the GaAs PHEMT is presented in Fig. 5.6, showing that VT
shifts positive by more than 300 mV. This plot also reveals the presence of a second
stage in degradation after 100 min. Unlike the InP HEMTs, the AV
of the GaAs
PHEMTs did not recover during the forming-gas anneal. The presence of the second
stage during degradation may indicate that the device was not annealed long enough
to exhibit recovery behavior.
The AV behavior of GaAs PHEMTs during the N 2 recovery anneal is shown in
Fig. 5.7. After initially continuing to increase for nearly 30 minutes, AVT eventually
begins to recover. The total amount of recovery (measured from the peak AVT ) is
roughly 50 mV after 12 hours at 200'C in N 2 . However, as we pointed out in the
previous section, the recovery behavior of the monitor device was significantly different
from the devices which were not measured during degradation. We speculate that the
high temperature measurements may be contributing to degradation in some way.
95
GaAs PHEMT
-
before degradation
- - - - after forming-gas anneal
-....
-after N2 recovery anneal
600
E
E
-,
C/)
-600
E
400
400E
E
E200
0
-200
-1.00
-0.50
0.00
0.50
VGS (V)
Figure 5.5: gm and ID vs. VGS for passivated, GaAs PHEMTs before annealing, after
the forming-gas anneal, and after the recovery anneal in N2 . The positive AVT is more
than twice that of the InP HEMTs. Measurements at room temperature.
GaAs PHEMT
300
forming-gas anneal
E
200
100
-4
0
N2 control sample
-----------------------------
0
100
50
--------
150
t (min.)
Figure 5.6: AVT of the GaAs PHEMT measured in situ during forming-gas anneal at
200'C. N2 control sample shown in open squares.
96
GaAs PHEMT
400-
o0
0
> 300 -
0
SN recovery anneal
2
0
U
200
forming-gas anneal
1000
0
200
400
600
800
t (min.)
Figure 5.7: AVT measured in situ during the recovery anneal at 200'C in N2 for the
GaAs PHEMTs.
5.4
Discussion
The piezoelectric effect that we have hypothesized can only explain a negative VT shift
for devices oriented in the [011] direction. We cannot account for the positive AVT at
this time. In this section we speculate on the possible reasons why these devices might
behave differently from the MIT devices.
There are a number of complications which arise for 0.1 pm gate-length devices.
First, the extrinsic portion of the device plays a more important role in the intrinsic
device characteristics for short-channel devices. If the Debye tail of the extrinsic carrier
concentration is significant compared to the channel length, then ns,ext can affect VT. In
addition, BVDG measurements are more complicated on short-channel devices because
some of the channel depletion charge is imaged on the source end of the gate [96].
A second complication for short-channel devices is that our stress model is no
longer valid for LG <
tf, where tf is the thickness of the stressed film (see Appendix
B). For a 0.1 pm device, this condition is violated for tf > 150A. In this case, a finiteelement simulation is required to accurately calculate the piezoelectric polarization
charge distribution in the semiconductor.
Another important consideration for short-channel devices is the discontinuity
97
in the polarization at the channel/insulator interface. This is negligible for the MIT
devices, and our calculation has neglected this effect. However, a discontinuity in Pez
causes a sheet polarization charge density at this boundary. A discontinuity in Poz
can arise from different piezoelectric coefficients, d 14 , or different stresses in the channel
and insulator regions. This can be seen clearly by considering P,, for an [011] device
(see Appendix B) [48]:
PUz = d14 (o-y
- o-x)
The stress is greater for short-channel devices, and therefore differences in the piezoelectric constant become more important.
Additional complications are possible for strained-channel devices. In strainedchannel heterostructures, the channel is in biaxial compression, while the insulator is
in biaxial tension [97]. Coherent strain alone does not cause piezoelectric polarization
in heterostructures grown on a (100) substrate because all of the stress components
are along the principle axes of the material [97].
However, if the coherent strain is
sufficiently high the material will no longer be in a linear stress-strain regime [98]. In
this case it is possible that the stress induced by the gate will be different for the channel
and insulator regions. This effect could compound any difference in d 14 , increasing the
P,z discontinuity at the channel/insulator interface. This could induce a piezoelectric
polarization surface charge.
While our model fails to predict the positive AVT observed on the short-channel
devices, a close examination of the in situ measurements reveals that AVT exhibited
time dependencies that have been associated with stress-related phenomena in the
literature.
Fig.
5.8 shows AVT during the forming-gas anneals for the InP HEMT and
GaAs PHEMT, re-plotted on a t 5 / 2 scale, revealing a linear dependence. This unusual
time dependence has been associated with the kinetics of hydride precipitation in the
Zr-H system [99].
The Zr-H system is very similar to the Ti-H system [63].
The
precipitates have a platelet geometry and nucleate on grain boundaries at a constant
rate [87, 99].
In this model, nucleation is driven by hydrogen diffusion along grain
boundaries, exhibiting a t 1 / 2 dependency. Due to geometry considerations, the platelet
volume increases at a rate proportional to t. The growth-rate of the hydrided fraction
98
GaAs PHEMT
InP HEMT
150
..
''''
300-
II*
> 100-
20
50
100
0
0
t
12
4)
20
10
0
0.4
0.2
0
t52
(min.52
x 104)
Figure 5.8: AVT vs. t 5 / 2 for 0.1 pm InP HEMTs and GaAs PHEMTS during forminggas anneals at 200'C, revealing a behavior characteristic of hydride precipitation.
3 2
of material is equal to the product of these two processes, giving a t / dependence.
The overall fraction of hydrided material is the time integral of this, and therefore has
a t 5 / 2 dependence. The stress in the material is expected to be proportional to the
fraction of hydrided material [99].
Examining the AVT behavior of both the InP HEMTs and GaAs PHEMTs during the N2 recovery anneal, we find that AVT follows the functional dependence of a
dislocation glide mechanism. Fig. 5.9 shows the AVT vs. log t for both types of devices.
The solid lines in this plot represent the curve fits for this data using an equation of
the form of Eq. 4.3. This equation provides an excellent fit to the data. This suggests
that partial recovery is taking place perhaps due to stress relaxation through grain
boundary or dislocation movement.
5.5
Summary
The same systematic set of measurements that were used to study MIT devices have
been applied to industrial 0.1 pam strained-channel InP HEMTs and GaAs PHEMTs
oriented in the [011] direction. Contrary to MIT devices, and reports in the literature
[10, 16], our measurements found that AVT shifted positive for the InP HEMTs. The
99
N2 recovery
o
400-
E00-
300
measured
calculated
GaAs PHEMT
50
InP HEMT
0 .. ....
...
00
1
10
100
.......
9
1000
t (min.)
Figure 5.9: AVT vs. t for 0.1 pm InP HEMTs and GaAs PHEMTS during N 2 recovery
anneal. AVT recovery is well-described by a dislocation glide mechanism.
VT
of the GaAs PHEMTs also shifted positive, consistent with reports in the literature
[13, 14, 16, 17]. The magnitude of AV for the GaAs PHEMTs is more that twice that
of the InP HEMTs.
Changes in the breakdown voltage of the InP HEMTs after exposure to H 2 were
comparable to changes observed on the N2 control sample. There was, however, a
decrease in the maximum drain current. A clear increase in BVDG was observed on
the InP HEMTs after the N2 recovery anneal. Breakdown voltage measurements of
the GaAs PHEMTs were inconclusive due to measurement problems. There was no
apparent decrease in the maximum drain current of GaAs PHEMTs.
The piezoelectric effect that we have postulated only explains a negative VT shift
for devices oriented in the [011] direction. However, the in situ AVT measurements
reveal unusual time dependencies. These dependencies have been associated with the
kinetics of hydride formation in the Zr-H system in the literature [99].
idence that the AVT is somehow stress-related.
This is ev-
We do not have an explanation of
why AVT shifts positive at this time. We speculate that it may be related to the
short channel and/or channel strain causing a discontinuity in the polarization at the
channel/insulator interface.
100
Chapter 6
Conclusions
This thesis has presented a careful study of the effects of H2 on InP HEMTs.
As
part of this effort, we have developed an industry-compatible InP HEMT fabrication
process in order to fabricate our own devices. This has allowed us to use a variety
of test structures on the MIT mask set in order to diagnose the problem of hydrogen
degradation. A careful test methodology has been developed which separates the effects
of hydrogen degradation in the intrinsic region (the area directly beneath the gate) and
degradation in the extrinsic regions (the area outside of the gate). From this work,
three distinct degradation mechanisms have been identified: two affecting the intrinsic
portion of the device, and one affecting the extrinsic portion of the device.
6.1
Hydrogen Degradation in the Intrinsic Region
The change in the device threshold voltage, AVT, was used to monitor degradation in
0
the intrinsic region. After exposure to H 2 through anneals at 200 C in forming-gas
(5% H2 in N 2 ), AVT shifted negative. A portion of AV
exhibited LG and orientation
dependencies. These dependencies are a key signature of the piezoelectric effect, and
indicate that stress plays a role in H2 degradation. AVT had a second component which
was independent of LG and device orientation. We have hypothesized that this portion
of AVT is due to H+ penetration into the underlying semiconductor.
The changes in VT recovered when the devices underwent a subsequent recovery
anneal in pure N 2 at 200'C.
101
6.1.1
The Piezoelectric Effect
We have found that the portion of AV
which exhibits an LG and orientation de-
pendence is due to the piezoelectric effect. Exposure to H 2 causes TiH2 to form in
the Ti layer of the Ti/Pt/Au gate. This causes the Ti volume to expand, producing
compressive stress in the gate and tensile stress in the semiconductor. Because the
semiconductor is piezoelectric, this stress creates a piezoelectric polarization volume
charge distribution, which affects the equilibrium carrier density in the channel. The
number of electrons in the channel increases for devices oriented in the [011] direction
and decreases for devices oriented in the [011] direction. This change in the intrinsic
carrier concentration causes a shift in the threshold voltage of the device. Calculation
results showed that the orientation and LG dependencies agree with predicted values.
In Chapter 4 we presented results of Auger Electron Spectroscopy measurements
which confirmed the presence of TiH2 in Ti/Pt films which were exposed to H 2 under
identical conditions as the HEMT samples. The amount of TiH2 decreased after recovery anneals in N 2 , consistent with the recovery behavior of AVT. The presence of
compressive stress in Ti/Pt films was confirmed through radius-of-curvature measurements on Ti/Pt films deposited on Si 3 N 4 /Si substrates. The stress completely recovered
after annealing in N 2 at 250'C, again consistent with electrical measurements of AVT.
6.1.2
Hydrogen Ion Penetration
In situ AVT measurements revealed a second degradation mechanism. After a certain
time, there was a negative AVT which was independent of device gate length and
orientation. We have attributed this mechanism to the eventual penetration of H+ into
the semiconductor. This introduces positive charges into the semiconductor that must
be compensated by additional electrons in the channel, thereby shifting VT negative.
In Chapter 4 we presented results that showed that AV
was affected by the
application of a gate bias during degradation, in support of this hypothesis.
6.2
Hydrogen Degradation in the Extrinsic Region
The off-state breakdown voltage, BVDG, was used to monitor degradation in the extrinsic regions. After annealing in forming-gas, BVDG increased. This increase showed no
LG or orientation dependence. ABVDG did not recover with further annealing in N .
2
102
We have hypothesized that the increase in BVDG is due to a decrease in the extrinsic
carrier concentration, ns,ext, due to As desorption from the exposed InAlAs surface in
the cap-recess area next to the gate.
In Chapter 4, we presented the results of Hall measurements on capped and
uncapped HEMT samples which confirmed that the decrease in n, was associated
with the exposed InAlAs surface. X-ray Photoelectron Spectroscopy results further
confirmed that As desorbs from the InAlAs native oxide after exposure to forming-gas.
This changes the surface stoichiometry and Fermi-pinning of the InAlAs, reducing the
carrier concentration underneath. The XPS results also showed that the changes in
the InAlAs surface were not recoverable, consistent with the BVDG measurements.
Future Work
6.3
6.3.1
Short-Channel Devices: Modeling and Experiments
In Chapter 5 we presented results on 0.1 pm InP HEMTs and GaAs PHEMTs which
showed that AVT shifted positive for [011] devices on both types of heterostructures.
The piezoelectric effect that we have postulated only explains a negative AVT for
[011] devices. The presence of short-channel effects complicates many aspects of our
analysis.
Therefore, much work remains in understanding hydrogen degradation on
short-channel devices. Several areas have been identified for improving our hydrogen
degradation model for application to short-channel devices.
First, additional work is required to properly model the piezoelectric polarization
charge distribution in the semiconductor for short-channel devices.
The simplified
stress model that we have used in our calculation is only valid for LG>
6 tf,
where tf
is the thickness of the stressed film. For a 0.1 pm device, this condition is violated for
film thickness greater than 150A. Finite-element simulations are required to determine
the piezoelectric polarization in the semiconductor for short-channel devices.
Along with a more accurate profile of the piezoelectric polarization, a more accurate calculation of its effect on the device electrostatics may also be necessary for
short-channel devices.
Our calculation has neglected the effects of the polarization
discontinuity at the channel/insulator interface. This discontinuity causes a surface
sheet polarization charge. A discontinuity in the polarization can arise from different
piezoelectric coefficients, d 14 , or different stresses in the channel and insulator regions.
103
Strained-channel devices could compound this problem. To accurately calculate the
affects on the equilibrium carrier concentration, better models of semiconductor stress
components and d 1 4 are needed for short-channel devices.
In the area of experimental work, measurements on short-channel devices of different orientations would be immensely helpful in determining if the positive AVT we
observe is due to the piezoelectric effect, or something else such as changes in the extrinsic regions. One important test would be to compare the results of [011], [010] and
[011] devices. Because the [010] orientation has only a P,
component, this orientation
could be free of piezoelectric charges.
Another area of experimental work is to use the MIT mask set to fabricate
strained-channel devices. The analysis used in this thesis could be applied to determine if the biaxially strain in the channel affects the piezoelectric polarization charge
distribution.
6.3.2
Device-Level Solutions
Because the nature of hydrogen degradation in short-channel devices remains unclear,
the suggestions for device-level solutions presented here are based upon the results
on MIT devices. The main degradation mechanism is assumed to be the piezoelectric effect caused by TiHX formation in the Ti/Pt/Au gate. We note that while the
MIT devices exhibited a second degradation mechanism in the intrinsic region, this
second AVT was limited to -8 mV. Unlike the piezoelectric component of AVT, the
second mechanism exhibited no LG dependence, and therefore should not contribute
significantly to degradation in short-channel devices.
The first, and most direct, solution to this problem would be the elimination
of Ti from the gate metallization. This, of course, presents the problem of what its
replacement should be. Refractory metals have traditionally been a problem for lift-off
technologies. However, promising results have recently been published on the use of
WSiN as the gate contact metal layer [100]. While these authors still have Ti/Pt/Au
in the gate metal stack, the Ti layer is far removed from the semiconductor surface.
In addition, our Auger Electron Spectroscopy results indicated that some TiH
remained near the Ti/Pt interface after the N 2 recovery anneal. On the other hand,
the radius-of-curvature measurements showed that the stress was completely eliminated
after the N 2 recovery anneal. This indicates that the InAlAs/Ti interface may play
104
a critical role in determining the stress. Experiments with gate contact metals other
than Ti, such as Pt or Mo, could help to determine the importance of this interface.
Finally, piezoelectric polarization in the semiconductor could be minimized by
choosing a device orientation which minimizes the off-axis stress components. Only
those stress components in directions other than the main crystallographic direction
contribute to the piezoelectric polarization. The [010] device orientation, for example,
has only a P,,y component. Because there is no z component, there is no P,,, discontinuity at the channel/insulator interface. In addition, because P,,y is only a function
of the x and z components, there would be no volume charge distribution. Therefore,
devices oriented in the [010] direction could be free of piezoelectric effects.
105
106
Appendix A:
Fabrication Process Flow
Step 1: Preparations
H 2 SO4:H 2 0 2 :H 2 0 concentrated mesa etchant preparation
Mix
200 ml H20
200 ml H 2 0 2
20 ml H2SO4
Cool
3 hrs.
May be stored.
Cap-recess etchant preparation
60g succinic acid
Mix
300 ml H 2 0 (acid wil not dissolve)
30 ml 30% NH 4 0H
Add
until disolved
Stir
NH 4 0H until pH is approximately 5.2
Add
3 hrs.
Cool
May be stored.
Step 2: Ultra Clean
Parameter
Operation
700C, 2 min.
TCE boil
70 C, 2 min.
TCE boil
iltrasound, 2 min.
Acetone
2 imin.
ultrasound,
Acetone
1 min.
Methanol
DI H2 0 Rinse cascade, 2 min.
Machine
photo-wet-r
photo-wet-r
photo-wet-r
photo-wet-r
photo-wet-r
photo-wet-l
N 2 blow dry
107
Step 3: Mesa Si 3 N 4 Hard Mask Deposition
Operation
Chamber clean
Parameter
recipe: etchclean
Machine
plasmaquest
02: 10 sccm
CF 4 : 30 sccm
microwave: 600 W
r.f.: 50 W
test deposition
pressure: 50 mT
time: 40 min.
recipe: sinrox
N 2 : 5 sccm
plasmaquest
10% SiH 4 : 50 sccm
film check
deposition
microwave: 200 W
pressure: 25 mT
temp: 80 'C
time: 3 min.
thickness: 600A
index of refraction
should be around 2.0
recipe: sinrox
time: 3 min.
thickness: 600A
Gartner ellipsometer
(Rm. 13-4042)
plasmaquest
Step 4: Solvent Clean
Operation
Acetone
Acetone
Methanol
Parameter
ultrasound, 2 min.
ultrasound, 2 min.
1 min.
DI H 2 0 Rinse
N 2 blow dry
cascade, 2 min.
Machine
photo-wet-r
photo-wet-r
photo-wet-r
photo-wet-1
Step 5: Mesa Photolithography
108
Operation
HMDS Prime
coat
Soft bake
Pattern
Develop
DI Rinse
N 2 blow dry
Parameter
25 min., 150 0 C
Resist: KTI 820-27cSt
Coat: 750 rpm, 8 sec.
Spin: 4000 rpm, 30 sec.
Thickness: 0.8 pm
900 C, 30 min.
Mask ID :mesa
Exposure : 15 sec.
OCG-934 1:1
1:30 min, with agitation
Cascade, 2min.
Machine
HMDS
coater
prebake
ksaligner2
photo-wet-r
photo-wet-r
Step 6: Mesa Hard Mask Etch
Operation
Resist descum
Machine
pecvd-rie
Parameter
recipe: descum
02: 25% (25 sccm)
Nitride Etch
Resist descum
Pwr: 10% (23 W)
Psr: 120 mT
time: 45 sec.
(remove 100-300 A)
recipe: etchsin
02: 10% (10 sccm)
CF 4 : 80 % (34 sccm)
r.f.: 25% (75 W)
Psr: 50 mT
Time: 3 min.
recipe: descum
time: 45 sec.
pecvd-rie
dektak
acid-hood
Measure
BOE dip
pecvd-rie
BOE (7:1), 30 sec.
Step 7: Mesa Etch
109
Operation
Solvent clean
Parameter
(if mesa etch is
not immediately after
hard mask etch)
Machine
photo-wet-r
Chamber clean
Mesa etch
recipe: etchclean
recipe: etchmesa
N 2 : 34 sccm
plasmaquest
plasmaquest
CH 4 : 10 sccm
microwave: 200 W
r.f.: 10 W
pressure: 15 mT
temp 80 'C
time 5 min.
(Note: 02 clean added
to remove C polymer)
step height
mesa etchant
concentrate:H 2 0 1:10
(H 2SO 4 :H2 0 2 :H2 0 1:10:220)
Measure
Wet etch
Remove hard mask
Measure
dektak
acid-hood
time: 1 min.
BOE (7:1), 3 min.
step height
dektak
Step 8: DALO (Dielectric-Assisted Lift-off) La yer Deposition
Operation
Solvent clean
chamber clean
chamber prep.
Parameter
see Step 4
recipe: etchclean
recipe: sinrox
Machine
photo-wet-r
plasmaquest
plasmaquest
time: 20 min.
stress test
recipe: sinrox
Si stress monitor
plasmaquest
time: 10 min.
nominal thickness: 2000A
film check
index of refraction
should be around 2.0
stress check
Analysis Lab (13-4042)
should be < 2 x 109 dyne/cm2
deposition
recipe: sinrox
Gartner ellipsometer
(Rm. 13-4042)
Tencor FLX-2320
plasmaquest
time: 10 min.
nominal thickness: 2000A
110
Step 9: S/D Ohmic Photolithography
Parameter
Operation
Solvent clean see Step 4
HMDS Prime 25 min., 150 0 C
Resist: KTI 820-27cSt
Coat
Coat: 750 rpm, 8 sec.
Spin: 4000 rpm, 30 sec.
Thickness: 0.8 pm
900 C, 30 min.
Soft bake
Mask ID :OHMIC
Pattern
Exposure : 15 sec.
OCG-934 1:1
Develop
1:30 min, with agitation
cascade, 2 min.
DI Rinse
N2 blow dry
Machine
photo-wet-r
HMDS
coater
prebake
ksaligner2
photo-wet-r
photo-wet-r
Step 10: DALO etcl
Operation
Resist descum
Nitride Etch
Resist descum
Parameter
recipe: descum
time: 45 sec.
recipe: etchsin
time: 5 min.
clear all but 300 - 500A
recipe: descum
time: 45 sec.
Measure
BOE dip
ultrasound, BOE (7:1)
until Si test piece
becomes hydrophobic
Step 11: Ohmic Metal Deposition
Operation
evaporation
Parameter
Ni/AuGe/Ni
Machine
e-beam
50A/1500A/300A
Step 12: S/D Ohmic Metal Lift-off
111
Machine
pecvd-rie
pecvd-rie
pecvd-rie
dektak
acid-hood
Operation
Acetone
Acetone
Acetone
Methanol
Parameter
soak, until starts to clear
ultrasound, until clear
ultrasound, 2 min.
DI H 2 0
cascade rinse, 2 min.
rinse, 1 min.
Machine
photo-wet-r
photo-wet-r
photo-wet-r
photo-wet-r
photo-wet-r
N 2 blow dry
Step 13: Ohmic Metal RTA
Operation
RTA
Parameter
test piece clipped from sample
Machine
rta35
recipe: ROX335
Measure
RTA
Measure
sequential anneal starting at 350 C
until minimum contact resistance is obtained
Contact resistance
sample
temperature determined from test piece
Contact resistance
Step 14: Gate Photolithography
Operation
Solvent clean
Parameter
see Step 4
Machine
photo-wet-r
HMDS Prime
25 min., 150 0 C
HMDS
Coat
Resist: KTI 820-27cSt
Coat: 750 rpm, 8 sec.
Spin: 4000 rpm, 30 sec.
Thickness: 0.8 pm
coater
Soft bake
90 0 C, 30 min.
prebake
Pattern
Mask ID: GATE
Exposure: calibrate
Contact: vacuum
OCG-934 1:1
1:30 min, with agitation
cascade, 2min.
ksaligner2
Develop
DI Rinse
N2 blow dry
Step 15: DALO etch
112
photo-wet-r
photo-wet-r
i-v probe
i-v probe
see Step 10
Step 16: InAlAs Cap Recess
CALIBRATION SAMPLE PREPARATION
Operation
Paint photoresist
Pre-bake
Parameter
KTI 820-27cSt
InAlAs/InGaAs sample
90 C, 30 min.
Machine
ETCHANT PREPARATION
Operation
pH check
Mix
Parameter
Check SA solution for pH of 5.4.
Adjust pH by adding NH 4 0H
SA:H 2 0 2 6:1
Machine
acid-hood
acid-hood
ETCH CALIBRATION
Nominal InGaAs etch rate: 11 /sec.
Operation
etch
Measure
Parameter
cal. sample 1: 20 sec.
cal. sample 2: 40 sec.
cal. sample 3: 60 sec.
verify etch stop (70 A)
Machine
acid-hood
dektak
GATE RECESS ETCH
Operation
Etch
DI rinse
native oxide strip
Parameter
sample: 40 sec.
2 min.
Machine
acid-hood
5% NH 4 0H
15 sec.
acid-hood
N 2 blow dry
NO DI RINSE
************
LOAD IMMEDIATELY INTO E-BEAM EVAPORATOR *
Step 17: Gate Metal Evaporation
113
Operation
evaporation
Parameter
Ti/Pt/Au
250A/250A/3000A
Machine
e-beam
Step 18: Gate Metal Lift-off
see Step 12
Step 19: Si 3 N 4 Passivation Deposition
Operation
chamber clean
chamber prep.
stress test
film check
stress check
deposition
Parameter
recipe: etchclean
recipe: sinrox
time: 20 min.
recipe: sinrox
Si stress monitor
time: 3 min.
nominal thickness: 600A
index of refraction
should be around 2.0
Machine
plasmaquest
plasmaquest
plasmaquest
Gartner ellipsometer
(Rm. 13-4042)
Analysis Lab (13-4042)
Tencor FLX-2320
should be less than 1 x 109 dyne/cm 2
recipe: sinrox
time: 3 min.
nominal thickness: 600A
plasmaquest
Step 20: Via Photolithography
114
Operation
Solvent clean
HMDS Prime
Coat
Soft bake
Pattern
Develop
DI Rinse
Parameter
see Step 4
25 min., 1500C
Resist: KTI 820-27cSt
Coat: 750 rpm, 8 sec.
Spin: 4000 rpm, 30 sec.
Thickness: 0.8 pLm
900C, 30 min.
Mask ID: VIA
Exposure: 15 sec.
OCG-934 1:1
1:30 min, with agitation
cascade, 2min.
Machine
photo-wet-r
HMDS
coater
prebake
ksaligner2
photo-wet-r
photo-wet-r
N 2 blow dry
Step 21: Passivation Etch
Operation
Resist descum
Nitride Etch
Resist descum
Machine
pecvd-rie
Parameter
recipe: descum
time: 45 sec.
recipe: etchsin
time: 1 min.
recipe: descum
time: 45 sec.
pecvd-rie
pecvd-rie
Measure
BOE dip
ultrasound, BOE (7:1)
until Si test piece
becomes hydrophobic
Step 22: Pad Photolithography
115
dektak
acid-hood
Operation
Solvent clean
HMDS Prime
Coat
Soft bake
Pattern
Parameter
see Step 4
25 min., 150 0 C
Resist: AZ5214-E (Image reversal)
Coat: 750rpm, 8sec.
Spin: 4000 rpm, 30 sec.
Machine
photo-wet-r
90 0 C, 30 min.
Mask ID: METI
prebake
ksaligner2
HMDS
coater
Exposure: 20 sec.
Post bake
Flood exposure
Develop
DI Rinse
N 2 blow dry
120 0 C, 90 sec.
240 sec.
AZ422MIF
1:30 min, with agitation
photo-wet-r
cascade, 2min.
photo-wet-r
Step 23: Photoresist descum etch
Operation
Resist descum
Parameter
recipe: descum
time: 45 sec.
Machine
pecvd-rie
Step 24: Pad Metal Evaporation
Operation
evaporation
Parameter
Ti/Pt/Au
Machine
e-beam
250A/250A/3000A
Step 25: Pad Metal Lift-off
see Step 12
116
Appendix B:
Calculation of Piezoelectric Polarization
To calculate the charge distribution in the semiconductor due to the piezoelectric effect,
we will use the stress model of Belch and Meiren
[101],
as shown in Fig. 1. The gate
is modeled as a thin film of thickness tf. The stress in the gate, U, is assumed to be
uniform. There is no net force on the semiconductor from the stress near the center
of the gate because the elemental forces cancel each other. However, near the edges of
the gate there is a strong stress gradient which exerts a force on the semiconductor.
For LG>>
tf the net forces arising from the gate stress are well captured by modeling
them as an incremental force acting at the edge of the gate with a value of F = o-tf
[102]. The incremental displacement on an elemental volume is calculated as [101]
du
_L) +x
=Fdy(A( B(L
rL
1 r
+C
(
)+
2
2
x
2
.4-7)
ri
r I
2
-x.-(
dv = Fdy(A
dw = Fdy(A
[
] C [-(
r
-
r
2C y-y
-
12
1
-
A
r3
r
_
+ C [ rj
=1+Iv
27rE
117
r
__
Yrl)
)
(r2
X2Y
r2(z+r2)
1
)
(1
(2)
(3)
Figure 1: Diagram depicting the model used for calculating the stress in the semiconductor resulting from compressive stress in the gate. Fig. adapted from [101].
B =3-4v
_ (1+ v)(1 - 2v)
2irE
C
where y and E are Poisson's ratio and Young's modulus of the semiconductor. The
total displacements are found from integrating along the length of the gate, giving
[103]:
du= 2F[ (AB - C)ln(r)+A(}-4)
uj
Vj
w
=
dw = 2
0
2A(xz
l
L=
dy=
=+0
/
Exx
0
- x2z)
+ 2C(cos-'(-) - cos- 1())r2
2r
The shear and elastic strains are found from
du
d
dx
118
(4)
(5)
I
j
(6)
dw
dz
dw
dx
1 du
2 dz
zlt
The shear and elastic stresses are related to the strains through:
(A + 2 p)cx2 + Aezz
o-22
-
0YY
= Acxx + AEzz
ozz
= AEx2 + (A + 2p)Ezz
o-xz
=
2pLEXZ
where A and y are the Lam6 constant and Voight average shear modulus of the material.
These values can be calculated from the material stress coefficients, Cj, giving:
1
-H
y=C44 -
1
-H
C12 -
A
H
5
-2C44
5
+ C12 - Cn
These values are related to E and v through the relationships:
p(3A + 2t)
A
2(pL + A)
From these relationships, the stresses and strains can be calculated for a given geometry.
The non-zero stress tensor components calculated from Eq.'s 4 and 6 for the geometry
of Fig. 1 are [48]:
2F x
X(7)
o2 = 4 r4)
2Fu X 1 X 2
wF (-r1
r22)(8
2F x1z 2
x 2z2
o-YY
ozz
4
A 1
2F xIZ
o-xz
=4)
K
119
1
4)
-
T2
X2z
T2
(8)
(9)
(10)
To determine the polarization vector induced by this stress, we multiply the
stress tensor by the piezoelectric stress coefficients of the material, dig. For zinc-blende
structures, only the off-axis piezoelectric stress coefficients have non-zero values. The
resulting polarization due to stress, P, is given by [104]:
Po,,
=
d14ojk,
j / k
where d 14 is the piezoelectric stress coefficient of the material.
However, the piezoelectric coefficients are defined with respect to the principle
crystallographic directions of the material [104]. To determine the induced polarization,
oij must be transformed into the coordinate system of the principle crystallographic
directions.
After calculating P, the result is transformed back into the coordinate
system of the device. Fig. 2 shows the relationship of the crystallographic directions
to the geometry of Fig. 1. The coordinate system of the crystal is rotated about the
z axis of the device geometry. The transformation matrix to rotate the coordinate
system by p degrees about the z axis is given by [105]:
cos W
0
-sin W cos W 0
=
Ti
sin p
0
0
1
The transformed tensor components are calculated from the transformation matrix:
o-ij =
1: T(T
im
1
j o im
m
where o-ij is the stress tensor in the device coordinate system, and o-
is the stress
tensor in the coordinate system of the principle crystallographic directions.
After the transformation, the polarization in the device coordinate system induced by gate stress is given by:
Wsin W)o-2
(11)
W - sin2 W)o-Xz
(12)
P0_,2
=
-2d14 (COS
P,,y
=
d 14 (cos
PX,Z
=
d14 cos W sin W(o,-y
2
120
- u2)
(13)
[100]
x
Y
z, z
[010]
[001]
Figure 2: Diagram showing the main crystal directions relative to the axes defined for
the devices.
The relevant material parameters used in this calculation have been summarized in
Table 1 [106]. Only limited data was available for the ternary compounds of InGaAs
and InAlAs. Piezoelectric coefficient values of 2.5 x 10-17 and 3.7 x 10-17 C/dyne were
used for InGaAs and InAlAs, respectively.
Calculation of AVT
The total polarization vector, including the piezoelectric polarization, is given by [97]:
Material parameters
Parameter
v
10
Cu1 (x10 dyn/cm 2 )
C44 (x10 10 dyn/cm2 )
C12 (x10 10 dyn/cm2 )
d 14 (x10 1 7 C/dyne)
InP
0.29
102.2
46.0
57.6
-
GaAs
0.23
118.8
59.4
53.8
2.6
InAs
0.27
83.3
39.6
45.3
2.5
AlAs
0.25
116.3
54.1
57.6
5.0
Table 1: Table listing relevant material parameters used for calculating the piezoelectric
polarization vector [105].
121
= XEeE + P,
P
where Xe is the dielectric susceptibility. Including the effects piezoelectric polarization,
the total displacement flux density is becomes:
D
(1+ Xeo)E + P,
='Do + Powhere Do is the displacement flux density in the absence of stress. The paired charge
due to the piezoelectric effect, p,,, arising from P, is given by:
P0,p(X, Z)
V -P,
-
(14)
From Gauss' Law, we can calculate the total unpaired volume charge, pu, from:
pU
=
V-D
= V-Do + V-Pa
(15)
The first term in Eq. 15 determines the free charges in the heterostructure in the
absence of stress.
In the InAlAs there are no unpaired charges and the displacement flux density is
altered by the piezoelectric polarization. Consistent with Asbeck, we have found that
this effect is negligible [48]. In the InGaAs channel region, we have unpaired charges.
Using a perturbation approach, the stress-induced contribution to the unpaired charge
density, p,,u, is simply -P,,p.
The final equation for p,, is given by:
_4di4(4
Po,,
-
- v)F cos <p sin WP xiz(x2
2
v
4- v
122
-8Z
2
)
X2Z(X 2-3Z2 )
)
(16)
Fig. 3 plots contours of constant pe,, under the gate predicted for an [011] orientation,
normalized by 2d 14 (4 - v)F/(7rL2 ). This calculation produces singularities at the edge
of the gate where ri, r 2 -+ 0 and therefore is not valid near the edge of the gate.
The change in number of electrons in the channel at equilibrium, n, is found by
integrating p,, in the channel region, giving:
n,.(x)
j=
f
Pp(x,
(17)
z)dz
Note that this value can be positive (more electrons in the channel) or negative (less
electrons in the channel), depending on the device orientation and polarization vector.
In this calculation, we have neglected the effects of a discontinuity in P at the
InGaAs/InAlAs interface [97]. A discontinuity in P, will cause a sheet charge density
at the boundary, z = tins, given by:
Q,
where
Q,
(x) =
-2-(PInGaAs
(X tns) _ pInAlAs(X, tins))
is the paired sheet charge density at the InGaAs/InAlAs interface. A similar
boundary will be present at the back interface between the InGaAs channel and the
InAlAs buffer. In the absence of stress, there is only a contribution from the difference
in e,. In the presence of stress, there is an additional component due to the difference in
d 14 . Specific values for this material system could not be found. The values estimated
from Table 1 differ by about 30%, which could account for a 10% error in n ,
.
Finally, the change in VT is found by considering the stress-induced electrons in
the channel region at the center of the gate:
AVr=-
(qnI(x = 0))ti"",
16ins
123
(18)
Figure 3: Profile of p,, in the semiconductor. Lines represent contours of constant p,
normalized by 2dl 4 (4 - v)F/(rL2).
124
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