CMS and the Number Sorter
Presented to you by: Bobby Scurlock
Faculty Mentor: Darin Acosta
Q1
Q2
Q3
Quality
Comparitors
Kill Q 1
Best Quality1
Q6
Kill Q 2
Quality
Comparison
Selector
BQ1 Input Position
VHDL
Bus Translator
Best Quality2
BQ 2 Input Position
Best Quality3
Kill Q 3
ID1
ID2
ID3
ID
Comparitors
Kill Q 6
ID6
BQ 3 Input Position
The CMS Detector
Proton
Bunch
Proton
Bunch
40,000,000 Bunch Collisions each second
Event = total collection of detector measurements produced
resulting from 1 proton-proton bunch collision.
Do We Keep it All?!!
• 1 Event generates 1 Megabyte of data
• 40 Terabytes of data/second!!
• Requires the storage capacity of 40,000
average home PCs for every second of
operation!!
NOT ALL EVENTS ARE INTERESTING
Need an Electronic trigger to decide which events are important
Trigger and Data Acquisition Scheme of CMS
40,000,000 Events/second
generated by CMS detectors
Keep Event? - Yes/No?
has ~ 3 µs (about 120
bunch crossings) to
decide
Level 1
Trigger
Detectors
Memory
Still Keep Event? - Yes/No?
Level 2
and 3
Triggers
Memory
Events Kept
for Off-Line
Analyses
3 µs
Reduced to 100,000 Events/second
by Level 1 Trigger
Further Reduced to
100 Events/second
by Level 2 and 3
Triggers
My Project
My Project involved the End Cap Regions of CMS
What are End Caps Anyway?
φ
Rotate 360o
1 CSC
1 Disk = 1 Station
Combine 4
Stations and Get 1
End Cap
End Cap
Review of CSC Operation
1 Track Stub
Profile View of 1 CSC
Can construct a full track
using track stubs
Profile View of 4 CSCs
Profile View of 1- 60o Sector
Real Track Stubs may
actually look like this
Why Not Always Perfect Lines?
•Detectors not 100% Efficient
•Many particles travel through detectors
•A lot of radiation being produced in throughout the detectors
Level 1
Trigger
Level 1 Trigger Scheme
CSC Detector
Logic
Other
Detector
Logic
Final Decision Making Logic
Keep Event? - Yes or No?
CSC Detector
Logic
CSC Detector Logic Scheme
Track Stubs
CSC Front End
Electronics
Constructs track stubs
1 Track Finding
Processor
Constructs Full Tracks
Best Tracks
1 Track Finding
Processor
Finds Best 3 tracks
IDs and Qualities of 6 tracks
Track Finding
Logic
Track Sorter
Best 3 tracks
Quality = Goodness of track
Track ID = Stubs used to form track
Constructs 6 possible
tracks
Example:
Track 1 - ok track - Quality = 5
Track 2 - not very good track - Quality = 1
Track 3 - excellent track - Quality = 10!
Track Sorter
Best 3 tracks = 3 distinct tracks w/Highest Quality #
Must Sort Quality #s to find highest 3 => Need to use Binary Number Sorter
6 Track IDs
Best 3 Tracks!
Track
Sorting
Algorithm
6 Track
Qualities
Tasks: 1) Sort these Tracks in the Shortest Time Possible
2) Make Sure These Tracks are Distinct
Track Sorter
How do you Sort Tracks?
Use a number sorter to find 3 highest quality tracks
Basic Number Sorter:
Input A
‘1’ = yes, ‘0’= no
Input B
Is A > or = to B ?
Is 7 > or = to 9 ?
Example:
Track 1 has quality 7
Track 2 has quality 9
no = ‘0’ => Track 2 is preferred over track 1
Track Sorter
Other Sorting Methods
Arrange Basic Number Sorter into a tree to sort more numbers
Steps:
G(i 1, i 2)
a1
a1
e1
e1
G(i 3, i 4)
a2
b1
e2
f1
a3
a3
e3
e3
a4
b3
e4
f3
Input 5
b1
a2
e5
Input 6
b2
b2
e6
Input 7
b3
a4
e7
Input 8
b4
b4
e8
Input 1
Input 2
Input 3
Output #1
Output #2
Output #3
L(i 1, i 2)
Input 4
Output #4
L(i 3, i 4)
e5
Output #5
f5
Output #6
e7
Output #7
f7
Input 9
f1
e2
Input 10
f2
f2
Input 11
f3
e4
Input 12
f4
f4
Output #8
Output #9
Output #10
Output #11
Output #12
e6
Input 13
Output #13
f5
f6
Input 14
Output #14
f6
e8
Input 15
f7
Input 16
f8
Output #15
f8
2x2 Merging
2x2 Merging
4x4 Merging
Output #16
8x8 Merging
For 16 inputs this needs 10 steps
For 6 inputs this needs 6 steps
Too many steps for 6 inputs
Steps increase as inputs increase
There must be a better way
Very Bad News
Use VHDL to Sort!
Track Sorter
What is VHDL?
•(Very High Speed Integrated Circuits) Hardware Description Language
•Programming Language like C or Fortran
•Compiled by computer software like OrCAD to program chips
Using VHDL we can create a fast number sorter
Works in only 2 steps no matter how many inputs!
Completely flexible for any chip type and chip configuration software
Track Sorter
List of
Track
Qualities
How does it Work??
A
B
A
C
A
D
A
Track A
Track B
Track C
Track D
Track E
Track F
E
A
F
B
C
B
D
B
E
B
F
C
D
C
E
C
F
1
1
0
1
0
1
1
101010110110101 = 21,941
0
VHDL
Number
Translator
Track E
Track D
Track B
1
1
0
D
E
Next step
0
1
15-bit binary number
D
F
E
F
0
1
All in 1 step
101010110110101 => E has highest quality, D next, and B next
Example: Find Highest Value from Input List
Track Sorter
A
a
B
A
b
C
A
c
D
A
d
E
A
Each 15-bit value
corresponds to a
unique ordering of
the inputs
e
F
B
f
A
B
B
D
C
B
D
E
E
B
F
F
VHDL Code
C
g
h
i
C
Greatest
j
D
C
k
E
C
l
F
D
m
Number Translator
E
D
n
F
Bits that must be set for
Track B to be the best
E
o
F
compa compb compc compd compe compf compg comph compI compj compk compL compm compn compo
inputA
1
1
1
1
1
x
x
x
x
x
x
x
x
x
x
inputB
0
x
x
x
x
1
1
1
1
x
x
x
x
x
x
inputC
x
0
x
x
x
0
x
x
x
1
1
1
x
x
x
inputD
x
x
0
x
x
x
0
x
x
0
x
x
1
1
x
inputE
x
x
x
0
x
x
x
0
x
x
0
x
0
x
1
inputF
x
x
x
x
0
x
x
x
0
x
x
0
x
0
0
Track Sorter
Translate Truth Table to VHDL if-then Statements
compa compb compc compd compe compf compg comph compI compj compk compL compm compn compo
inputA
1
1
1
1
1
x
x
x
x
x
x
x
x
x
x
inputB
0
x
x
x
x
1
1
1
1
x
x
x
x
x
x
inputC
x
0
x
x
x
0
x
x
x
1
1
1
x
x
x
inputD
x
x
0
x
x
x
0
x
x
0
x
x
1
1
x
inputE
x
x
x
0
x
x
x
0
x
x
0
x
0
x
1
inputF
x
x
x
x
0
x
x
x
0
x
x
0
x
0
0
Truth Table
if ((compa = '1')and(compb = '1')and(compc = '1')and(compd = '1')and(compe = '1')) then
inputA = BestTrack;
VHDL
Track Sorter
Where do the ID #s Come in??
Take the same basic VHDL Sorter and add some disqualification Logic
Compare Quality #s
Should Track 1
be disqualified? Yes/No?
Modifies 15-bit number
15-bit #
Track A Qu
Track B Qu
Track C Qu
Track D Qu
Track E Qu
Track F Qu
Translates Final 15-bit # into
ordering of Inputs
Q1
Q2
Q3
Quality
Comparitors
Kill Q1
Q6
Kill Q2
Quality
Comparison
Selector
Best Quality1
Best 3
Besttracks
Quality
BQ1 Input Position
VHDL
Bus Translator
2
BQ2 Input Position
Best Quality3
Kill Q3
Track A ID
Track B ID
Track C ID
Track D ID
Track E ID
Track F ID
ID1
ID2
ID3
ID
Comparitors
Kill Q6
ID6
Compare ID #s
BQ3 Input Position
Does it Work?
•Simulations show the sorting method gives correct order
•Timing Analysis show a 20 ns delay in real chip
•Finishes within the allowed time
•Help the performance of Level 1 trigger => Less memory needed to pipeline detector data
•Less money!
Acknowledgements
Kevin Ingersent and Alan Dorsey
Professor Darin Acosta - Faculty Mentor
S. Ming Wang - Postdoc
Raymond Chow - undergraduate assistant
Mike Marquez - electrical engineer
1 Track Finding
Processor
Profile View of 1- 60o Sector
Real Track Stubs may
actually look like this
How can we possibly construct tracks from this mess!??
1 Track Finding
Processor
1
2
3
4
Knowing where the particle should
be, are any of the stubs in station 4
within the allowed range of values
for these parameters?
Look at where a particle passing
through stub in station 2 should be
when in station 4 and with what
parameters
We must extrapolate each track stub to each station
1 Track Finding
Processor
If yes, then we have successful
extrapolation, and connect to
stubs to make track
After a successful extrapolation, we assign a quality
value to the constructed path based on track features
1 Track Finding
Processor
Quality is based on Momentum
and Stations used to extrapolate
Higher Transverse
Momentum => Less Bending
=> Higher Quality
Top View of 1 Sector
With Some Extra CSCs We
can Achieve Complete
Angular Coverage
Inner Disk of 20o CSCs
Outer Disk of 10o CSCs
1 Complete Disk (with complete Inner and Outer Disks) = 1 Station
60o wedge = 1 sector
1 Sector will contain 3 - 20o CSCs from inner disk, and 6 - 10o CSCs from outer disk