Document 10299906

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Objective...........................................................................................................................1
Class A Amplifier .............................................................................................................1
Transformer-Coupled Class A Amplifier..........................................................................4
Transformer-Coupled 'Push-Pull' Class A Amplifier........................................................5
Transformer-Coupled 'Push-Pull' Class B Amplifier........................................................6
Transformerless 'Push-Pull' Class B Amplifier.................................................................7
Quasi-Complementary Amplifier......................................................................................9
EXPERIMENTS ..............................................................................................................10
Class B DC Voltage Transfer Characteristic.........................................................10
Crossover Distortion.............................................................................................10
Class AB Operation..............................................................................................10
Feedback Correction.............................................................................................11
Overload (Short-Circuit) Protection......................................................................11
Objective
To review the evolution of amplifier power (output) stages and to examine experimentally selected power
amplifier configurations.
Parts List
BJT
opamp
resistors
potentiometer
diodes
2 of 2N3904, 3 of 2N3906
741
330 Ω, 4.7 kΩ
10 kΩ
2 of 1N4004
Class A Amplifier
A 'Class A' (linear) amplifier is by definition one which is capable of amplifying bipolar input signals, i.e.,
amplifying whatever the polarity of the change from the quiescent operating point. For example for a
sinusoidal signal input variation around the DC bias point both half-cycles would be amplified essentially
in the same manner. Class A power amplifiers involve basically the same kind of analysis considered in
connection with incremental parameter analysis, except that large-signal operation is involved. For
incremental-signal amplifiers detailed power calculations are not particularly important. Indeed smallsignal amplifiers typically are very inefficient, but the power level involved is generally small and the
efficiency is traded-off against other considerations. Part of the reason for this small-signal power
inefficiency is the need to locate the quiescent point so as to support amplification of bipolar signals.
Because of this there is continual collector power dissipation associated with the quiescent point current
and voltage even in the absence of a signal input; signal power typically is small compared to this
dissipation.
However concern about dissipation and
consequently efficiency becomes important when the
amplified signal amplitude is large, and this is the
context for the following analysis. While details do
vary depending on a specific circuit context basic
considerations can be explored using the CE
amplifier configuration drawn in the figure to the
right. Note for later reference that the amplifier load
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resistor RL is distinct from the collector resistor RC. These resistors have different functions, a matter
discussed below.
Certain simplifications are commonly made in studying the general behavior of this circuit to suppress
secondary considerations. For example the BJT characteristics are assumed to be adequately represented
by a 'flag' model for which the collector current is ß ( assumed constant) times the base current. This
neglects the small but nonzero saturation voltage of the transistor, with the effect of generally overstating
efficiency somewhat. However this omission does not affect the basic principles involved. Similarly the
nonlinearity in amplification at very low and very high currents is ignored, as is the Early effect, i.e., the
transistor characteristics are assumed to be parallel lines equally spaced for equal base current increments,
with zero reverse bias leakage current. These assumptions simplify the analysis considerably, making it
tractable. Important relationships are retained in the model, and the omissions can be compensated in a trial
design by a modest adjustment in the nominal design target values. Ultimately of course a computer
computation can incorporate a more detailed nonlinear device model in a numerical analysis.
The IC-VCE plane for the CE amplifier collector
characteristics is shown in the figure to the left; the
transistor collector characteristics themselves are not
actually drawn but rather should be inferred.
Because the AC circuit is different from the DC
circuit there are two load lines to consider. The DC
load line establishes the quiescent point, and is given
by
VCC - VCE = IC RC
Incidentally note that emitter stabilization is not used.
This type of stabilization ordinarily would be avoided
because for large transistor currents it would
contribute noticeably to the standby power
dissipation. (For modest power levels ( ≈ 1 watt or less) emitter stabilization might be considered. In such
a case the analysis following is applicable on noting that the emitter and collector currents will be very
nearly equal (ß » 1) and considering the emitter and collector resistances to be essentially in series.)
The DC load line and the Q point are shown in the figure; this is same load line analysis as discussed and
illustrated for the discussion of incremental parameter analysis elsewhere.
The AC load line, by contrast, describes the relationship between changes in collector current and changes
in collector voltage. Whereas the DC load line has a slope inversely proportional to RC the AC load line
slope is inversely proportional to RL||RC. Since considerations of efficiency, more precisely maximum
current transfer into the load, typically suggest making RL < RC there can be a significant difference in
slope between AC and DC load lines. The AC load line is indicated in the figure also; it is defined by its
slope and the Q point (through which it passes). Note that the intercepts of the respective load lines with
the abscissa are labeled VCC and V* CC .
For maximum symmetrical output voltage and current swing (ignoring saturation and low current
constraints as described before) design the Q point to lie at the 'middle' of the AC load line, i.e.,
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The geometry of the shaded triangle reveals that
Hence choose
to locate the Q point as desired.
Note that, as is to be expected
The DC power provided by the supply is given by the product of the average current (here the Q point
current because of the symmetrical variation assumed about the centrally placed Q point) and the supply
voltage:
Note that
The average sinusoidal power in RL (not RC) is
The instantaneous collector power dissipation is
ICVCE = IC[ (RC||RL)( ICQ-IC)+VCEQ];
the term in the square brackets is obtaioned by substituting for VCE. Note that this power always is
positive, and that the expression is zero for IC = 0 and also for IC = ICQ+VCEQ/RC||RL. It follows that
the dissipation is a maximum between these intercepts. That maximum occurs at IC#=#ICQ and is
ICQVCEQ. This is to be expected, since the fixed average supply power is dissipated in the resistors and
in the transistor collector. Hence increasing the dissipation in the load necessarily reduces the collector
dissipation, and so the maximum value of the latter occurs in the absence of an AC signal. The transistor
operates cooler with a signal present than without!
A useful 'figure of merit' for the amplifier is
meaning among other things that the transistor selected for use in a Class A amplifier must be capable of
dissipating more than twice the power that can be transferred to the load.
Another more familiar figure of merit is the conversion efficiency:
This has a (broad) maximum at RC = √2RL; the maximum is 8.6%.
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The Class A amplifier is inherently an inefficient circuit, and its use is limited to relatively low power
applications where efficiency and collector dissipation considerations are less dominant.
The efficiency can be improved for a special circumstance which can be used in some low-power
circumstances. This special case makes RL-> ∞, i.e., RC is used both to establish the DC bias point and
the load. For this case the efficiency 'rises' to 25%. The increased efficiency here is primarily the result of
not having to split the AC collector current between RC and RL, i.e., the total AC power is 'load' power.
Transformer-Coupled Class A Amplifier
In the preceding circuit the collector resistor is used to set the quiescent operating point so as to allow
maximum symmetrical movement of the operating point. If the resistance is too large there is excessive
dissipation by the quiescent point current; indeed the low efficiency of the preceding circuit is due
primarily to just this dissipation. On the other hand if this resistance is too low the AC collector current
division into the load resistor is degraded. This tradeoff is evident in the expression for the efficiency,
which depends both on the ratio RC/RL and concurrently on the inverse ratio RL/RC. In other words it is
desirable both that RL > RC and RC > RL. What would be useful is a 'resistor' which has a large AC
resistance to improve the transfer of AC collector current into the load. and a small DC resistance to reduce
losses in the process of establishing the Q point. The inductor is a circuit element with just this general
property if we read 'reactance' for 'resistance'. Ideally the DC resistance is zero, and the AC reactance can
be large (depending on the signal frequency and the inductance).
The circuit to the left, below illustrates the modification. A further benefit, the ability to vary the slope of
the load line for a fixed load resistor, accrues by using a transformer rather than simply an inductor. This
more common configuration is drawn to the right.
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Thus, for example, the DC relationship is VCE =VCEQ=VCC, i.e., the collector DC voltage is fixed; there
is zero DC voltage drop across the (assumed lossless) transformer primary.
On the other hand the transformer couples an effective resistance of n2RL into the primary; where n is the
turns ratio of the transformer. Hence the AC load line, describing the relationship between changes in
collector current and changes in collector voltage, has a slope equal to -1/n2RL. Since the AC load line
passes through the Q point (zero change point) the load line is located as shown in the figure. The
equation for the AC load line is
For a symmetrical swing (ignoring saturation and low-current nonlinearities) set the Q point at the center of
the load line:
Ordinarily load resistance would be determined by the nature of the application and the transformer turns
ratio specified to reflect that resistance into the transformer primary to provide the desired load line slope.
The DC (supply) power is
and the AC load power is
Note that the collector dissipation capability required still is twice the AC power. If transformer losses are
ignored the efficiency is 50%. The increase in efficiency is the result of eliminating the dissipation which
would be produced by the quiescent current flowing through a collector resistor.
Unfortunately another problem arises which limits the applicability of class A transformer coupling. The
DC Q-point current flowing through the transformer primary contributes to the magnetization of the
transformer core. For a power amplifier, that is an amplifier requiring a high DC current, the transformer
core tends to saturate and degrade the coupling between the primary and secondary. Because of this the
Class A transformer-coupled circuit is generally applicable to relatively low-power amplifies.
Transformer-Coupled 'Push-Pull' Class A Amplifier
The class A transformer coupled amplifier is limited indirectly in power output capability because of the
quiescent collector current; this current flows through the transformer primary winding and adds a DC
magnetic bias to the transformer core magnetic flux. This reduces the core flux change permitted for an
AC signal current in order to avoid magnetic saturation of the transformer core and the consequent
nonlinearity of a reduction in core permeability.
The 'push-pull' circuit configuration to the right relieves some of this problem by an application of
symmetry. The circuit consists of two distinct Class A amplifiers sharing a common load resistance.
Although the output transformer used ordinarily has a center-tapped primary nevertheless it operates as two
separate primary windings in series, coupled magnetically (same magnetic core) to a common secondary.
The input transformer also commonly is center-tapped, but it also operates as two transformers with a
common primary winding, coupled magnetically to separate secondaries. Because of the geometry of the
input the two AC signals coupled to the transistor bases are of equal amplitude but are 180° out of phase
with each other. The collector currents also are of equal amplitude and 180° out of phase (in the normal
range of transistor operation). Hence there is no AC collector current flowing through the connection to
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the emitter. emitter. Insofar as the AC collector current is concerned it flows from one collector to the
other!
What is particularly significant about this circuit is
that unlike the AC currents the DC collector currents
flow from the respective collectors to the center-tap,
and then to the emitters. The magnetic effects of the
DC collector currents tend to cancel each other since
these currents magnetize the transformer core
oppositely, but the AC currents couple in phase to the
common secondary load.
The design of this circuit is similar to two singletransistor Class A amplifier designs, except that the
resistance seen in each collector circuit is RL/2n2.
The reason for this is that both AC currents contribute to the magnetic flux linkage and so to the secondary
current but only half the primary turns are used by each transistor. ( As indicated before the collector
transformer operates as two transformers each with an n/2 turns ratio and with secondaries connected in
parallel.)
Since the total secondary power is supplied by two transistors rather than just one as before each one need
dissipate (ideally) only half as much as in a single transistor circuit. The overall efficiency however
remains at 50%.
Transformer-Coupled 'Push-Pull' Class B Amplifier
Push-pull Class A transformer-coupled amplifier efficiency could be improved considerably if the
quiescent collector dissipation ICQVCEQ could somehow be eliminated. This dissipation arises largely
because of the biasing needed to enable symmetrical collector current swings. Clearly however making
VCEQ or ICQ zero does not allow bipolar operation. However it is possible to operate with ICQ = 0 and
emulate bipolar operation if two transistors are used, each amplifying only one polarity of a symmetrical
signal.
A circuit to realize this is illustrated to the right; it is
similar to the circuit of a Class A push-pull circuit
except that there is no emitter junction DC bias. Each
transistor therefore is biased at cutoff, i.e., with
ICQ=0, and consequently with no DC collector
dissipation. The AC base signals are 180° out of
phase as before so that each transistor is turned on
alternately, for alternate half-cycles of the input
signals. Although the two collector primary
windings both couple to the common secondary they
do so on alternate half-cycles. In this circuit the
output effectively uses two transformers operating
disjointedly, each with an n/2 turns ratio. The
effective turns ratio then is n/2, so that the load resistance reflected into each collector is n2RL/4.
Ignoring saturation and low current effects the peak AC voltage is VCC, and the peak current then is
VCC/(n2RL/4). The average current supplied by each transistor is
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and the combined (total) AC power is
The collector dissipation (each device) is
Differentiate the expression in the brackets to determine that the dissipation is a maximum
when
Note particularly the ratio of the peak collector dissipation to the average power output; the transistors used
for a given power output need have an order of magnitude less dissipation capability than before. Note
also the improved efficiency.
There is however one inherent flaw in the basic Class B operation, and that involves the biasing of the
transistors at cutoff. Since the transistors do not turn on until the emitter junction bias is above the 'knee' of
the diode characteristic there is a 'dead zone' around zero crossings of the input signal which is not
amplified. This 'cross-over' distortion can be significant in some applications and arrangements must be
made to mitigate it. One method of doing this simply is not to use strict Class B biasing, but rather to bias
the transistors so that the quiescent point involves a low rather than zero DC current. This reintroduces
some DC collector dissipation, which is the price for ameliorating the 'cross-over' distortion. Operation in
this modified fashion usually is referred to as Class AB operation.
Transformerless 'Push-Pull' Class B Amplifier
Transformers generally are both bulky and heavy, characteristics preferably avoided in electronic equipment
in general and for small/portable equipment in particular. Methods to combine the contributions of the
transistors in the output stage without using a transformer find particular application in many integrated
circuit devices where use of a transformer simply is not feasible.
For example the simplified 'complementary symmetry' Class B output amplifier illustrated to the right uses
NPN and PNP transistors in such a way that each conducts on alternate half cycles of the input signal.
Both transistors operate as emitter followers, with RL as the shared emitter resistor. During
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the positive half cycle of the input signal the NPN
transistor conducts, providing a current source to
drive the load. For the negative half cycle it is the
PNP transistor that conducts, serving as a current
sink to pull current from the load.
There is however crossover distortion in the
configuration as shown, corresponding to the 'dead
zone' around the zero crossing of Vin during which
the transistors do not conduct. A modified circuit
(left) adds biasing to provide Class AB operation.
The use of biasing resistors generally is not desirable
in integrated circuit fabrication because they occupy
relatively large portions of the chip area, and a
modified biasing method of the sort illustrated to the
right often is used. The diodes provide, in a manner
of speaking, a substitute for batteries to bias the transistor emitter junctions.
The quiescent state of the amplifier is set by adjusting
Vin (DC level) so that there is no voltage drop across
RL. Assuming matched diodes and emitter junctions
for simplicity the quiescent current of the transistors
then is the same as the diode current I (neglecting the
relatively small base currents).
Suppose Vin then is increased from its quiescent
value. This raises the voltage at the NPN base, and
since V (see figure) is substantially constant the base
voltage of the PNP transistor also is increased. The
effect is to cause the NPN device to carry a larger
current, and the PNP device to carry a smaller
current; the difference current flows through RL.
Note that the increase of NPN base current to support the larger current comes from the current source I;
the diode current is reduced accordingly. This means that I must be at least large enough to provide the
base current needed for the largest NPN emitter current to be drawn.
Conversely, decreasing Vin increases the PNP current while decreasing the NPN current, with the
difference current flowing out of RL.
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The circuit to the left provides additional flexibility (at
a cost) in design by replacing the diodes with a
transistor and resistive voltage divider. The transistor
emitter junction provides a reference voltage of one
diode drop across R2, with the voltage divider action
(neglecting the base current) providing a proportional
voltage across R1. Thus the voltage V can be
adjusted by the choice of R1/R2 resistor ratio.
Quasi-Complementary Amplifier
The Class B/AB complementary push-pull power amplifier configurations assumed implicitly that the
characteristics of the NPN and PNP devices are matched so that, for example, both half cycles of a
sinusoidal input signal were amplified substantially the same. High power matched discrete
complementary devices are available commercially.
However for integrated circuits, where both PNP and
NPN devices are fabricated in the same substrate,
NPN devices generally have notably superior
characteristics. One (of several) alternative
configurations used for higher powers is the 'quasicomplementary' output stage illustrated to the right.
The PNP transistor does not provide a sink for load
current directly as before but rather provides the base
drive for an NPN device, thus providing a composite
PNP-NPN device with the input characteristics of a
PNP transistor and the amplification capabilities of
an NPN device.
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EXPERIMENTS
Class B DC Voltage Transfer Characteristic
The circuit drawn to the right is used to illustrate various aspects of a discrete device complementary 'pushpull' power amplifier. A 'current source' (about 2 ma for the transistors
specified) for biasing is provided by the PNP
current mirror. The signal voltage source is
simulated by the (741 OPAMP ) voltage follower; for
this experiment a DC input voltage is provided by the
potentiometer arrangement. Measure the DC voltage
transfer characteristic (#voltage across the 330 Ω
output resistor vs the voltage at point A). Make sure
your data shows the 'dead zone' around the zero
crossover adequately. Compare the measured data to
theoretical expectations; use a computer generated
graph as the reference on which to plot experimental
data.
Note: The transfer characteristic of the output stage
will flatten as the output transistors saturate; this
would be at (approx.) ±10.5 volts respectively
(why?). Actually the 741 OPAMP
output stage has a similar output configuration and probably will saturate at a somewhat lower voltage.
Crossover Distortion
Replace the DC input voltage by an AC sinusoidal
signal (zero DC offset) from the function generator
at a nominal frequency of 1 kHz. Starting with a
small signal amplitude (< 0.7 volts peak) observe the
output waveform as the input amplitude is increased.
Include with your report a computer-generated plot of
the output vs time for a sinusoidal input with
amplitude 2 volts and compare computed results with
the corresponding experimental observations to this
plot.
Input a small-amplitude AC signal , and vary the signal DC offset voltage; observe the effect on the output
waveform.
In your report explain as well as describe your observations.
Class AB Operation
Modify the previous circuit by replacing the base-tobase short-circuit connection (points A'-A in the
circuit diagram) with the diode crossover circuit
illustrated to the right. Measure the DC voltage
transfer characteristic again, with special attention to
the range of input voltage corresponding to the dead
zone in the previous circuit. Similarly observe,
describe, and comment on the AC output waveform
observed as the input amplitude is varied.
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Feedback Correction
Modify the circuit as indicated by the heavy lines in
the circuit diagram to the right. Replace the diodes
by a short-circuit to restore the propensity for
crossover distortion, and remove the voltage follower
connection from the OPAMP output and connect it to
the 330 Ω as shown. The high gain of the OPAMP
tends to force a very small voltage difference across
the OPAMP input terminals, concomitantly forcing
the output waveform to track the input wave form.
The OPAMP output varies so as to correct (in large
measure) for the crossover distortion. Observe the
output AC
waveform with the original and the modified voltage follower connection for a sequence of signals of
increasing amplitude; describe and compare these observations in your report.
Overload (Short-Circuit) Protection
If mischance causes the output to be short-circuited a
large current demand may be placed on the output
stage; for a power amplifier this can be destructive.
Hence means often are added to prevent a current
overload.
In general there are two mechanisms needed for a
protection mechanism; a means for detecting the
event guarded against, and a means to prevent damage
from the event.
Short-circuit protection for positive signals (only)
may be added to the circuit as illustrated to the right.
Detection of excessive current is accomplished by the
small resistors R added in
the emitter paths; when the voltage drop across these resistors is sufficiently large (approximately 0.5 volt)
an overload transistor (only one for NPN current is shown) is turned on. The protection then is
implemented by bypassing the NPN base current to the output; the protection transistor essentially acts as a
current sink to drain off base current.. The effect is equivalent to a rapid reduction in the value of ß, so
limiting the short-circuit current to a designed safe value.
Select a value for R to limit the short-circuit current to 15 ma; add your design to the circuit. Check your
design carefully before testing it; the test very likely may be unforgiving of a design error. Note also that
the PNP output transistor is NOT protected, so it is necessary to be careful not to apply an input voltage
which turns on the PNP output stage. That is why the circuit diagram shows the negative end of the input
potentiometer moved to ground rather than left at the negative rail. Be sure to make this change.
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