Section 1: Mary Jane Irwin ( www.cse.psu.edu/~mji )
Section 2: Krishna Narayanan
Course material on ANGEL: cms.psu.edu
[ slides adapted from D. Patterson slides with additional credits to Y. Xie ]
CSE331 W01.1
Irwin Fall 07 PSU

Course Administration
 Instr (Sec1): Mary Jane Irwin ( mji@cse.psu.edu
)


348C IST Bldg
OH’s: Tues 2:30 – 3:45pm & Wed 9:15 – 10:30am
 Instr (Sec2): Krishna Narayanan ( snarayan@cse.psu.edu
)


348D IST Bldg
OH’s: TBD
 TA: Evens Jean ( jean@cse.psu.edu
)


360E IST Bldg
OH’s: Tues, Thurs 2:30 – 4:00pm
 Web: ANGEL, cms.psu.edu
 Lab: Accounts on CSE machines in 220 IST, Windows Lab
 Texts: Computer Organization and Design: The
Hardware/Software Interface,
3 rd Edition Revised Printing , Patterson and Hennessy
CSE331 W01.2
VHDL Starter’s Guide , 2 nd Edition , Yalamanchili
Irwin Fall 07 PSU

Grading Information
 Grade determinates
 Exam #1 ~20%
Tuesday, October 2, 6:30
Email instructor
 Exam #2

Thursday, November 8, 6:30 an exam conflict !
Final Exam ~25%
Section 1 & 2: TBD
 Homeworks/Programming Assignments
 Quizzes (in-class & ANGEL)
 Class attendance
~25%
~ 5%
~ 5%

CSE 331 is a “ C required course ” for both CmpSc and
CmpEng majors
CSE331 W01.4
Irwin Fall 07 PSU

Grading Policies
 Assignments will be submitted electronically through
ANGEL and must be submitted by 5:00pm on the due date. No late assignments will be accepted.

Most programming assignments will follow the “pair programming” paradigm
 Duplicate assignments will receive duplicate grades of zero. Second offenses will result in a final course grade of F.
 Grades will be posted on the ANGEL website
 See TA about questions on the assignments ; see instructors about grading questions on the exams
 Must submit email request for change of grade after discussions with the TA or instructor
CSE331 W01.5
 December 12 deadline for filing grade corrections; no requests for grade changes/updates will be accepted after this date
Irwin Fall 07 PSU

What is Pair Programming?
 Two programmers work side-by-side at one computer continuously collaborating on the same design, algorithm, code, or test
 The fourteen principles of pair programming


Share everything http://portal.acm.org/citation.cfm?id=332
833.332848&coll=portal&dl=ACM&idx=3
Play fair – take turns
32833&part=periodical&WantType=peri
“driving”, when not “driving” don’t be a passive observer, do be active and engaged N=22811657

Don’t hit people – stay on task (so no reading email or surfing)

…
 Take a nap (or a break from working together) every afternoon
 Why do it?
 Has been shown to improve productivity and the quality of
CSE331 W01.6
software
Irwin Fall 07 PSU

Course Goals and Structure
 Introduction to the major components of a computer system, how they function together in executing a program, how they are designed
 MIPS assembler programming using the spim system
 VHDL design simulation using Mentor Graphics ModelSim
 Prerequisite: CSE 271 (INTRO TO DIGITAL SYSTEMS.
Introduction to logic design and digital systems, boolean algebra, and introduction to combinatorial and sequential circuit design and analysis)
 If you are also taking CSE 472 you will learn yet another assembly language (Motorola 68HC12)
CSE331 W01.7
Irwin Fall 07 PSU

spim Assembler and Simulator
 spim is a simulator that runs MIPS32 assembly language programs
 It provides a simple assembler , debugger and a simple set of operating system services
 It implements both a simple, terminal-style interface ( spim ) and a visual windowing interface ( xspim and PCSpim )
 (Version 7.3) available as
 xspim (or spim ) for unix, linux, and Mac OS X
Installed on the CSE unix / linux machines in the lab
 PCSpim (or spim ) for Windows (NT, 2000, XP)
Installed on the CSE windows machines in 220 IST and/or can be downloaded and installed on your own PC from http://pages.cs.wisc.edu/~larus/spim.html
CSE331 W01.8
Irwin Fall 07 PSU

vhdl Simulation
 ModelSim is a hardware description language simulator from Mentor Graphics
 Simulation (gate-level and RTL-level) and integrated debug environment
Verilog and VHDL
Intuitive GUI for post-simulation debug and analysis http://www.model.com/products/products_se.asp
ModelSim SE is installed on the windows machines in 220 IST
 ModelSim PE Student Edition is available for free download from http://www.model.com/resources/student_edition/student_default.asp
 If you are taking CSE 471 or 478 you will gain even more experience with the Mentor Graphics tools
CSE331 W01.9
Irwin Fall 07 PSU

ModelSim Screen Shot
CSE331 W01.10
Irwin Fall 07 PSU

What You Should Already Know
 How to write, compile and run programs in a higher level language (C, C++, Java, …)
 How to represent and operate on positive and negative numbers in binary form (two’s complement, sign magnitude, etc.)
 Logic design
 How to design of combinational and sequential components
(Boolean algebra, logic minimization, technology mapping, decoders and multiplexors, latches and flipflops, registers, mealy/moore finite state machines, state assignment and minimization, etc.)
 How to use a logic schematic capture and simulation tool
(e.g., LogicWorks )
CSE331 W01.11
Irwin Fall 07 PSU

Schedul e

This week’s material
 Course introduction, basics of a computer system, introduction to SPIM
- Reading assignment – PH 1.1 through 1.3 and
A.9

Next week’s material
 Introduction to MIPS assembler, adds/loads/stores
- Reading assignment - PH 2.1 through 2.4
 Entire semester course schedule can be accessed on ANGEL under the Lessons tab
CSE331 W01.12
Irwin Fall 07 PSU

Quote for the Day
“I got the idea for the mouse while attending a talk at a computer conference. The speaker was so boring that I started daydreaming and hit upon the idea.”
Doug Engelbart
CSE331 W01.13
Irwin Fall 07 PSU

The Evolution of Computer Hardware
 When was the first transistor invented?
 Modern-day electronics began with the invention in
1947 of the transfer resistor - the bi-polar transistor by Bardeen et.al at Bell Laboratories
CSE331 W01.15
Irwin Fall 07 PSU

The Evolution of Computer Hardware
 When was the first IC (integrated circuit) invented?
 In 1958 the IC was “born” when Jack Kilby at
Texas Instruments successfully interconnected, by hand, several transistors, resistors and capacitors on a single substrate
CSE331 W01.17
Irwin Fall 07 PSU

The Underlying Technologies
Year
1951
1965
1975
1995
2005
Technology
Vacuum Tube
Transistor
Relative Perform/Unit Cost
1
35
Integrated Circuit (IC) 900
Very Large Scale IC (VLSI) 2,400,000
Submicron VLSI 6,200,000,000
CSE331 W01.18
What if technology in the transportation industry advanced at the same rate?
Irwin Fall 07 PSU

The PowerPC 750
 Introduced in
1999
 3.65M transistors
 366 MHz clock rate
 40 mm 2 die size
 250nm
(0.25micron) technology
CSE331 W01.19
Irwin Fall 07 PSU

Technology Outlook
High Volume
Manufacturing
Technology Node
(nm)
Integration
Capacity (BT)
Delay = CV/I scaling
Energy/Logic Op scaling
Bulk Planar CMOS
Alternate, 3G etc
Variability
ILD (K)
RC Delay
Metal Layers
2004
90
2
0.7
2006
65
4
~0.7
2008
45
8
>0.7
>0.35
>0.5
>0.5
2010
32
16
2012
22
32
2014
16
64
2016
11
128
2018
Delay scaling will slow down
Energy scaling will slow down
High Probability Low Probability
Low Probability High Probability
~3
1
6-7
Medium High Very High
<3
1
7-8
1
8-9
Reduce slowly towards 2 to 2.5
1 1 1 1 1
0.5 to 1 layer per generation
8
256
CSE331 W01.20
Irwin Fall 07 PSU

Impacts of Advancing Technology
 Processor
 logic capacity: increases about 30% per year
 performance: 2x every 1.5 to 2 years
 Memory
 DRAM capacity: 4x every 3 years, about 60% per year

 speed: cost per bit:
1.5x every 10 years decreases about 25% per year
 Disk
 capacity:
 speed:
 cost per bit:
CSE331 W01.21
increases about 60% per year
Irwin Fall 07 PSU

Growth Capacity of DRAM Chips
K = 1024 (2 10 )
CSE331 W01.22
In recent years growth rate has slowed to 2x every 2 year
Irwin Fall 07 PSU

Computer Organization and Design
 This course is all about how computers work
 But what do we mean by a computer?
 Different types: embedded, laptop, desktop, server

Different uses: automobiles, graphics, finance, genomics,…
 Different manufacturers: Intel, AMD, IBM, HP, Apple, IBM,
Sony, Sun …
 Different underlying technologies and different costs !
 Best way to learn:
 Focus on a specific instance and learn how it works
 While learning general principles and historical perspectives
CSE331 W01.23
Irwin Fall 07 PSU

Embedded Computers in You Car
CSE331 W01.24
Irwin Fall 07 PSU

Growth of Sales of Embedded Computers
CSE331 W01.25
Irwin Fall 07 PSU

Why Learn This Stuff?

You want to call yourself a “computer scientist/engineer”
 You want to build HW/SW people use (so you need to deliver performance at low cost)

You need to make a purchasing decision or offer “expert” advice
 Both hardware and software affect performance
 The algorithm (CSE 465) determines number of source-level statements
 The language/compiler/architecture (CSE 428/421/331&431) determine the number of machine-level instructions
(Chapter 2 and 3)
 The processor/memory (CSE 331&431) determine how fast machine-level instructions are executed
CSE331 W01.26
(Chapter 5, 6, and 7)
Irwin Fall 07 PSU

What is a Computer?
 Components:
 processor (datapath, control)
 input (mouse, keyboard)
 output (display, printer)
 memory (cache (SRAM), main memory (DRAM), disk drive,
CD/DVD)
 network
 Our primary focus: the processor (datapath and control)
 Implemented using millions of transistors
 Impossible to understand by looking at each transistor
 We need abstraction!
CSE331 W01.27
Irwin Fall 07 PSU

Major Components of a Computer
CSE331 W01.28
Irwin Fall 07 PSU

Head’s Up

This week’s material
 Course introduction
Reading assignment – PH 1.1 through 1.3 and A.9
 Reminders
 Make sure your CSE account is operational; change your password to something you can remember and that is secure
(must be 12 or more alphanumeric characters of three types)
 Question/comments about the system go to helpdesk@cse.psu.edu
; questions about the programming assignments go to the course TA
 Check out the course homepage at ANGEL!

Next week’s material
 Introduction to MIPS assembler
Reading assignment - PH 2.1 through 3.3, 3.4, and 3.7
CSE331 W01.29
Irwin Fall 07 PSU

Quote for the Day
“We all make mistakes … Our designs have to work flawlessly despite us.”
Bob Colwell
The Pentium Chronicles
CSE331 W01.31
Irwin Fall 07 PSU

Below the Program
 High-level language program (in C) swap (int v[], int k)
(int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp;
)
 Assembly language program (for MIPS) swap: sll add lw lw sw sw jr
$2, $5, 2
$2, $4, $2
$15, 0($2)
$16, 4($2)
$16, 0($2)
$15, 4($2)
$31
 Machine (object) code (for MIPS)
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
. . .
one-to-many one-to-one
C compiler assembler
CSE331 W01.33
Irwin Fall 07 PSU

Advantages of Higher-Level Languages ?
 Higher-level languages


Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation,
Cobol for business programming, Lisp for symbol manipulation, Java for web programming, …)
Improve programmer productivity – more understandable code that is easier to debug and validate
 Improve program maintainability
 Allow programs to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine)
 Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine
 As a result, very little programming is done today at the assembler level
CSE331 W01.35
Irwin Fall 07 PSU

Machine Organization
 Capabilities and performance characteristics of the principal Functional Units (FUs)
 e.g., register file, ALU, multiplexors, memories, ...
 The ways those FUs are interconnected
 e.g., buses
 Logic and means by which information flow between FUs is controlled

The machine’s I nstruction S et A rchitecture ( ISA )
 R egister T ransfer L evel ( RTL ) machine description
CSE331 W01.36
Irwin Fall 07 PSU

ISA Sales
CSE331 W01.37
Irwin Fall 07 PSU

Major Components of a Computer
Processor
Control
Datapath
Memory
Devices
Network
Input
Output
CSE331 W01.38
Irwin Fall 07 PSU

Below the Program
 High-level language program (in C) swap (int v[], int k)
. . .
 Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31
 Machine (object) code (for MIPS)
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
CSE331 W01.40
C compiler assembler
Irwin Fall 07 PSU

Input Device Inputs Object Code
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Processor
Control
Datapath
Memory
Devices
Network
Input
Output
CSE331 W01.41
Irwin Fall 07 PSU

Object Code Stored in Memory
Processor
Control
Datapath
Memory
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Devices
Network
Input
Output
CSE331 W01.42
Irwin Fall 07 PSU

Processor Fetches an Instruction
Processor fetches an instruction from memory
Processor
Control
Datapath
Memory
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Devices
Network
Input
Output
CSE331 W01.43
Irwin Fall 07 PSU

Control Decodes the Instruction
Control decodes the instruction to determine what to execute
Processor
Control
000000 00100 00010 00010 00000100000
Datapath
Memory
Devices
Network
Input
Output
CSE331 W01.44
Irwin Fall 07 PSU

Datapath Executes the Instruction
Datapath executes the instruction as directed by control
Processor
Control
000000 00100 00010 00010 00000100000
Datapath contents Reg #4 ADD contents Reg #2 results put in Reg #2
Memory
Devices
Network
Input
Output
CSE331 W01.45
Irwin Fall 07 PSU

What Happens Next?
Processor fetches the next instruction from memory
Processor
Control
Datapath
Memory
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Devices
Network
Input
Output
Exec
CSE331 W01.47
Fetch
Decode
How does it know which location in memory to fetch from next?
Irwin Fall 07 PSU

Processor Organization
 Control needs to have circuitry to
 Decide which is the next instruction and input it from memory
 Decode the instruction
 Issue signals that control the way information flows between datapath components

Control what operations the datapath’s functional units perform
 Datapath needs to have circuitry to
 Execute instructions - functional units (e.g., adder) and storage locations (e.g., register file)
 Interconnect the functional units so that the instructions can be executed as required
 Load data from and store data to memory
What location does it load from and store to?
CSE331 W01.49
Irwin Fall 07 PSU

Output Data Stored in Memory
At program completion the data to be output resides in memory
Processor
Control
Datapath
Memory
00000100010100000000000000000000
00000000010011110000000000000100
00000011111000000000000000001000
Devices
Network
Input
Output
CSE331 W01.50
Irwin Fall 07 PSU

Output Device Outputs Data
CSE331 W01.51
Processor
Control
Datapath
Memory
Devices
Network
Input
Output
00000100010100000000000000000000
00000000010011110000000000000100
00000011111000000000000000001000
Irwin Fall 07 PSU

The Instruction Set Architecture (ISA) software instruction set architecture hardware
CSE331 W01.52
The interface description separating the software and hardware
Irwin Fall 07 PSU

The MIPS ISA
 Instruction Categories






Load/Store
Computational
Jump and Branch
Floating Point
coprocessor
Memory Management
Special
Registers
R0 - R31
PC
HI
LO
 3 Instruction Formats: all 32 bits wide
OP rs rt rd
OP rs rt sa immediate
OP jump target
Q: How many already familiar with MIPS ISA?
CSE331 W01.53
funct
Irwin Fall 07 PSU

How Do the Pieces Fit Together?
Applications
CSE 421
Compiler
Operating
System
CSE 411
Firmware
Instruction Set
Architecture Memory system
Processor I/O system network
CSE 458
CSE 331 & 431
Datapath & Control
Digital Design CSE 271 & 471
CSE 447 & 477 Circuit Design
 Coordination of many levels of abstraction
 Under a rapidly changing set of forces
 Design, measurement, and evaluation
CSE331 W01.55
Irwin Fall 07 PSU

Review and Reminder

Next week’s material
 Introduction to MIPS assembler
Reading assignment - PH 2.1 through 2.4
 Homework 1 due on Tuesday, Sept. 4 by 5:00 PM
Submit on ANGEL – individual programming this time !
 Other reminders
 Install PCSpim on your laptop
 Keep track of course updates on ANGEL
 Make sure your CSE account is operational; change your password to something you can remember and that is secure
(must be at least 12 alphanumeric characters of 3 types)
 Question/comments about the lab hardware/system go to helpdesk@cse.psu.edu
; questions about the programming assignments go to the course TA
CSE331 W01.56
Irwin Fall 07 PSU