All-optical Header Processing in Optical Communication Networks

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ALL-OPTICAL PACKET HEADER PROCESSING SCHEME

BASED ON PULSE POSITION MODULATION

IN PACKET-SWITCHED NETWORKS

Z. Ghassemlooy, H. Le Minh, Wai Pang Ng

Optical Communications Research Group

Northumbria University, UK http://soe.unn.ac.uk/ocr/

Contents

 Overview of header processing in optical networks

 Header processing based on pulse-position modulation (PPM)

 Proposed node architecture

 Simulation results

 Summary

Optical Communication Network (OCN)

Demand traffic

[bit/s]

1P

NEC-2001

100T

10T

1T

100G

Total

Data

10G

Voice

1G

100M

1995 2000 2005 2010

Year

- Future OCNs: faster signal processing and switching to cope with the increase of the demanding network traffic

- Existing OCNs: depends on electronic devices for processing the packet address to obtain the routing path.

However, the limitation of electronic response will cause the speed bottleneck

 Solution: All-optical processing & switching

Future OCNs

Optical transparent path

- Future OCN will have the processing and switching data packets entirely in optical domain, i.e. generate optical transparent path for routing data packets

 Require: compact and scalable processing scheme

Current All-optical Processing Schemes

Example: N = 4, node with M = 3

N -bit

?

Port 1

Port 2

All-optical logic gates

All-optical correlators

Port 3

Problems:

• Large size routing table  increased processing time

• Optical device complexity  poor scalability

Solution:

• To reduce the size of the routing table

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

Address patterns

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

Output ports

Port 2

Port 1

Port 3

Port 1

Port 3

Port 2

Port 2

Port 1

Port 3

Port 2

Port 2

Port 3

Port 1

Port 1

Port 2

Port 1

Decimal value

0

1

4

5

6

2

3

7

8

12

13

14

15

9

10

11

PPM - Operation

Data packet payload a

0 a

1 a

2 a

3

Clk

Header

( packet address )

Address extraction

(a)

PPM

(b)

(a) (b)

PPM Based Routing Table

Pulse-position routing table (N = 4, M = 3)

 Grouping address patterns having the same output ports

 Each new pulse-position routing table ( PPRT ) entry has optical pulses at the positions corresponding to the decimal values of group’s patterns

Header Correlation

 Single AND operation is required for matching PPM-address and multiple address patterns (PPRT entry)

 Processing-time gain:

Proposed Node with PPM Processing

Data H Clk

Data H Clk

All-optical switch

SW1

SW2

SWM

1

...

2

M

H

S-P

Converter

...

PPM-ACM

Clock extraction

& 1

& 2

& M

...

PPRT

Entry 1

Entry M

...

Header processing unit

Clock extraction : synchronize the arrival of data packet and the node processing

S-P converter : convert the serial address bits to parallel bits

PPM-ACM : (PPM address conversion module): convert binary address to the PPM-converted address

PPRT : store M entries ( M PPM frames)

Switch synchronisation : synchronise SW with data packet

All-optical switch : controlled by matching signals to open the correct SW

PPRT with Multimode Transmission

Pulse-position routing table (N = 4, M = 3)

 Same address pattern can appear at multiple PPRT entries

 Modes: unicast, multicast, broadcast and deletion

Node with Multicast Tx Mode

Data H Clk

Data H Clk

H

S-P

Converter

...

PPM-ACM

Clock extraction

PPRT

Entry 1

Entry M

...

Header processing unit

& 1

& 2

& M

All-optical switch

SW1

SW2

Data

SWM

1

H Clk

...

2

M

...

Optical PPM Generation Circuit

N -bit address-codeword: A = [ a i

{0,1}], i = 0, …, N – 1

PPM-format address: y ( t ) = x ( t +

 i a i

2 i

T s

)

PPRT Generation

 Is self-initialised with the extracted clock pulse. The M entries are filled by:

– Single optical pulse + Array of 2 N optical delay lines; Or,

– M pattern generators + M optical modulators.

Ultrafast Optical AND Gate

A/B 0

0 0

1 0

1

0

1

A

B

Implementation:

Using optical interferometer configuration

+ optical nonlinear devices

SOA1

A × B

SOA2

Symmetric Mach-Zehnder Interferometer

(SMZI)

All-Optical Switch

1

M

CP 1

SMZ1

CP 2

SMZ2

CPM

SMZM

1

2

M

Simulation Results

For an all-optical core network up to 2 5 = 32 nodes

32 node network

00000

0

0001

1

01000

...

8

10001

17

01111

15

11101

29

Simulation parameters Values

Address length N 5

Number of outputs M

Bit rate

3

50 Gb/s

Payload

Packet gap

Pulse width FWHM

Pulse’s power peak

Wavelength

PPM slot duration T s

16 bits

2 ns

1 ps

2 mW

1554 nm

5 ps

Simulation Results

Demonstrate the PPM processing and Tx modes

PPRT with 3 entries:

Simulation Results

Input

Output 1

Output 2

Output 3

Simulation Results

0 1 1 1 0

Packet with address 01110

PPM-converted address

PPRT entry 1

Synchronized matching pulse

Conclusions

 PPM processing scheme

Reduces the required processing time

Provides the scalability: adding/dropping network nodes and node outputs

 Applications:

All-optical core/backbone networks (N >> M ~ 3-6)

Optical bypass router (electrical router + optical bypass router)

 Challenges:

Optical switch with long and variable switching window

Timing jitter and received pulse dispersion

Publications

 H. Le-Minh, Z. Ghassemlooy, and W. P. Ng., “ A novel node architecture for all-optical packet switched network ”, proceeding of

10 th European Conference on Networks and Optical

Communications 2005 (NOC2005), pp. 209-216, London, UK, Jul.

2005

 H. Le-Minh, Z. Ghassemlooy, and W. P. Ng., ” Ultrafast header processing in all-optical packet switched-network ” proceeding of

7 th International Conference on Transparent Optical Networks

2005 (ICTON2005), Vol. 2, pp. 50-53, Barcelona, Spain, Jul. 2005

Acknowledgements

 Northumbria University for sponsoring the research work

Thank you!

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