ECE 645: Lecture 2 Number Representation Part 2 Fixed-Radix Signed Representations Floating Point Representations Little-Endian vs. Big-Endian Representations Galois Field Representations Required Reading Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design Chapter 2, Representing Signed Numbers, Chapter 17, Floating-Point Representations J-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Chapter 3.2, Integers Chapter 3.3, Real Numbers Recommended Reading (to be covered at the next lecture) Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design Chapter 5, Basic Addition and Counting J-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Chapter 4.1.1 Basic Algorithm Chapter 11.1 Basic Adder Chapter 11.2 Carry-Chain Adder Signed Number Representations Representations of signed numbers Signed-magnitude Biased Radix-complement r=2 Two’s complement Complement Diminished-radix complement (Digit complement) r=2 One’s complement Signedmagnitude 7 6 5 4 3 2 1 0 -0 -1 -2 -3 -4 -5 -6 -7 -8 0111 0110 0101 0100 0011 0010 0001 0000 1000 1001 1010 1011 1100 1101 1110 1111 Two’s complement One’s complement 1111 1110 1101 1100 1011 1010 1001 1000 0111 0110 0101 0100 0011 0010 0001 0000 0111 0110 0101 0100 0011 0010 0001 0000 1111 1110 1101 1100 1011 1010 1001 1000 0111 0110 0101 0100 0011 0010 0001 0000 1111 1110 1101 1100 1011 1010 1001 1000 Biased Signed-magnitude representation of signed numbers k-1 k-2 0 magnitude sign Advantages: • conceptual simplicity • symmetric range: -(2k-1-1) .. -(2k-1-1) • simple negation Disadvantages: • addition of numbers with the same sign and with a different sign handled differently Biased (excess-B) representation of signed integers B = 2k-1, k=4 R(X) = X + B -2k-1 ≤ X ≤ 2k-1-1 X -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 R R(X) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Biased representation with radix 2 Signed number X Representation mapping Unsigned Representation R(X) Binary mapping Bit vector (xk-1xk-2...x0.x-1...x-l) k 1 R( X ) xi 2i i l Complement Signed Number Representations Complement representations with radix 2 Signed number X Representation mapping Unsigned Representation R(X) Binary mapping Bit vector (xk-1xk-2...x0.x-1...x-l) k 1 R( X ) xi 2i i l Useful dependencies 1 – xi = xi xi 1 – xi x i 0 1 1 0 1 0 X when X 0 |X| = - X when X < 0 One’s complement transformation For k 1 A Ai 2i 0 i l def OC(A) = A = 2k – 2-l - A k-1 k-2 ... – 0 -1 -2 ... -l Properties: 1 1 ... 1 . 1 1 ... 1 Ak-1 Ak-2 … A0 . A-1 A-2 ... A-l 0 OC(A) 2k – 2-l Ak-1 Ak-2 … A0 . A-1 A-2 ... A-l OC(OC(A)) = A One’s Complement Representation of Signed Numbers For –(2k-1 – 2-l) X 2k-1 – 2-l X for X > 0 def R(X) = 0 or OC(0) for X = 0 OC(|X|) for X < 0 0 R(X) 2k – 2-l One’s complement representation of signed integers X>0 0 X 0, 2k-1 X<0 k=4 X+2k-1 = 2k-1 - |X| -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 One’s complement representation of signed numbers Two’s complement transformation (1) For k 1 A Ai 2i 0 i l def TC(A) = A + 2-l = 2k – A for A > 0 0 2k – A = 2k – A – 2-l + 2-l = for A = 0 Properties: 0 TC(A) 2k – 2-l = (2k – 2-l – A)+2-l = A + 2-l TC(TC(A)) = A Two’s complement transformation (2) For k 1 A Ai 2i 0 i l def TC(A) = A + 2-l mod 2k = 2k – A mod 2k Two’s Complement Representation of Signed Numbers For –2k-1 X 2k-1 – 2-l def X for X 0 TC(|X|) for X < 0 R(X) = 0 R(X) 2k – 2-l Two’s complement representation of signed integers X>0 0 X 0 X<0 k=4 X+2k = 2k - |X| -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Two’s complement representation of signed integers Signed-magnitude representation of signed numbers X>0 0 X 0, 2k-1 X<0 k=4 | X|+2k-1 = -X+2k-1 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Signed-magnitude representation of signed numbers Biased representation of signed numbers X>0 0 X<0 X+B B X+B -8 -7 -6 -5 -4 -3 -2 -1 0 1 B = 2k-1, k=4 2 3 4 5 6 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Biased representation of signed numbers Arithmetic Operations in Signed Number Representations Unsigned addition vs. signed addition Programmer Machine 128 64 32 16 8 4 weight carry Unsigned mind 2 1 Signed mind 1 1 1 0 0 0 1 0 0 1 1 1 0 0 0 0 1 0 1 1 0 0 1 1 0 0 0 X +Y =S x6 y6 x7 y7 c8 FA s7 c7 FA s6 x5 y5 c6 FA s5 x3 y3 x4 y4 c5 FA s4 c4 FA s3 x2 y2 c3 FA s2 x1 y1 c2 FA s1 x0 y0 c1 FA s0 Out of range flags Carry flag - C C=1 0 out-of-range for unsigned numbers if result > MAX_UNSIGNED or result < 0 otherwise where MAX_UNSIGNED = 28-1 for 8-bit operands 216-1 for 16-bit operands Overflow flag - V V=1 0 out-of-range for signed numbers if result > MAX_SIGNED or result < MIN_SIGNED otherwise where MAX_SIGNED = 27-1 for 8-bit operands 215-1 for 16-bit operands MIN_SIGNED = -27 for 8-bit operands -215 for 16-bit operands Overflow for signed numbers Indication of overflow Positive + Positive = Negative Negative + Negative = Positive Formulas Overflow2’s complement = xk-1 yk-1 sk-1 + xk-1 yk-1 sk-1 = = ck ck-1 Two’s complement representation of signed integers Addition and subtraction Two’s complement Numbers of the same sign -16 8 4 2 1 Numbers of the opposite sign -16 8 4 2 1 11011 10110 -5 -10 00101 10110 5 -10 110001 -15 11011 -5 carry but not overflow -16 8 4 2 1 00111 01010 7 10 10001 -15 no carry but overflow -16 8 4 2 1 01010 11011 100101 10 -5 5 carry but not overflow Two's Complement Adder/Subtractor Architecture Can replace this with k xor gates Arithmetic Shift Two’s complement Sh.L {001012 = +5} = 010102 = +10 Sh.L {110112 = -5} = 101102 = -10 Sh.L {010102 = +10} = 101002 = - 12 Shift left may cause overflow overflow Sh.R {001012 = +5} = 000102 = +2 rem 1 Sh.R {110112 = -5} = 111012 = -3 rem 1 Shift right requires sign extension Addition and subtraction One’s complement Numbers of the same sign Numbers of the opposite sign -15 8 4 2 1 -15 8 4 2 1 11010 10101 + -5 -10 101111 1 10000 end-arround carry + -15 01010 11010 100100 1 10 -5 00101 5 Disadvantage: Need another adder after the addition is complete! Arithmetic Shift One’s complement Sh.L {001012 = +5} = 010102 = +10 Sh.L {110102 = -5} = 101012 = -10 Sh.L {010102 = +10} = 101002 = - 11 Shift left may cause overflow overflow Sh.R {001012 = +5} = 000102 = +2 rem 1 Sh.R {110112 = -5} = 111012 = -2 rem -1 Shift right requires sign extension Addition and subtraction Signed-magnitude Numbers of the same sign sign bit + 0 0 Numbers of the opposite sign magnitude 1011 0110 11 6 0 10001 17 carry = overflow sign bit + 1 0 magnitude 1011 0110 -11 6 11 > 6 – 1 1011 0110 11 6 0101 5 Signed Number Representations Summary Representing k-bit signed binary numbers Representation Representation Representation for X>0 for 0 Signedmagnitude X 0, 2k-1 Biased X+B B Representation for X<0 2k-1+|X| X+B typical B=2k-1 or 2k-1-ulp Complement X Two’s complement X One’s complement X 0, M mod 2k 0 0, 2k-ulp M-|X|=M+X 2k-|X|= X ulp 2k-ulp-|X|= X Value of a number in the signed representations Representation Signedmagnitude Value of (xk-1 xk-2 … x1 x0.x-1 … x-l) X ( 1) x k 1 k 2 i x 2 i i l k 1 Biased Two’s complement X xi 2i B i l X xk 1 2 k 1 k 2 xi 2i i l k 2 One’s complement X xk 1 (2k 1 ulp ) xi 2i i l Extending the number of bits of a signed number xk-1 xk-2 … x1 x0 . x-1 x-2 … x-l X Y yk’-1 yk’-2 … yk yk-1 yk-2 … y1 y0 . y-1 y-2 … y-l y-(l+1) … y-l’ signed-magnitude xk-1 0 0 0 0 0 0 0 xk-2 … x1 x0 . x-1 x-2 … x-l 0 0 0 0 0 0 two’s complement xk-1 xk-1 xk-1 . . .xk-1 xk-2 … x1 x0 . x-1 x-2 … x-l 0 0 0 0 0 0 one’s complement xk-1 xk-1 xk-1 . . .xk-1 xk-2 … x1 x0 . x-1 x-2 … x-l xk-1 . . . .xk-1 biased xk-1 x k 1 . . . x k 1 xk-2 … x1 x0 . x-1 x-2 … x-l 0 0 0 0 0 0 Generalized Complement Representation Generalized complement representation of signed integers Generalized complement representation of signed integers Floating Point Representations The ANSI/IEEE standard floatingpoint number representation formats Short (32-bit) format 8 bits, bias = 127, –126 to 127 Sign Exponent 11 bits, bias = 1023, –1022 to 1023 23 bits for fractional part (plus hidden 1 in integer part) IEEE 754 Standard (now being revised to yield IEEE 754R) Significand 52 bits for fractional part (plus hidden 1 in integer part) Long (64-bit) format Table 17.1 Some features of the ANSI/IEEE standard floatingpoint number representation formats Exponent Encoding Exponent encoding in 8 bits for the single/short (32-bit) ANSI/IEEE format Decimal code Hex code Exponent value 0 00 1 01 –126 126 127 128 7E 7F 80 –1 0 +1 254 255 FE FF +127 1.f 2e f = 0: Representation of 0 f 0: Representation of denormals, 0.f 2–126 f = 0: Representation of f 0: Representation of NaNs Fig. 17.4 Denormals in the IEEE single-precision format. Little-Endian vs. Big-Endian Representation of Integers Little-Endian vs. Big-Endian Representation A0 B1 C2 D3 E4 F5 67 8916 MSB LSB Little-Endian Big-Endian 0 MSB = A0 B1 C2 D3 E4 F5 67 LSB = 89 address MAX LSB = 89 67 F5 E4 D3 C2 B1 MSB = A0 Little-Endian vs. Big-Endian Camps 0 MSB LSB ... ... address MSB LSB MAX Big-Endian Motorola 68xx, 680x0 Bi-Endian IBM Hewlett-Packard Sun SuperSPARC Internet TCP/IP Motorola Power PC Silicon Graphics MIPS Little-Endian Intel AMD DEC VAX RS 232 Little-Endian vs. Big-Endian Origin of the terms Jonathan Swift, Gulliver’s Travels • A law requiring all citizens of Lilliput to break their soft-eggs at the little ends only • A civil war breaking between the Little Endians and the Big-Endians, resulting in the Big Endians taking refuge on a nearby island, the kingdom of Blefuscu • Satire over holy wars between Protestant Church of England and the Catholic Church of France Little-Endian vs. Big-Endian Advantages and Disadvantages Big-Endian • easier to determine a sign of the number • easier to compare two numbers • easier to divide two numbers • easier to print Little-Endian • easier addition and multiplication of multiprecision numbers Pointers (1) Big-Endian 0 address MAX Little-Endian int * iptr; 89 67 F5 E4 D3 C2 B1 A0 (* iptr) = 8967; iptr+1 (* iptr) = 6789; Pointers (2) Big-Endian 0 address MAX Little-Endian long int * lptr; 89 67 F5 E4 D3 C2 B1 A0 (* lptr) = 8967F5E4; lptr + 1 (* lptr) = E4F56789; Polynomial Representation of the Galois Field elements Evariste Galois (1811-1832) Evariste Galois (1811-1832) Studied the problem of finding algebraic solutions for the general equations of the degree 5, e.g., f(x) = a5x5+ a4x4+ a3x3+ a2x2+ a1x+ a0 = 0 Answered definitely the question which specific equations of a given degree have algebraic solutions On the way, he developed group theory, one of the most important branches of modern mathematics. Evariste Galois (1811-1832) 1829 Galois submits his results for the first time to the French Academy of Sciences Reviewer 1 Augustin-Luis Cauchy forgot or lost the communication 1830 Galois submits the revised version of his manuscript, hoping to enter the competition for the Grand Prize in mathematics Reviewer 2 Joseph Fourier – died shortly after receiving the manuscript 1831 Third submission to the French Academy of Sciences Reviewer 3 Simeon-Denis Poisson – did not understand the manuscript and rejected it. Evariste Galois (1811-1832) May 1832 Galois provoked into a duel The night before the duel he writes a letter to his friend containing the summary of his discoveries. The letter ends with a plea: “Eventually there will be, I hope, some people who will find it profitable to decipher this mess.” May 30, 1832 Galois is grievously wounded in the duel and dies in the hospital the following day. 1843 Galois manuscript rediscovered by Joseph Liouville 1846 Galois manuscript published for the first time in a mathematical journal Field Set F, and two operations typically denoted by (but not necessarily equivalent to) + and * Set F, and definitions of these two operations must fulfill special conditions. Examples of fields Infinite fields { R= set of real numbers, + addition of real numbers * multiplication of real numbers } Finite fields { set Zp={0, 1, 2, … , p-1}, + (mod p): addition modulo p, * (mod p): multiplication modulo p } Finite Fields = Galois Fields GF(pm) GF(p) Arithmetic operations present in many libraries p – prime pm – number of elements in the field GF(2m) Polynomial basis representation Most significant special cases Normal basis representation Fast in hardware Fast squaring Elements of the Galois Field GF(2m) Binary representation (used for storing and processing in computer systems): A = (am-1, am-2, …, a2, a1, a0) ai {0, 1} Polynomial representation (used for the definition of basic arithmetic operations): m-1 A(x) = aixi = am-1xm-1 + am-2xm-2 + …+ a2x2 + a1x+a0 i=0 multiplication + addition modulo 2 (XOR) Addition and Multiplication in the Galois Field GF(2m) Inputs A = (am-1, am-2, …, a2, a1, a0) B = (bm-1, bm-2, …, b2, b1, b0) ai , bi {0, 1} Output C = (cm-1, cm-2, …, c2, c1, c0) ci {0, 1} Addition in the Galois Field GF(2m) Addition A B C A(x) B(x) C(x) = A(x) + B(x) = = (am-1+bm-1)xm-1 + (am-2+bm-2)xm-2+ …+ + (a2+b2)x2 + (a1+b1)x + (a0+b0) = = cm-1xm-1 + cm-2xm-2 + …+ c2x2 + c1x+c0 multiplication + addition modulo 2 (XOR) ci = ai + bi = ai XOR bi C = A XOR B Multiplication in the Galois Field GF(2m) Multiplication A B C A(x) B(x) C(x) = A(x) B(x) mod P(X) = cm-1xm-1 + cm-2xm-2 + …+ c2x2 + c1x+c0 P(x) - irreducible polynomial of the degree m P(x) = pmxm + pm-1xm-1 + …+ p2x2 + p1x+p0