Eindhoven
MOS-AK Meeting
April 4, 2008
Accurate FinFET modeling at high temperatures
A.Cerdeira1, M. Estrada1, J. Alvarado2, V. Kilchytska2 and D. Flandre2
1
Sección de Electrónica del Estado Sólido, Depto. de Ingeniería Eléctrica
CINVESTAV, México, D.F. cerdeira@cinvestav.mx
2 Microelectronics Laboratory, Université Catholique de Louvain, Louvain-la-Neuve, Belgium
INTRODUCTION
The new compact analytical Doped Symmetric Double-Gate Model (Doped-SDG model) recently developed in [1,2,3] that considers variable mobility and short-channel
effects, is used for modeling FinFETs behavior at different temperatures up to 200°C.
FinFETs with the following features are analyzed [4]:
DOPED-SDG MOSFET MODEL








As was shown in [1] the new model is based on the
description of the potential difference between the
surface and the center of the silicon layer, d, as function
of doping concentration Na, equivalent gate dielectric
thickness tox and silicon layer thickness ts.
The surface potentials in all regimes, from below to
above threshold regime can be calculated using the
Lambert function.
High K-metal gate stack.
Na= 1015 cm-3.
EOT = 1.6 nm.
Fin-width of 25 nm.
Fin-height of 65 nm.
5 Fins.
Transistor channel width, W=775 nm.
Channel lengths of 10 m and 80 nm.
VT 0

1
1 
 qb

CS
1  e T Cox
  t 2
qb T 1 
Cox
T 4Cs

Drain
Gate
Source
Multiple Fins
The inverted charge concentration normalized to gate capacitance Cox and
multiplied by thermal voltage t=kT/q is equal to [2,3]:

1
1  
 qb 
Cs
1 e
qn  2qb
 1
Cox

d (VT )
T 
t
q Na t S
qb 
Cox t
Fin-width
Fin-height
SEM photo of a FinFET structure from IMEC
The threshold voltage for long channel transistors VT0 is defined as:
 Cox
 VFB  2F  t ln 
 4Cs
Channel length
The mobility dependence at transversal medium electric field Em, at electric field along the
channel and at temperature T is expressed as:
1
1
o

C

t
q

q
q

1.2
ox
ns
nd
b 
P1
P2
2
;
Em 
 

 T    Em 
 Em  

 VDef 

s 
2
2
1 







1



 v L 
 300    E1 
 E2  
 sat 
where qns and qnd are normalized inverted charge concentrations at source and drain respectively.

e
s  2F V
t
qb

2
Current including the short channel effects (SCE) and
temperature is equal:
2
2

q

q
W
n( L) 
2
ns
nd
2 C0t   
 qns  qnd  
L
2
1


I

L


W
1
1




1
1  2 C0  R VGT     VDef  1  th(20VGT ) 
L
L
2



 2
VGT = VG - VT and SCE are considered through the following expressions:
VT including DIBL and roll-off effect (VT = VT0 - VT)
 t n  
VT   t   1  e
L 
2
L

0.3Lm
V



  Na 
V
2.5t 
 ln 

  n 1  39 t  e

ia

 

Channel shortening
tC
L

L
L
Saturation voltage
Variation of S
2


L

 


1
 1.75t s   1
n( L)  1.0151  e
 2 1  th10VGT   2 1  th10VGT 




Vsat
 qns  qb / 2 
t 

 qns  qnsat  2 ln 
 
 qnsat  qb / 2 
Effective drain voltage VDef
o VD  VDefs
  L   
 ln    1 ln 1 
 t   
vsattC
  C  




VDef
Natural DG length
2


1 
t 

t

t


 Vsat  VD  Vsat    VD  Vsat    4 Vsat 
2 
3
3
3




ts
4CS
tn 
1
COX
2 2
Comparison of measured and modeled transfer characteristics at VD= 20 mV and 1V with temperatures of 20°C; 75°C; 100°C; 150°C and 200°C are shown
in figures 1 to 4. Excellent agreement in below and above threshold regions is observed including the variation of the subthreshold slope. Extracted values of
the model parameters are also show in Tables I - III with  = 0.6 for all cases.
1E-6
0.5
L= 10 m
VD= 20 mV
15
TABLE I Mobility parameters o, E1, P1, E2, P2
L= 10 m
VD= 1 V
o
(cm2/V s)
E1
(V/cm)
P1
L= 10 m
1341
2500
L= 80 nm
1257
2500
-6
10
1E-8
measured
model
20 ºC
75 ºC
100 ºC
150 ºC
200 ºC
0.2
1E-10
measured
model
20 ºC
75 ºC
100 ºC
150 ºC
200 ºC
5
0.0
0.2
10
0.4
0.6
0.8
1.0
1.2
0
1E-14
1.4
0.2
0.4
0.6
0.8
1.0
1.2
10
1.4
350
1E-6
12
10
8
1E-8
6
measured
model
75 ºC
100
150
200
4
2
0
0.2
0.4
0.6
0.8
1.0
1.2
ID (A)
1E-7
L= 80 nm
VD= 1 V
1E-4
300
1E-5
250
1E-6
200
1E-7
150
1E-8
measured
model
75 ºC
100
150
200
1E-9
100
1E-10
1E-11
1.4
VG (V)
Fig.3 Transfer characteristic at 20 mV; L= 80 nm
50
0
0.2
0.4
0.6
0.8
1.0
1.2
VG (V)
Fig. 4 Transfer characteristic at 1 V; L= 80
1E-9
1E-10
0.33
3.4 – 2VDef
1.5
T ºC
R []

75
600
1.2
75
100
150
200
100
560
1.2
L= 10 m (exp)
62.8
78
82.6
106.3
130
150
460
1.2
modeled
62.6
77.7
86.4
105.7
130
200
450
1.3
75.2
81.8
93.4
105.9
75.2
80.7
92.3
105.3
62.6
CONCLUSIONS
1E-3
1E-5
L= 80 nm
VD= 20 mV
1.5
T=20ºC
modeled
Fig. 2 Transfer characteristic at 1 V; L= 10 m
400
16
4.7- 1.1V Def
TABLE II Series
resistance and
parameter 
S (mV/dec)
L= 80 nm (exp)
VG (V)
Fig. 1 Transfer characteristic at 20 mV; L= 10 m
0.33
TABLE III Extracted values of subthreshold slope S
-12
VG (V)
ID (A)
-10
1E-12
0.1
14
-8
10
P2
The Doped-SDG Model was used for modeling FinFET transistors with metal
gate, low doped silicon layer for two different channel lengths, 10 m and 80
nm. The transfer characteristics were measured at 20ºC, 75ºC, 100ºC, 150ºC
and 200ºC. The measured and modeled characteristics present an excellent
coincidence from below to above threshold regions, including the subthreshold
slope, showing the accuracy of the proposed model and its application to
FinFETs.
ID (A)
0.3
10
ID (A)
ID (A)
0.4
E2
(V/cm)
BIBLIOGRAPHY
[1] A. Cerdeira, O. Moldovan, B. Iñiguez and M. Estrada, “Modeling of potentials and threshold voltage for symmetric doped
1E-11
double-gate MOSFETs”, Solid-State Electronics, Jan. 2008, available on ine www.sciencedirect.com
1.4
[2] A. Cerdeira, B. Iñiguez and M. Estrada, “Improved Compact Model for Symmetric Doped Double-Gate MOSFETs”,
SBMicro 2007, ECS Transactions, 9 (1) 47-56 (2007)
[3] A. Cerdeira, B. Iñiguez and M. Estrada, “Compact Model for Short Channel Symmetric Doped Double-Gate MOSFETs”,
to be published in Solid-State Electronics
nm
[4] N. Collaert et al.,Symposium on VLSI Technology, pp. 108-109, 2005