Soumyarshi Das

Documents
VCS Simulation Lab Manual
VCS Simulation Lab Manual
Logic Synthesis Report: Chiptop Design, 14nm
Logic Synthesis Report: Chiptop Design, 14nm
Digital Circuit Optimization: Load Capacitance Reduction
Digital Circuit Optimization: Load Capacitance Reduction
LNS Arithmetic Techniques for Low Power Systems
LNS Arithmetic Techniques for Low Power Systems