GS_EE128 - San Jose State University

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SAN JOSE STATE UNIVERSITY
COLLEGE OF ENGINEERING
DEPARTMENT OF ELECTRICAL ENGINEERING
EE 128, PHYSICAL ELECTRONICS, Fall 2012
Instructor:
Khosrow Ghadiri
Office Location:
ENGR 371
Telephone:
(408) 924-3916
Fax:
(408) 924-3925
Email:
k.ghadiri@sjsu.edu
Website URL:
http://www.engr.sjsu.edu/kghadiri
Course Webpage:
D2L
Class Days/Time:
TR 10:30-11:45
Office Hours:
MW 9:30-10:30-TR 9:30-10:30 – TR 3:30-4:30
Classroom:
ENGR. 345
Prerequisites:
MatE 153 with a grade of "C" or better. PHYS 53 or 52
Course Description
The course objective is for students to be able to understand characteristics and behavior of
semiconductor devices. Fundamental concepts in solid-state semiconductor physics are
reviewed and applied to derive current-voltage characteristics of several key semiconductor
devices such as diodes, bipolar junction transistors, and metal-oxide-semiconductor field-effect
transistors. Methods of device fabrication also are introduced.
Specific topics covered in EE128-1 include:
1- Review of material contact physics, IC resistors, carrier generation and charge transport mechanism
in semiconductors.
2- Review of semiconductor process technology.
3- PN junction diode: equilibrium, steady state, and transient behavior.
4- Metal semiconductor junction, Schottky barrier, and Ohmic behavior.
5- Bipolar junction transistor: carrier transport in pnp/npn structure, amplification, current voltage
characteristics, switching, and equivalent circuit model.
5- Metal-Oxide-Semiconductor (MOS) Field-Effect-Transistor; MOS capacitor; field effect NMOS, PMOS,
CMOS, current-voltage characteristics, and switching.
EE128-1, Fall 2012: Greensheet
2
Course Goals and Student Learning Objectives
GE/SJSU Studies Learning Outcomes (LO), if applicable
Upon successful completion of this course, students will be able to:
LO1 Demonstrate an understanding of the fundamentals of Electrical Engineering, including its
mathematical and scientific principles, analysis and design.
LO2 Demonstrate the ability to apply the practice of Electrical Engineering in real-world
problems.
Course Content Learning Outcomes
Upon successful completion of this course, students will be able to:
LO3 Describe fundamental concepts of solid-state physics applied to the semiconductor
devices.
LO4 Explain general electrical behavior of semiconductor and construct appropriate physical
models.
LO5 Illustrate structural details and current-voltage characteristics of diodes, BJT, and
MOSFET.
LO6 Apply the fundamental understanding of semiconductor devices with knowledge of the
limitations of physical models.
Relationship of Course to Program Objectives
This course supports the achievement of the following objectives (numbers in parentheses refer
to specific ABET criteria).
(a)
(3.a) an ability to apply knowledge of mathematics, science, and engineering
(b)
(3.c) an ability to design a system, component, or process to meet desired needs
(c)
(3.e) an ability to identify, formulate, and solve engineering problems
(d)
(EE.3) a knowledge of advanced mathematics such as differential equations, differential
and integral calculus, linear algebra and vector analysis.
Required & Recommended Texts/Software
Required:
Solid State Electronic Devices, by Ben G. Streetman sixth edition, Prentice Hall, 2006. ISBN 0-13149726
REFERENCES:
1- R.F. Pierret, Semiconductor Device Fundamentals, Addison Wesley, 1996
2- S. Dimitrijev, Understanding Semiconductor Devices Oxford university press 2000
3- J. Singh, Semiconductor Devices: Basic Principles, Wiley, 2002
4- S. M. Sze, Semiconductor Devices: Physics and Technology, Wiley, 2002
5- E. Yang, Microelectronic Devices. Mc Graw Hill. 1988
6- R.S. Muller and T.I. Kamins, Device Electronics for Integrated Circuits, 2nd Edition, Wiley, 1986
7- A.S.Grove, Physics and Technology of Semiconductor Devices, Wiley, 1967
EE128-1, Fall 2012: Greensheet
3
Dropping and Adding
Students are responsible for understanding the policies and procedures about add/drop, grade
forgiveness, etc. Refer to the current semester’s Catalog Policies section at
http://info.sjsu.edu/static/catalog/policies.html. Add/drop deadlines can be found on the
current academic calendar web page located at
http://www.sjsu.edu/academic_programs/calendars/academic_calendar/. The Late Drop Policy
is available at http://www.sjsu.edu/aars/policies/latedrops/policy/. Students should be aware of
the current deadlines and penalties for dropping classes.
Information about the latest changes and news is available at the Advising Hub at
http://www.sjsu.edu/advising/.
Assignments and Grading Policy
Grading:
Homework & Quiz
Midterm Exam #1:
Midterm Exam #2:
Final Exam
:
20%
25%
25%
30%
Exams:
All exams are in-class. Two 8.5x11 front & back summary sheets in your own handwriting are
allowed. No photocopied solutions of problems or any other course material is allowed. Your
course letter grade (A, B, C, F) is assigned based on the class mean and standard deviation
(curved grade). Your score relative to the mean in units of standard deviation determines your
grade.
Homework:
Homework is crucial for understanding the course material. Homework will be assigned regularly.
Part will be fully graded and the rest will be checked for completeness. Solutions will be provided.
You’re welcome (and encouraged) to discuss homework problems with other students in the class but
you have to submit your own independent solutions. Copied homework earn zero grade for all parties
involved and could have more serious consequences. Doing the homework is crucial for
understanding the lecture material and for doing well on the exams. Please note that the 5% for the
homework can move your grade across grade boundaries (that is, from B to B+ or A- to A, … etc).
No late homework will be accepted.
University Policies
Academic integrity
Your commitment as a student to learning is evidenced by your enrollment at San Jose State
University.
The
University’s
Academic
Integrity
policy,
located
at
http://www.sjsu.edu/senate/S07-2.htm, requires you to be honest in all your academic course
work. Faculty members are required to report all infractions to the office of Student Conduct
EE128-1, Fall 2012: Greensheet
4
and Ethical Development. The Student Conduct and Ethical Development website is available
at http://www.sa.sjsu.edu/judicial_affairs/index.html.
Instances of academic dishonesty will not be tolerated. Cheating on exams or plagiarism
(presenting the work of another as your own, or the use of another person’s ideas without
giving proper credit) will result in a failing grade and sanctions by the University. For this
class, all assignments are to be completed by the individual student unless otherwise specified.
If you would like to include your assignment or any material you have submitted, or plan to
submit for another class, please note that SJSU’s Academic Policy S07-2 requires approval of
instructors.
Campus Policy in Compliance with the American Disabilities Act
If you need course adaptations or accommodations because of a disability, or if you need to
make special arrangements in case the building must be evacuated, please make an appointment
with me as soon as possible, or see me during office hours. Presidential Directive 97-03
requires that students with disabilities requesting accommodations must register with the
Disability Resource Center (DRC) at http://www.drc.sjsu.edu/ to establish a record of their
disability.
EE Department Honor Code
The Electrical Engineering Department will enforce the following Honor Code that must be
read and accepted by all students.
“I have read the Honor Code and agree with its provisions. My continued enrollment in this
course constitutes full acceptance of this code. I will NOT:






Take an exam in place of someone else, or have someone take an exam in my place
Give information or receive information from another person during an exam
Use more reference material during an exam than is allowed by the instructor
Obtain a copy of an exam prior to the time it is given
Alter an exam after it has been graded and then return it to the instructor for re-grading
Leave the exam room without returning the exam to the instructor.”
Measures Dealing with Occurrences of Cheating


Department policy mandates that the student or students involved in cheating will
receive an “F” on that evaluation instrument (paper, exam, project, homework, etc.)
and will be reported to the Department and the University.
A student’s second offense in any course will result in a Department recommendation of
suspension from the University.
EE128-1, Fall 2012: Greensheet
5
SCHEDULE
DATE
TOPICS
READING
Thurs. 08/23/12
Introduction – Road Map – Contacts
Notes
Tues. 08/28/12
IC Resistor
Notes
Thurs. 08/30/12
p-n Junction, Equilibrium Conditions
5-2
Tues. 09/04/12
Forward-biased Junctions
5-3
Thurs. 09/06/12
Reverse-biased junctions-Steady state conditions
5-3
Tues. 09/11/12
Reverse-bias breakdown
5-4
Thurs. 09/13/12
Rectifiers
5-4
Tues. 09/18/12
Zener diodes
5-4
Thurs. 09/20/12
Transient and AC conditions
5-5
Tues. 09/25/12
Capacitance of p-n junction –Deviation from the simple theory 5-5
Thurs. 09/27/12
Metal-Semiconductor contacts (rectifying contacts
Tues. 10/02/12
EXAM I
Thurs. 10/04/12
Homework
Set 1
Set 2
Set 3
5-7
Set 4
Metal-Semiconductor contacts (rectifying contacts)
5-7
Set 5
Tues. 10/09/12
Metal-Semiconductor contacts (Ohmic contacts)
5-7
Thurs. 10/11/12
The junction field effect transistors
6-1,2
Tues. 10/16/12
The metal oxide semiconductor
6-4,5
Thurs. 10/18/12
The ideal MOS capacitor (band-diagram)
6-4
Tues. 10/23/12
The ideal MOS capacitor
6-4
Thurs. 10/25/12
Effects of real surface - Threshold voltage
6-5
Tues. 10/30/12
Secondary effect
6-5
Thurs. 11/01/12
Bipolar junction transistors
7-1,2
Tues. 11/06/12
Minority carrier distributions
7-4
Thurs. 11/08/12
EXAM II
Tues. 11/13/12
The coupled-diode model
7-5
Thurs. 11/15/12
The coupled-diode model- Charge control analysis
7-5
Tues.. 11/20/12
Switching
7-6
Set 9
Thurs. 11/22/12
Thanks giving
Tues. 11/27/12
Some important effects - Gummel-Poon model
7-7
Set 10
Thurs. 11/29/12
Frequency limitation
7-8
Tues. 12/04/12
Heterojunction Bipolar Transistors
7-9
Thurs. 12/06/12
Photodiodes – Solar cells –Photodetectors - LEDs
8-1,2
Mon. 12/17/12
Final exam 9:45-12:00
Set 6
Set 7
Set 8
Set 11
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