Memory Management
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Course Overview Principles of Operating Systems Introduction Computer System Structures Operating System Structures Processes Process Synchronization Deadlocks CPU Scheduling © 2000 Franz Kurfess Memory Management Virtual Memory File Management Security Networking Distributed Systems Case Studies Conclusions Memory Management 1 Chapter Overview Memory Management Motivation Objectives Background Address Spaces Partitioning logical physical Contiguous Allocation Paging Segmentation Segmentation with Paging Important Concepts and Terms Chapter Summary fixed dynamic Swapping © 2000 Franz Kurfess Memory Management 2 Motivation after CPU time, memory is the second most important resource in a computer system even with relatively large amounts of memory, the amount of available memory is often not satisfactory getting information from hard disk instead of main memory takes orders of magnitudes longer 60 ns access time for main memory 10 ms (= 10,000,000 ns) average access time for hard disks several processes must coexist in memory © 2000 Franz Kurfess Memory Management 3 Objectives understand the purpose and usage of main memory in computer systems understand the addressing scheme used by the CPU to access information in main memory distinguish between logical and physical addresses understand various methods to allocate available memory sections to processes © 2000 Franz Kurfess Memory Management 4 Background and Prerequisites main memory and computer system architecture linking and loading program execution and processes instruction execution © 2000 Franz Kurfess Memory Management 5 Memory main memory is used to store information required for the execution of programs code, data, auxiliary information the CPU can only access items that are in main memory memory is a large array of addressable words or bytes a process needs memory space to execute sufficient memory can increase the utilization of resources and improve response time © 2000 Franz Kurfess Memory Management 6 Hardware Architecture CPU Main Memory Control Unit Registers I/O Devices Controllers Arithmetic Logic Unit (ALU) System Bus © 2000 Franz Kurfess [David Jones] Memory Management 7 Main Memory Memory and CPU CPU Bus MMU Registers Control Unit Arithmetic Logic Unit (ALU) © 2000 Franz Kurfess Memory Management 8 Memory Organization Main Memory 7FFFF memory size = memory “height” * memory width usually measured in MByte memory number of memory locations = physical address space memory width number of bits per memory location either one Byte or one word memory “height” location each location has its own unique (physical) address larger items may be assigned to consecutive locations © 2000 Franz Kurfess 0 Memory Management 9 Hierarchy of Storage Devices Registers Cache Main Memory Electronic Disk Magnetic Disk Optical Disk Magnetic Tape © 2000 Franz Kurfess Memory Management 10 Storage Device Characteristics Storage Device Access Speed Capacity Cost Volatility Registers nanoseconds Kbytes very high high Cache tens of nanoseconds Mbytes $100 per Mbyte high M ain M emory 50-70 nanoseconds tens or hundreds of Mbytes $10 per Mbyte high Electronic Disk 100-200 nanoseconds hundreds of Mbytes $1 per Mbyte medium (battery) M agnetic Disk 5-15 milliseconds tens of Gbytes $100 per Gbyte low Optical Disk 100 milliseconds hundreds of Gbytes $10 per Gbyte low Tape Drive milliseconds to seconds hundreds of Gbytes to TBytes $1 per Gbyte low © 2000 Franz Kurfess Memory Management 11 From Program to Process Process Image Load Module Process Control Block Program Program Program Loader Data Data Data User Stack Shared Address Space © 2000 Franz Kurfess Memory Management 12 Linking and Loading Main Memory Linker Process Image Library Module 1 Load Module Module 2 Loader Module 3 © 2000 Franz Kurfess Memory Management 13 Linking several components are combined into one load module modules, objects libraries references across modules must be resolved the load module is passed to the loader © 2000 Franz Kurfess Memory Management 14 Static vs. Dynamic Linking static linking done at compile or link time does not facilitate sharing of libraries dynamic linking linking is deferred until load or runtime to allow integration of libraries © 2000 Franz Kurfess Memory Management 15 Dynamic Runtime Linking linking is postponed until runtime unresolved references initiate the loading of the respective module and its linking to the calling module easy sharing of modules only the modules that are really needed are loaded and linked rather complex © 2000 Franz Kurfess Memory Management 16 Loading creation of an active process from a program process process image image is loaded into main memory execution can start now symbolic addresses must be resolved into relative or absolute addresses absolute loading relocatable loading dynamic run-time loading © 2000 Franz Kurfess Memory Management 17 Absolute Loading a given load module must always be given the same location in main memory all address references must be absolute refer to the starting address of physical memory can be done by the programmer or compiler severe disadvantages inflexible: modifications require recoding or recompilation of the program requires knowledge about memory allocation impractical for multiprogramming, multitasking, etc. © 2000 Franz Kurfess Memory Management 18 Relocatable Loading load module can be located anywhere in main memory addresses are relative to the start of the program the location where the image is loaded is added to the relative address at load time or during execution © 2000 Franz Kurfess Memory Management 19 Dynamic Runtime Loading memory references are still relative in the process image when it is loaded into main memory the absolute address is only calculated when the instruction is executed requires allows hardware support (MMU) swapping out and back in of processes the new location of a process may be different after a swap © 2000 Franz Kurfess Memory Management 20 Processes and Addresses process image determines logical address space must be placed in physical memory process execution Process Control Information Program Entry Point Program Execution Process Process Control Block Program Data Access relative addresses: relevant information is addressed within the Top of Stack process image must be converted to absolute (physical) addresses © 2000 Franz Kurfess Data User Stack Shared Address Space Memory Management 21 Process in Main Memory mapping from logical address space (process image) to physical address space (main memory) memory size address conversions Process Control Information Program Entry Point Program Execution the whole process image is allocated in one piece © 2000 Franz Kurfess Process Control Block Program Data Access Data contiguous allocation Main Memory Top of Stack User Stack Shared Address Space Memory Management 22 Processes and Address Spaces Process 1 Process 2 Process n Process Identification Process State Information Process Control Information Process Identification Process State Information Process Control Information Process Identification Process State Information Process Control Information System Stack System Stack System Stack User Stack User Stack Process Control Block User Stack User Address Space Shared Address Space © 2000 Franz Kurfess User Address Space User Address Space Shared Address Space [adapted from Stallings 98] Memory Management 23 Processes in Memory Process 2 several processes need to be accommodated OS has its own memory section simplified view larger number of processes processes do not occupy one single section in memory, but several smaller ones (noncontiguous allocation) not the whole process image is always present in memory (virtual memory) © 2000 Franz Kurfess Main Memory Process n Process 1 Operating System Memory Management 24 Instruction Execution Cycle the execution of one instruction consists of several steps fetch an instruction from memory decode the instruction fetch operands from memory execute instruction store result in memory the execution of one instruction may require several memory accesses even worse with indirect addressing (pointers) © 2000 Franz Kurfess Memory Management 25 Terminology contiguous allocation information is stored in consecutive memory addresses a process occupies a single section of memory non-contiguous a process is distributed over several, disjoint sections of main memory information is not necessarily stored in consecutive addresses real memory memory directly available in the form of RAM chips virtual allocation memory extension of real memory through the use hard disk space for less frequently used information © 2000 Franz Kurfess Memory Management 26 Terminology (cont.) logical address address generated by the CPU physical addresses address applied to memory chips block data are transferred in units of fixed size used for hard disks and similar devices typical block sizes are 512 Bytes to 16 KBytes locality of reference there is a good chance that the next access to instructions or data will be close to the current one fragmentation memory or disk space is allocated in small parts, leading to inefficient utilization © 2000 Franz Kurfess Memory Management 27 Memory Management Requirements relocation protection sharing logical organization physical organization © 2000 Franz Kurfess Memory Management 28 Relocation the location of a process image in main memory may be different for different runs of the program availability of memory areas at the start of the execution process may be temporarily swapped out as a consequence, the logical address is different from the physical address the conversion is performed by the memory management common schemes require hardware support special registers, or memory management unit (MMU) © 2000 Franz Kurfess Memory Management 29 Static Relocation relocation requires done at linking or at loading time knowledge about available memory sections a statically relocated program cannot be moved once it has its memory section assigned © 2000 Franz Kurfess Memory Management 30 Dynamic Relocation relocation done at run time requires hardware support relocation registers, MMU the process image, or a part of it, can be moved around at any time the value of the relocation registers must be changed accordingly © 2000 Franz Kurfess Memory Management 31 Protection processes may only access their own memory sections in addition, shared memory sections may be accessible to selected processes access to other memory areas must be restricted sections of other processes sections of the operating system memory references must be checked at run time the location and size of the memory section of a process may change during execution requires hardware assistance frequently © 2000 Franz Kurfess relocation and limit register Memory Management 32 Sharing code processes executing the same program should share its code data data structures used by several programs examples for sharing code libraries common programs (editors, mail, etc.) producer-consumer scenarios with shared memory © 2000 Franz Kurfess Memory Management 33 Shared Libraries prewritten code for commonly used functions is stored in libraries statically linked libraries library code is linked at link time into an executable program results in large executables with no sharing dynamically linked libraries if libraries are linked at run time they can be shared between processes © 2000 Franz Kurfess Memory Management 34 Logical Organization abstract view of memory programs are usually composed of separate modules, procedures, objects, etc. separate management of these components allows various optimizations development, testing, compilation allocation sharing protection it also is more complicated references © 2000 Franz Kurfess across modules must be resolved at runtime Memory Management 35 Physical Organization view of memory as physical device dictated by the structure of hardware size of the physical address space available memory size memory width arrangement of memory modules interleaved memory, banks, etc. usually handled by the MMU © 2000 Franz Kurfess Memory Management 36 Address Spaces address binding logical address space physical address space © 2000 Franz Kurfess Memory Management 37 Logical to Physical Address Program logical address Process Control Block physical address Process Main Memory CPU MMU Data User Stack Shared Address Space © 2000 Franz Kurfess Memory Management 38 Logical vs. Physical Address relocation register CPU logical address + physical address MAR Memory logical address is generated by the CPU physical address is loaded into the memory address register (MAR) usually part of the MMU © 2000 Franz Kurfess Memory Management 39 Memory Allocation assign sections of memory to processes section size: partitioning contiguous one section per process non-contiguous each process has several sections © 2000 Franz Kurfess Memory Management 40 Partitioning fixed/dynamic paging/segmentation virtual memory © 2000 Franz Kurfess Memory Management 41 Fixed Partitioning memory is divided into a number of fixed partitions sizes of partitions may be different chosen by the OS, developer, system administrator maintain a queue for each partition internal fragmentation space in a partition not used by a process is lost number of partitions (specified at system generation) limits number of active processes Small jobs do not use partition space efficiently used by older IBM OS/360 (MFT) © 2000 Franz Kurfess Memory Management 42 Fixed Partitions - Multiple Queues 75K Main Memory 100K Processes 200K 50K OS © 2000 Franz Kurfess Memory Management 43 Fixed Partitions - Single Queue 75K Processes Main Memory 100K 200K 50K OS © 2000 Franz Kurfess Memory Management 44 Variable Partitioning each process is assigned a partition number, size, and location of the partition can vary overcomes some problems of fixed partitioning but still inefficient use of memory higher overhead © 2000 Franz Kurfess Memory Management 45 Swapping processes are temporarily taken out of main memory to make more space available swap space secondary storage space provides a special area for these processes swap time very high compared with in-memory context switch example: 1 MByte process image, 10 MByte/sec transfer rate = 100 ms swap time head seek time, latency not considered © 2000 Franz Kurfess Memory Management 46 Dynamic Storage Allocation problem: find a suitable free section of memory to accommodate a process analogy: packing boxes of different sizes ~ free memory sections items to be packed ~ processes © 2000 Franz Kurfess Memory Management 47 Storage Allocation Strategies first-fit: allocate the first hole that is big enough best-fit: allocate the smallest hole that is big enough worst-fit: allocate the largest hole © 2000 Franz Kurfess Memory Management 48 First-Fit low overhead no searching required generates © 2000 Franz Kurfess reasonably large holes on average Memory Management 49 Best-Fit slower must than first-fit search the entire list tends to fill up memory with tiny useless holes can be made faster by sorting the hole list by size © 2000 Franz Kurfess Memory Management 50 Worst-Fit worst-fit leaves larger holes than best-fit © 2000 Franz Kurfess Memory Management 51 Observations overhead to keep track of small holes may be substantially larger than the hole itself in simulations first-fit and best-fit give better results, with first-fit being faster separate lists for processes and holes to speed up these algorithms © 2000 Franz Kurfess Memory Management 52 Keeping Track of Memory Usage bit maps linked lists © 2000 Franz Kurfess Memory Management 53 Bit Maps memory is divided into allocation units each allocation unit is represented by a bit bit map shows which parts of the memory are in use or free © 2000 Franz Kurfess Memory Management 54 Bit Map Memory 0 1 1 1 0 1 0 0 ... Bit Map ... © 2000 Franz Kurfess Memory Management 55 Bit Map Properties the smaller the allocation unit the bigger the bit map once the allocation unit is fixed, the size of the bit map does not change for a fixed (physical) memory size searching a bit map for a block of a certain size is a slow operation requires © 2000 Franz Kurfess counting the number of successive ones or zeros Memory Management 56 Linked Lists memory is represented by a linked list of allocated and free segments the list is sorted by address facilitates updating when a process terminates, its space can be combined with that of its neighbors © 2000 Franz Kurfess Memory Management 57 Contiguous Allocation each process occupies a single memory section requires adjustment of addresses for relocation may lead to inefficient memory utilization processes must fit into free memory sections relatively large “holes” may be left © 2000 Franz Kurfess Memory Management 58 Contiguous Allocation contiguous allocation the whole process image is allocated in one piece Process Control Information Program Entry Point Program Execution Main Memory Process Control Block Program Data Access Data Top of Stack User Stack Shared Address Space © 2000 Franz Kurfess Memory Management 59 Non-Contiguous Allocation a process occupies several disjoint memory sections addresses need to be adjusted for relocation and displacement relative distances between different sections of one process better memory utilization small free sections can be utilized by parts of processes “holes” still exist, but are smaller higher overhead requires usually a table to keep track of the parts of a process in the form of paging, segmentation © 2000 Franz Kurfess Memory Management 60 Non-Contiguous Allocation parts of the process image are allocated to different sections of main memory may break relative addresses Main Memory Data Process Control Information Program Entry Point Program Execution Program Data Access Process Control Block Top of Stack User Stack © 2000 Franz Kurfess Memory Management 61 Paging a frequently used case of non-contiguous allocation the process image is divided into pieces of equal size (pages) physical memory is divided into pieces of the same size (page frames) any page can be allocated to any page frame memory allocation becomes very simple additional overhead to keep track of which page is in which page frame kept in a page table © 2000 Franz Kurfess Memory Management 62 Paging Diagram Main Memory Process Process Control Block Program Data User Stack Page Table 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 34 58 122 68 99 38 55 43 131 102 171 76 123 144 93 Shared Address Space © 2000 Franz Kurfess Memory Management 63 Page Size small page size less internal fragmentation large page table large page size less overhead, both in page table size page transfer time. © 2000 Franz Kurfess Memory Management 64 Page Table Implementation set of dedicated registers memory associative registers © 2000 Franz Kurfess Memory Management 65 Dedicated Registers reasonable only for small page tables example: 16 bit logical address space page size = 8K page table size = 8 © 2000 Franz Kurfess Memory Management 66 Page Table in Memory use a page table base register (PTBR) to point to the page table of the current process two memory accesses are needed for every data access speed could be intolerable © 2000 Franz Kurfess Memory Management 67 Address Translation logical address CPU page # Main Memory physical address offset frame # offset 34 58 122 68 99 38 55 43 131 102 171 76 123 144 93 © 2000 Franz Kurfess Page Table Memory Management 68 Address Translation the page table contains an entry for every page of the process each a process has its own page table logical address is divided into page the number and offset physical address is calculated by looking up the frame in which the requested page resides adding the offset to the starting address of that frame the page table itself is in main memory as a consequence an extra memory access is required for every regular memory access this doubles the overall time for memory accesses © 2000 Franz Kurfess Memory Management 69 Address Translation page = logical-address / page-size offset = logical-address mod page-size page-frame = page-table[page] physical address = (page-frame * page-size) + offset © 2000 Franz Kurfess Memory Management 70 Fragmentation in Paging no external fragmentation every internal page frame can be used fragmentation the last page in the logical space of every process may not be completely used (on average: half a page per process) © 2000 Franz Kurfess Memory Management 71 Associative Registers associative registers or translation look-aside buffers (TLBs) special-purpose hardware to improve access times for paging acts as cache for page table entries only few page table entries are kept in the associative registers hit ratio is the percentage of times that a page number is found in the associative registers simultaneous (“associative”) access to all stored values © 2000 Franz Kurfess Memory Management 72 Main Memory TLB Schema logical address page # CPU offset physical address page # frame # TLB hit frame # offset TLB © 2000 Franz Kurfess 34 58 122 68 99 38 55 43 131 102 171 76 123 144 93 TLB miss Page Table Memory Management 73 Effective Access Time the average access time for main memory depends on how often the requested page number is found in the TLB this is known as the hit ratio the effective access time (EAT) is calculated by weighing the case when the page is found in the TLB vs. not found according to the probability given by the hit ratio effective access time = hit ratio * entry found + (1-hit ratio) * entry not found © 2000 Franz Kurfess Memory Management 74 Example EAT basic assumptions memory access time: 60 ns; TLB access time: 6 ns EAT no paging: 60 ns EAT page table only: 60 ns + 60 ns = 120 ns EAT TLB/page table hit hit ratio 90% EAT = 0.9 * (6 + 60) + 0.1 * (6 + 60 + 60) = 59.4 + 12.6 = 72 20% performance loss with respect to “no paging” ratio 99% EAT = 0.99 * (6 + 60) + 0.01 * (6 + 60 + 60) = 65.34 + 1.26 = 66.60 11% performance loss with respect to “no paging” © 2000 Franz Kurfess Memory Management 75 Protection protection bits are associated with each page a page can have any combination of: read, write, or execute permissions © 2000 Franz Kurfess Memory Management 76 Very Large Page Tables page tables can be huge: 32-bit virtual address space (maximum size of processes) 4K page size page table size = 232 / 212 = 220 entries over 1 million entries! © 2000 Franz Kurfess Memory Management 77 Multilevel Paging instead of using huge page tables, the page table itself can be paged it is split up into several smaller level 2 page tables these tables are accessed via a level 1 page table the page number is divided into two parts level 1 page number page offset for level 2 pages modern computer architectures/OSs support multilevel paging Windows NT, OS/2: 32-bit virtual address, two-level paging, 4K page size Unix: hardware dependent (three or four levels) © 2000 Franz Kurfess Memory Management 78 Multilevel Paging page # p1 p2 Main Memory logical address offset CPU physical address frame # offset p2 Level 1 Page Table © 2000 Franz Kurfess Level 2 Page Tables Memory Management 79 Inverted Page Tables one page table in memory for all processes size of the table is determined by physical memory each process maintains an external page table on secondary storage inverted page table maps page frames to the virtual pages of various processes advantage avoids keeping huge page tables in main memory disadvantage cannot use page number as index into the page table must search for process id in the table © 2000 Franz Kurfess Memory Management 80 Inverted Page Table Main Memory logical address pid page # offset CPU physical address frame # offset pid page # frame Hash Table Page Table © 2000 Franz Kurfess Memory Management 81 Shared Pages pages holding the code section of commonly used programs can be shared code must be re-entrant data sections must be different each user’s page table maps the pages into the same physical frames page boundaries do not necessarily coincide with the structure of the program © 2000 Franz Kurfess Memory Management 82 Shared Pages Example editor process code 7 6 5 4 data page tables © 2000 Franz Kurfess data - P2 5 2 3 4 5 2 3 0 5 2 3 7 P0 P1 P2 editor data - P0 3 editor 2 editor 1 0 data - P1 Memory Management 83 Segmentation logical address space is divided into segments according to the internal structure of the process program: procedures, functions data: records, arrays management each is more complicated segment has to be dynamically allocated sharing of segments is easier boundaries external © 2000 Franz Kurfess are reflected fragmentation Memory Management 84 Segmentation Diagram Process Process Control Block Program Program Data User Stack Main Memory Segment Table 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2344 2559 2872 6539 6539 8958 0257 3366 2291 1692 2144 7008 6123 1044 9309 Program Shared Address Space © 2000 Franz Kurfess Memory Management 85 Combined Paging/Segmentation paging characteristics transparent to the programmer eliminates external fragmentation manipulating fixed size blocks implies development of sophisticated memory management algorithms segmentation characteristics visible to programmer ability to handle dynamic data structures modularity support for protection and sharing © 2000 Franz Kurfess Memory Management 86 Segmentation with Paging paging is used to manage the segments combines advantages of both approaches © 2000 Franz Kurfess Memory Management 87 Important Concepts and Terms address binding best fit allocation bit map contiguous allocation dynamic linking/loading dynamic relocation effective access time external fragmentation first fit allocation fragmentation hardware internal fragmentation inverted page table library linker © 2000 Franz Kurfess loader logical address memory protection MMU multilevel paging non-contiguous allocation page page frame page table physical address relocation run-time dynamic linking segmentation static relocation worst fit allocation Memory Management 88 Summary Memory Management allocation of processes in main memory efficient utilization of memory various allocation strategies paging and segmentation © 2000 Franz Kurfess Memory Management 89
