How does ARM architecture
differ from x86?
By Faheem Syed
Overview
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What is ARM?
ARM architecture
What is x86?
x86 architecture
ARM architecture vs x86 architecture
References
What is ARM?
• In the 1980s Acorn Computers developed ARM a new family of instruction set
architectures for CPUs based on a reduced instruction set computing (RISC)
architecture.
• The acronym ARM originally stood for “Acorn RISC Machine” but was later
changed to “Advanced RISC Machines” after the launch of Advanced RISC
Machines Ltd in partnership by Acorn Computers, Apple, and VLSI technology in
November 1990.
• The name of the company was changed to ARM Holdings in 1998 after the
company went public, but is often called ARM for short just as the processors.
What is ARM? (Continued)
• ARM Holdings does not actually manufacture any of the ARM-based products.
• They license the ARM chip design, instruction set and architectures to third parties
such as Apple, Samsung, Qualcomm and Nvidia who manufacture their products to
implement the ARM architecture.
ARM Partnerships
ARM architecture
• The ARM is a 32-bit architecture based on reduced instruction set computing
(RISC) architecture with 37 registers, all of which are 32-bits long.
• The 37 registers are arranged into several banks, with the current processor mode
governing the accessible bank.
• ARM registers:
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30 general purpose registers
5 dedicated saved program status registers
1 dedicated current program status register
1 dedicated program counter
The ARM register set
User
r0
r1
r2
r3
r4
r5
r6
r7
r8
r9
r10
r11
r12
r13 (sp)
r14 (lr)
r15 (pc)
FIQ
User
mode
r0-r7,
r15,
and
cpsr
r8
r9
r10
r11
IRQ
User
mode
r0-r12,
r15,
and
cpsr
SVC
Undef
User
mode
r0-r12,
r15,
and
cpsr
User
mode
r0-r12,
r15,
and
cpsr
Abort
User
mode
r0-r12,
r15,
and
cpsr
Thumb state
Low registers
Thumb state
High registers
r12
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
spsr
spsr
spsr
spsr
spsr
cpsr
Note: System mode uses the User mode register set
ARM architecture (Continued)
• In the ARM architecture:
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Byte = 8 bits
Halfword = 16 bits (two bytes)
Word = 32 bits (four bytes)
Doubleword = 64 bits (eight bytes)
• The two main instruction sets in ARM are:
• 32-bit ARM instruction set
• Thumb instruction set – a mix of 16 and 32 bits
• Some cores have additional sets such as VFP, NEON, and Jazelle instruction set
ARM Processor Modes
• The ARM has seven operating modes
• Each mode has a different subset of registers and access to its own stack space
Mode
Description
User
Unprivileged mode under which most Applications/OS tasks run
System
Privileged mode that uses the same registers as User mode
Undef
Privileged mode that handles undefined instructions
Abort
Privileged mode that handles memory access violations
IRQ
Privileged mode that is entered when a low priority (normal) interrupt is raised
FIQ
Privileged mode that is entered when a high priority (fast) interrupt is raised
Supervisor (SVC)
Privileged mode entered on reset and when a Supervisor call instruction (SVC) is
executed
Devices that use
ARM processors
What is x86?
• The x86 architecture is a family of backward compatible instruction set
based on Intel's 8086 CPU.
• The 8086 processor was released in 1978 as a 16-bit extension to Intel’s 8-bit
based 8088 CPU.
• The term “x86” was coined after several successors to the 8086 ended in
“86”, such as the 80186, 80286, and 80386 processors.
What is x86? (Continued)
• After the introduction of Intel’s 80386 processor the term “x86” in the
modern era implies a 32-bit instruction set.
• The success of IBM personal computers (PC) paved the way for x86
dominance in the microprocessor market after the release of Intel’s 8088.
• Although Intel did produce the first x86 based processor in the 8086 chip,
the x86 architecture has been used in processors besides Intel by AMD,
Cyrix, and VIA.
x86 architecture
• The x86 is a 16-bit, 32-bit is based primarily on Complex instruction set computing
(CISC) design, with extreme emphasis on backwards compatibility.
• 16-bit = 4 registers
• AX, BX, CX, DX
• 32-bit = 8 registers
• EAX, EBX, ECX, EDX, ESI, EDI are the General-purpose registers
• ESP is the stack pointer
• EBP is the base pointer
• The x86-64 is a 64-bit version of the x86 instruction set that has 16 registers.
x86 Register Set
x86 architecture (Continued)
• In the x86 architecture:
• Byte = 8 bits
• Word = 16 bits (two bytes)
• Doubleword = 32 bits (four bytes)
• Quadword = 64 bits (eight bytes)
• Tword = 80 bits (ten bytes)
• Double Quadword = 128 bits (16 bytes)
• x86 has hardware support for stack, floating point and Single instruction, multiple
data (SIMD) instructions.
x86 Processor Modes
Mode
Description
Real Mode (16-bit)
Unlimited direct software access to all memory, peripheral hardware and no
memory protection or multitasking at the hardware level. All x86 CPUs start in
real mode when reset.
Protected mode (16-bit and 32-bit)
Allows system software to use features such as virtual memory, paging and
safe multi-tasking designed to increase an operating system’s control over
application software.
Long mode (64-bit)
Allows a 64-bit operating system to access 64-bit instructions and registers. 64bit programs are run in a sub-mode known as 64-bit mode, while 32-bit and
16-bit programs are executed in a sub mode called compatibility mode.
Virtual 8086 mode (16-bit
Allows a processor running a protected mode operating system to execute real
mode applications that are incompatible with protected mode
System Management Mode (16-bit)
Suspends all normal executions, including the operating system, and special
separate software is executed with high privileges.
Devices that use
x86 processors
ARM vs x86
• ARM processors require significantly fewer transistors than typical PC processors
because of the fact that it has a RISC-based design.
• Fewer transistors minimizes power use, heat and production cost. All qualities that are
preferred for battery-powered devices such as laptops, tablets, and smartphones.
• On the other hand x86 processors usually consumes a lot of energy but the are also a
lot faster.
• This makes x86 based processors ideal for desktops, gaming and super computer that
require speed more than energy efficiency.
How they differ
• The main difference between ARM and x86 architecture is that ARM is RISC based
while x86 is CISC based.
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CISC design is to execute multiple complex (larger) instructions.
While the RISC design is perfect for small, simple instructions.
The ARM has a lot more registers than x86.
The ARM has a thumb mode to increase code density so programs fit in less memory.
All these features help ARM save power almost everywhere it can.
ARM vs x86
ARM
X86
(8086)
Introduced in 1985
(ARM1)
Introduced in 1978
(80386)
32-bit words
16-bit words
37 registers (additional registers have similar names for
other modes)
8 registers, most with special purpose (i.e. have fixed
usage in certain operations)
Fixed length instructions
(4 bytes)
Variable-length instructions
(1 – 6 bytes)
Load-store architecture register-to-register operations
Extended accumulator architecture, register-to-memory
and memory-to-register operations
ARM vs x86 (Continued)
ARM
x86
RISC – reduced instruction set computer => streamlined CISC – complex instruction, set computer =>
for ease of hardware implementation
complicated operations (some of this is due to legacy. i.e.,
need for compatibility with previous 8080 and 8085
microprocessors)
Bi-endian
Little endian
Floating point uses a separate set of 32 registers
Floating point uses a separate stack
Requires aligned operands
Unaligned operand access in hardware
Energy Efficiency vs Performance
• In the chart from the previous slide we can see the difference between performance
and power consumption.
• The EnergyCore ECX-1000 which features four 32-bit ARMv7 Cortex-A9 CPU cores
operating at 1.1 GHz consumes only 5.26 W on average.
• While the Intel Xeon E3-1240 features 4 x86-64 bit CPU cores running at 3.3 GHz
and consuming a whopping 102 W on average.
• Each core consumes the equivalent of about 19 ARM cores while running at a
frequency three times higher.
References
• http://www.seas.upenn.edu/~cdmurphy/cit593/fall2012/pdf/lecture20-x86.pdf
• http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0211h/I23986.ht
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http://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/
http://en.wikipedia.org/wiki/ARM_architecture#History
http://en.wikipedia.org/wiki/ARM_Holdings
http://cs.lmu.edu/~ray/notes/x86overview/
References (Continued)
• https://msdn.microsoft.com/enus/library/windows/hardware/ff561502(v=vs.85).aspx
• https://msdn.microsoft.com/enus/library/windows/hardware/ff561504(v=vs.85).aspx
• http://en.wikipedia.org/wiki/X86
• http://en.wikibooks.org/wiki/X86_Assembly/X86_Architecture
• http://www.techopedia.com/definition/5334/x86-architecture