III
Prof. Muhammad Saeed
Assembly Language Instructions
1/27/2015
Computer Architecture & Assembly Language
2
Language Instructions
† MOV
MOV
MOV
MOV
MOV
MOV
reg, reg
mem, reg
reg, mem
mem, imm
reg, imm
† MOVZX
MOVZX reg32, reg/mem8
MOVZX reg32,
reg/mem16
MOVZX reg16, reg/mem8
† MOVSX
MOVSX reg32, reg/mem8
MOVSX reg32, reg/mem16
MOVSX reg16, reg/mem8
1/27/2015
Computer Architecture & Assembly Language
3
Language Instructions
† XCHG
XCHG reg, reg
XCHG reg, mem
XCHG mem, reg
† INC, DEC
INC reg/mem
DEC reg/mem
The Overflow, Sign, Zero, Auxiliary Carry, and Parity
flags are changed according to the value of the
destination operand.
† ADD, SUB
ADD dest, source The Carry, Zero, Sign, Overflow, Auxiliary Carry, and
SUB dest, source Parity flags are changed according to the value that is
placed in the destination operand.
† NEG
NEG reg
NEG mem
1/27/2015
The Carry, Zero, Sign, Overflow, Auxiliary Carry, and
Parity flags are changed according to the value that is
placed in the destination operand.
Computer Architecture & Assembly Language
4
Language Instructions
† PUSH
PUSH reg/mem16
PUSH reg/mem32
PUSH imm32
The PUSH instruction first decrements ESP
and then copies a source operand into the
stack. A 16-bit operand causes ESP to be
decremented by 2. A 32-bit operand causes
ESP to be decremented by 4.
† POP
POP reg/mem16
POP reg/mem32
The POP instruction first copies the contents
of the stack element pointed to by ESP into a
16- or 32-bit destination operand and then
increments ESP. If the operand is 16 bits,
ESP is incremented by 2; if the operand is 32
bits, ESP is incremented by 4
Language Instructions
† PUSHFD and POPFD
The PUSHFD instruction pushes the 32-bit EFLAGS register on the
stack, and POPFD pops the stack into EFLAGS.
† PUSHAD and POPAD
The PUSHAD instruction pushes all of the 32-bit general-purpose
registers on the stack in the given order: EAX, ECX, EDX, EBX, ESP,
EBP, ESI, and EDI. The POPAD instruction pops the same registers off
the stack in reverse order.
† PUSHA and POPA
PUSHA instruction, pushes the 16-bit general-purpose registers (AX,
CX, DX, BX, SP, BP, SI, DI) on the stack in the order listed. The POPA
instruction pops the same registers in reverse
Language Instructions
† LOOP
The LOOP instruction assumes that the ECX (or CX) register contains
the loop count. When the loop instruction is executed, the CX register
is decremented and the control jumps to the target label, until the CX
register value reaches zero.
† Unconditional Jump
Jmp label1
Language Instructions
† Conditional Jumps
Following are the conditional jump instructions used on signed data
Instruction
Description
Flags tested
JE/JZ
Jump Equal or Jump Zero
ZF
JNE/JNZ
Jump not Equal or Jump Not Zero ZF
JG/JNLE
Jump Greater or Jump Not
Less/Equal
OF, SF, ZF
JGE/JNL
Jump Greater or Jump Not Less
OF, SF
JL/JNGE
Jump Less or Jump Not
Greater/Equal
OF, SF
JLE/JNG
Jump Less/Equal or Jump Not
Greater
OF, SF, ZF
Language Instructions
† Conditional Jumps
Following are the conditional jump instructions used on unsigned data
Instruction
Description
Flags tested
JE/JZ
Jump Equal or Jump Zero
ZF
JNE/JNZ
Jump not Equal or Jump Not Zero
ZF
JA/JNBE
Jump Above or Jump Not Below/Equal
CF, ZF
JAE/JNB
Jump Above/Equal or Jump Not Below
CF
JB/JNAE
Jump Below or Jump Not Above/Equal
CF
JBE/JNA
Jump Below/Equal or Jump Not Above
AF, CF
Language Instructions
† Conditional Jumps
The following conditional jump instructions have special uses and check the
value of flags
Instruction
Description
Flags tested
JXCZ
Jump if CX is Zero
none
JC
Jump If Carry
CF
JNC
Jump If No Carry
CF
JO
Jump If Overflow
OF
JNO
Jump If No Overflow
OF
JP/JPE
Jump Parity or Jump Parity Even
PF
JNP/JPO
Jump No Parity or Jump Parity Odd
PF
JS
Jump Sign (negative value)
SF
JNS
Jump No Sign (positive value)
SF
Language Instructions
† AND
AND
AND
AND
AND
AND
reg,reg
reg,mem
reg,imm
mem,reg
mem,imm
The AND instruction performs a boolean
(bitwise) AND operation between each pair of
matching
bits in two operands and places the result in the
destination operand
† OR
OR
OR
OR
OR
OR
reg,reg
reg,mem
reg,imm
mem,reg
mem,imm
The OR instruction performs a boolean OR
operation between each pair of matching bits in
two operands and places the result in the
destination operand
Language Instructions
† XOR
OR
OR
OR
OR
OR
reg,reg
reg,mem
reg,imm
mem,reg
mem,imm
The XOR instruction performs a boolean
exclusive-OR operation between each pair of
matching bits in two operands and stores the
result in the destination operand
† NOT
NOT reg
NOT mem
The NOT instruction toggles (inverts) all bits in an
operand
Language Instructions
† TEST
The TEST instruction performs an implied AND
operation between each pair of matching bits in two
operands and sets the Sign, Zero, and Parity flags
based on the value assigned to the destination
operand. The only difference between TEST and
AND is that TEST does not modify the destination
operand.
The TEST instruction always clears the Overflow
and Carry flags. It modifies the Sign, Zero, and
Parity flags in the same way as the AND instruction.
Language Instructions
† CMP
In x86 assembly language we use the CMP instruction
to compare integers. Character codes are also
integers, so they work with CMP as well. The CMP
(compare) instruction performs an implied subtraction
of a source operand from a destination operand.
Neither operand is modified.
CMP uses the same operand combinations as the
AND instruction.
Language Instructions
† Directive
† Instruction
† Procedure
 myproc PROC
……
ret
myproc endp
† Macro
 myMacro MACRO
……..
endm
(call myproc)
(myMacro)
Language Instructions
† PTR Operator
MOV eax, WORD PTR [var]
† LENGTHOF Operator
PTR operator overrides the declared
size of an operand to access the
operand using a size attribute that is
different from the one assumed by
the assembler.
Var1
WORD 20 DUP(0)
Var2
DWORD 20 DUP(0)The LENGTHOF operator counts
LENGTHOF var1
the number of elements in an array
† SIZEOF Operator
Var1
Var2
SIZEOF
WORD
20 DUP(0)
The SIZEOF operator counts the
DWORD 20 DUP(0) number of bytes in an array
var1
† ($ - array)
Array
Size
BYTE
WORD
“WELCOME”, 0dh, 0ah
( $-Array )
Language Instructions
† LABEL Directive
.DATA
val16
The LABEL directive gives a size
attribute without allocating any
storage
LABEL
WORD
DWORD 12345678h
val32
.CODE
mov
ax,
mov
dx,
.DATA
LongValue
DWORD
val1
WORD
5678h
val2
WORD
1234h
.CODE
mov
eax,
val16
[val16+2]
LABEL
LongValue
Language Instructions
† Indexed Operand
.DATA
array
30h
.CODE
mov
mov
An indexed operand adds a constant
to a register to generate an effective
address
BYTE
10h, 20h,
esi,
al,
0
array[esi]
† Scale Factors in Indexed Operand
.DATA
Array
DWORD
.CODE
mov
mov
esi, 3 * TYPE
Aarray
eax,
array[esi]
100h, 200h, 300h, 400h
Language Instructions
Conditional Loop Instructions
† LOOPZ
† LOOPE
† LOOPNZ
† LOOPNE
Bits Shift
†
†
†
†
SHL, SHR, SHLD, SHRD
ROL, ROR
RCL, RCR
SAL, SAR
Language Instructions
Multiplication & Division
†
†
†
†
MUL
IMUL
DIV
IDIV
MUL reg/mem8
MUL reg/mem16
MUL reg/mem32
IMUL reg/mem8
IMUL
reg/mem16
IMUL
DIV reg/mem8
reg/mem32
DIV reg/mem16
DIV reg/mem32
IDIV reg/mem8
IDIV reg/mem16
IDIV reg/mem32
Language Instructions
Flags Instructions
7
6
5
4
3
2
1
† LAHF
SF
ZF
---AC
---PF
---† SAHF
† CLC, STC, CMC
† CLD, STD
† CLI
† STI
BIT Test Instructions
BT copies the addressed bit into the carry flag, BT ax, 6
† BT
BT r/m16, r16
† BTR
BT r/m32, r32
† BTS
BT r/m16, imm8
BT r/m32, imm8
† BTC
0
CF
Language Instructions
Sign Extension Instructions
† CBW
† CWD
† CWQ
Language Instructions
String Instructions
MOVSB, MOVSW, and MOVSD instructions copy
† MOVSB The
data from the memory location pointed to by ESI to the
† MOVSW memory location pointed to by EDI. The two registers are
either incremented or decremented automatically (based
† MOVSD on the value of the Direction flag):
† MOVSQ
.DATA
source DWORD
20
DUP(0AAAAAAAAh)
target DWORD
20
DUP(?)
.CODE
CLD
; direction = forward
MOV ecx,
LENGTHOF source ; set REP counter
MOV esi,
OFFSET
source ; ESI points to source
MOV edi,
OFFSET
target ; EDI points to target
rep MOVSD
; copy doublewords
Language Instructions
String Instructions
†
†
†
†
CMPSB
CMPSW
CMPSD
CMPSQ
.DATA
source
DWORD 1234h
target
DWORD 5678h
.CODE
mov esi, OFFSET source
mov edi, OFFSET target
cmpsd
doublewords
ja L1
source > target
mov esi,
OFFSET
source
mov edi,
OFFSET
target
cld
direction = forward
mov ecx,
LENGTHOF source
counter
repe cmpsd
repeat while equal
; compare
; jump if
;
; repetition
;
Language Instructions
String Instructions
† SCASB
† SCASW
† SCASD
.DATA
alpha
† SCASQ
.CODE
BYTE
"ABCDEFGH",0
mov edi, OFFSET
alpha
mov al,
'F'
letter F
mov ecx, LENGTHOF alpha
cld
forward
repne scasb
not equal
jnz
quit
dec edi
………..
Quit:
……
; EDI points to the string
; search for the
; set the search count
; direction =
; repeat while
; quit if letter not found
; found: back up EDI
Language Instructions
String Instructions
†
†
†
†
STOSB
STOSW
STOSD
STOSQ
.DATA
Count = 100
string1
BYTE Count DUP(?)
.CODE
Mov
al, 0FFh
; value to be stored
Mov edi, OFFSET string1
; EDI points to target
Mov ecx, Count
; character count
CLD
; direction =
forward
Rep stosb
; fill with
contents of AL
Language Instructions
String Instructions
† LODSB
.DATA
array
DWORD 1,2,3,4,5,6,7,8,9,10 ; test data
† LODSW
multiplier DWORD 10
; test data
† LODSD
.CODE
main PROC
† LODSQ
cld
; direction = forward
mov
mov
mov
L1:
mul
stosd
Loop
exit
main
END
esi, OFFSET array ; source index
edi, esi
; destination index
ecx, LENGTHOF array ; loop counter
lodsd
; load [ESI] into EAX
multiplier
; multiply by a value
; store EAX into [EDI]
L1
ENDP
main
Language Instructions
Data Directives
† =
† EQU
† TEXTEQU
rowSize = 5
matrix1 EQU 10 * 10
matrix2 EQU <10 * 10>
count TEXTEQU %(rowSize * 2)
move TEXTEQU <mov>
setupAL TEXTEQU <move al,count>
Program
1st Program
.586
.MODEL flat, stdcall
option casemap :none
Include D:\msaeed\academic\assemblylanguage\masm32\include\windows.inc
Include D:\msaeed\academic\assemblylanguage\masm32\include\kernel32.inc
Include D:\msaeed\academic\assemblylanguage\masm32\include\user32.inc
Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\kernel32.lib
Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\user32.lib
.DATA
WindowTitle BYTE
Message
“Greetings",0
BYTE
“Hello, World",0
.CODE
main:
invoke MessageBox, NULL, ADDR Message, ADDR WindowTitle, MB_OK
invoke ExitProcess, eax
end main
1/27/2015
Computer Architecture & Assembly Language
29
END