MIPS Architecture • Topics – What resources MIPS assembly manipulates – CPU (Central Processing Unit) – ALU (Arithmetic & Logical Unit), Registers – Memory – I/O – How are resources being manipulated • Data transfer • Arithmetic Operations • I/O MIPS Architecture CPU Data Transfer • X = A[1] (load word) • Compute (address of A + index offset in bytes) • Transfer the effective address to Memory Address Register (MAR) • Read memory into Memory Data Register (MDR) • Transfer to CPU register • A[1] = X (store word) • Transfer register to MDR • Computer effective address to MAR • Write Arithmetic Operation • X =X+Y • Transfer X, Y (in registers) to ALU (Arithmetic & Logic Unit) • Add • Transfer the sum to a register Assembly Programmer’s View CPU Memory Addresses Object Code Program Data OS Data Registers Data PC Instructions Stack Condition Codes •Programmer-Visible State – Program Counter (PC) • Address of next instruction – Memory • Byte addressable array (organized in words) • Code, user data, (some) OS data • Includes stack – Location Counter (LOC) – Register File • Heavily used program data – Condition Codes • Store status information about most recent arithmetic operation • Used for conditional branching Assembly Instruction • label: instruction operand {,operand} #comments • label – a place holder: address • Instruction – operation to perform • Operand – data or target of the operation • Register • Literal constant • Memory address Registers • 32 32-bit Registers – Zero: always 0, and cannot be modified – $t0 -- $t9: General purpose – $a0 -- $a3: General purpose (arguments) – $s0 -- $s7: General purpose – $v0, $v1: General purpose – $sp: stack pointer – $ra: return address Data Transfer • From the viewpoint of registers • Moving Data lw Dest, Source: – Move 4-byte (“long”) word – Constant or from memory address – To Dest register • Operand Types – Immediate: Constant integer data • 0xff for hex constant • Otherwise, decimal – Memory: 4 consecutive bytes of memory • Various “address modes” – Register: One of 32 integer registers Operand Addressing Source C Analog Destination $t1, 0x4 temp = 0x4; la $t1, A temp2 = &A; Mem sw $t1,A($t2) A[n] = temp; Reg lw $t1,A($t2) temp = A[n]; Imm Reg Addr Reg Reg Mem li – No instruction for reg-to-reg transfer – Cannot do memory-memory transfers with single instruction – sw instruction violates (dest, source) spec of operands I/O– Instructions http://courses.missouristate.edu/kenvollmar/mars/help/syscallhelp.h tml Service print integer Call Arguments (input) code ($v0) 1 $a0 = integer print string 4 $a0 = address of string Read integer (none) 5 Results signed decimal integer printed in console window string printed in console window $v0 holds integer that was entered Read string 8 $a0=address to store $a1= length limit characters are stored exit (none) Ends the program 10 Square an input Number printf(“Enter an integer to square: \n”); scanf(“%d”, x); printf(“%4d”, (x*x)); prompt: main: .data .asciiz “Enter an integer to square:\n“ # message area .text # printf(“Enter an integer to square: \n”); la $a0, prompt # get the address of the message to $a0 li $v0, 4 # read to display the message syscall # scanf(“%d”, x); li $v0, 5 syscall mul # read an integer into $v0 $a0, $v0, $v0 # squared input value, save in $a0 # printf(“%4d”, (x*x)); li $v0, 1 syscall # print the squared value Directives • Directives (Establish initial data structure) • • • • • • .ascii (store string in memory with no null-termination) .asciiz (store string in memory with null termination) .byte b1,..,bn .word w1,..,wn .word w:n (store w into n successive words) .space n • .data • .text data segment assembly instructions Resources • MIPS instructions • http://www.mrc.uidaho.edu/mrc/people/jff/digital/MIPSi r.html • www.cs.uml.edu/~kim/203/mips_instr.xls • MIPS Reading • www.cs.uml.edu/~kim/203/mips.doc • MARS MIPS simulator • http://courses.missouristate.edu/KenVollmar/MARS/ Operand Addressing Source C Analog Destination $t1, 0x4 temp = 0x4; la $t1, A temp2 = &A; Mem sw $t1,A($t2) A[n] = temp; Reg lw $t1,A($t2) temp = A[n]; Imm Reg Addr Reg Reg Mem li – No instruction for reg-to-reg transfer – Cannot do memory-memory transfers with single instruction – sw instruction violates (dest, source) spec of operands Addressing Modes • Addressing Modes • Indirect (R) Mem[Reg[R]] – Register R specifies memory address lw $t1, ($t2) • Indexed D(R) – Register R specifies start of memory block – Constant displacement D specifies offset lw $t1, 8($t2) Mem[Reg[R]+D] Example .data array: .word 0x37, 0x55, 0xF .text la $s0, array la $s1, array+4 la $s2, 8($s0) li $a0, 4 lw lw lw lb $t0, 0($s0) $t3, array($a0) $t1, 8($s0) $t2, ($s0)