Technion
Electrical Engineering Department
High Speed Digital System Lab
FPGA Setting Using FLASH Project
GUI User Guide
Students: Dor Obstbaum
Kami Elbaz
Advisor: Moshe Porian
Last update: November 2012
Table of content
1
Scope ................................................................................................................................. 4
2
Getting Started .................................................................................................................. 4
3
FLASH Basic operations ..................................................................................................... 5
4
Building a FLASH Data base (FLASH DB) ............................................................................ 6
5
Register directed transactions........................................................................................... 7
6
5.1
Write transaction....................................................................................................... 7
5.2
Read transaction........................................................................................................ 7
5.3
Limitations ................................................................................................................. 7
Debug operations .............................................................................................................. 9
6.1
Sending data from a text file ..................................................................................... 9
6.2
Saving rx and tx data to file ....................................................................................... 9
6.3
Changing or removing CRC, SOF, EOF........................................................................ 9
7
Hardware structure ......................................................................................................... 10
8
GUI software structure .................................................................................................... 11
8.1
Hierarchy ................................................................................................................. 11
8.2
Files description ....................................................................................................... 11
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FPGA setting using FLASH project
Table of Tables
Table 1 - System registers.......................................................................................................... 8
Tables of Figures
Figure 1 - GUI layout .................................................................................................................. 4
Figure 2 - FLASH basic operations ............................................................................................. 5
Figure3 - FLASH DB building ..................................................................................................... 6
Figure4 -Packet Creation .......................................................................................................... 7
Figure5 - Sending data from a texst file ................................................................................... 9
Figure6 - Saving rx and tx data to file....................................................................................... 9
Figure 8 - Hardware system..................................................................................................... 10
Figure7 - Changing or removing CRC, SOF, EOF ....................................................................... 9
Figure 9 - Software structure .................................................................................................. 11
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FPGA setting using FLASH project
1 Scope
This document is a quick user guide for the ‘FPGA setting using FLASH’ project GUI. It gives
an explanation of the GUI’s capabilities as well as guidance of how to use them. The last two
chapters are aimed for deeper understanding of the hardware and software systems.
2 Getting Started
The ‘FPGA setting using FLASH’ system GUI is the system’s software host, thus most of the
user operations are initiated from it. The GUI has supplies the most basic operations such as
reading, writing and erasing FLASH data. It also has some more advanced options and strong
debugging capabilities.
The GUI consists of the following regions:
Figure 1 - GUI layout
1- Register control panel – A region for building a packet aimed for a specific client.
Used both for debug and for building a data base to be stored on FLASH.
2- Packet Viewer – Packet built by the register control panel is viewed in this window.
3- FLASH control panel – A region for all FLASH operations: Read, Write, Erasure, Reset
and Storing a data base.
4- FLASH data – Data being read from FLASH is displayed here.
5- Debug options – Special features for testability such as accessing a specific client
and using text files for system transactions.
6- Message window – Displays messages for user.
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FPGA setting using FLASH project
7- RX & TX messages – Displays packets being sent to FPGA (RX), and packets sent
from FPGA to Host (TX).
3 FLASH Basic operations
The basic FLASH opertations are: Read, Write, Erase and Reset.
The operations are available on the FLASH control panel:
Figure 2 - FLASH basic operations
Read – user should supply an address in the format of 6 hexadecimal bits. The address range
is 0x000000 – ox3FFFFF. 256 bytes of data read from FLASH are displayed on the ‘FLASH
data’ window (see figure 1). The data read could also be saved to a text file.
Write - user should supply an address in the format of 6 hexadecimal bits. The address range
is 0x000000 – ox3FFFFF. Data is written from a chosen text file using the ‘Browse’ button.
The text file should contain 256 data bytes at most. The format should be hexadecimal.
Every byte should be separated by a white space. for example:
Erase – Only a full sector could be erased at a time. For sector erasure user should pick a
sector from the list and press the ‘Erase Sector’ button.
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FPGA setting using FLASH project
Reset – Sends a reset command to the FLASH device. No reset is needed prior to other
transactions. The reset option is mostly for debug purposes.
4 Building a FLASH Data base (FLASH DB)
The ‘FPGA setting using FLASH’ system reads a data base from FLASH on system initiation.
Such a data base could be built using the GUI. To build a FLASH DB follow the steps:
1. Build a packet using the register region.
Choose:
- Read/Write <= ‘Write’
- Client
<= selected client
- Registers <= selected register
- Value
<= one hexadecimal byte
And press ‘add to packet’.
Data would be visible on the packet window
2. When done building a packet
choose ‘Add packet’ in the
FLASH region. For packet
removal choose the packet
and hit ‘Remove Packet’.
Space left on DB is written
just below the DB window.
‘Clear DB list’ button would
clear the current DB being
built.
3. Before writing the DB to
FLASH check that address
0x000000 – 0x0000FF is
erased (all bytes should be
‘FF’) by reading data. If not
than sector should be
erased.
4. Write DB to FLASH using the
‘Write DB to FLASH’ button.
The DB could be saved to file
by marking the ‘save DB to file’ checkbox.
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FPGA setting using FLASH project
Figure 3 - FLASH DB building
5 Register directed transactions
The GUI has access to each register in the system. The GUI can make a write or read
transaction to a specific client at a time. Data Sent and data being read is available on the RX
and TX message windows.
5.1 Write transaction
Build a packet on the register region. Choose:
- Read/Write <= ‘Write’
- Client
<= selected client
- Registers <= selected register
- Value
<= one hexadecimal byte
And press ‘add to packet’.
Data would be visible on the packet window
Figure 4 -Packet Creation
When done building a packet hit
button.
5.2 Read transaction
Build a packet on the register region. Choose:
- Read/Write <= ‘Read’
- Client
<= selected client
- Registers <= first read address
- Value
<= read length
And press ‘add to packet’.
After packet is ready hit
button. If the reading request is too long a message
would be shown to user and packet won’t be sent.
5.3 Limitations
The GUI allows only specific values to specific registers. In case of a violation by the user, a
message would be shown on the message window.
The allowed values for each register are listed in the following table. For further data see the
‘FPGA setting using FLASH’ project document.
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FPGA setting using FLASH project
Table 1 - System registers
Client
Wait
Leds
Leds
Leds
Leds
Leds
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Display
Error Register
Error Register
Register #
0
0
1
2
3
4
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
0
1
Description Allowed Values
wait time
Enable reg
led 1 freq
led 2 freq
led 3 freq
led 4 freq
Enable reg
line ROI - x
line ROI - y
column ROI - x
column ROI - y
damka ROI - x
damka ROI - y
line width
column width
damka width
line - R diff
line - G diff
line - B diff
column - R diff
column - G diff
column - B diff
damka - R diff
damka - G diff
damka - B diff
G start color
B start color
R start color
reg valid
Error vector
code version
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xE0
0x00 - 0xA8
0x00 - 0xE0
0x00 - 0xA8
0x00 - 0xE0
0x00 - 0xA8
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
read only
read only
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FPGA setting using FLASH project
6 Debug operations
The GUI allows user to perform debug operations. By performing debug operations some of
the system’s hardware could be tested as well as the GUI itself.
6.1 Sending data from a text file
This option lets the user to send data from text files similar to text files
run on simulations. For a text file transaction:
1- Choose a text file and mark the *‘update from file’ checkbox.
2- Hit ‘Send to registers’ button.
*as long as the *‘update from file’ checkbox is marked data would
be sent from text file and not by the Registers build in tool.
Important note: Text file data is not being checked for it’s correctness
by the GUI.
Figure 5 - Sending data from a texst file
6.2 Saving rx and tx data to file
For saving rx and tx data to file the ‘save rx to file’ and/or ‘save tx to
file’ checkboxes should be marked prior to a transaction. Then, the
data showed on the RX and TX message windows (see figure 1)
would be saved to a text file chosen by the user.
Figure 6 - Saving rx and tx data to file
6.3 Changing or removing CRC, SOF, EOF
CRC, SOF, and EOF values may be changed or removed by marking
the checkboxes in the figure.
This option would affect only packets
Sent by the register tool and not packets sent from
Text file or FLASH tool.
Figure 7 - Changing or removing CRC, SOF, EOF
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FPGA setting using FLASH project
7 Hardware structure
The hardware system consists of two main parts:
1. ‘FPGA setting using FLASH’ system programmed on FPGA.
2. FLASH memory (Spansion S29AL032D)
Both parts are located on the DE2 development board.
The Matlab GUI interacts with the hardware via two UART channels:
1. GUI  FPGA data at broad rate of 115200 bits/sec
2. FPGA  GUI data at broad rate of 115200 bits/sec
The System’s internal communication uses Wishbone protocol. The FPGA-FLASH interface
uses CFI protocol.
Figure 8 - Hardware system
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FPGA setting using FLASH project
8 GUI software structure
8.1 Hierarchy
The GUI’s main file is ‘gui_1.m’ which creates the GUI’s figure, responds to user commands
and calls the other function for GUI operations. The file structure is the one in the figure
below. An arrow means that the function calls the function it points at.
Figure 9 - Software structure
8.2 Files description
Gui_1.m - creates the GUI’s figure, responds to user commands and calls the other function
for GUI operations
UART_comm.m – transaction is sent by uart driver to a uart line. An answer is received
through the other uart line.
packet_build.m - builds a binary data packet to be sent to FPGA via UART.
crc_calc8.m - calculates CRC value to given data
xor_crc.m - Performs XOR calculation. This is a function used for CRC calculation.
save_to_file.m - writes a data string to a file
message.m - Creates a message string to be printed to GUI's message window.
make_print_str.m - The functions makes a string ready to be printed to file or debug
window from a string that arrived from rx,tx or FLASH DB.
About.m - An informative window opened when user presses the 'About' button.
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FPGA setting using FLASH project