Chapter 12
Counter Circuits and VHDL State
Machines
1
Objectives
You should be able to:
Use timing diagrams for the analysis of sequential
logic circuits.
 Design any modulus ripple counter and frequency
divider using J-K flip-flops.
 Describe the difference between ripple counters and
synchronous counters.

2
Objectives
(Continued)
Solve various counter design applications using 4-bit
counter ICs and external gating.
 Connect seven-segment LEDs and BCD decoders
to form multidigit numeric displays.
 Cascade counter ICs to provide for higher counting
and frequency divisions.

3
Sequential Logic Circuits

Sequential logic circuits
A mix of combinational logic gates and flip-flops
 Used to count events and time the duration of
processes
 Sequential since they follow a predetermined
sequence and are triggered by a timing pulse or clock

4
Sequential Logic Circuits

Normally count in binary and can stop or recycle

The modulus (MOD) of a counter is defined by
the number of binary states

A 0 – 7 counter is a MOD-8 counter
Sequential Logic Circuits

Counter outputs are usually flip-flops as they can
hold a binary state.
A MOD-8 Counter Truth Table and Waveforms
Analysis of Sequential Circuits

Example 12-1: Input and output waveforms from this
edge-triggered D flip-flop based circuit.
5
Analysis of Sequential Circuits

Example 12-2: Input and output waveforms from this
edge-triggered D flip-flop based circuit.
5
Analysis of Sequential Circuits


Example 12-3: This circuit uses negative edge-triggered
JK flip-flops.
Note that the clock input from the second FF comes
from Q0.
5
Analysis of Sequential Circuits

Example 12-3: Input and output waveforms.
5
Analysis of Sequential Circuits

Example 12-4: Input and output waveforms.
5
Ripple Counters



Flip-flops can be used to form binary counters
Cascade - Q output of one to clock input of the next
Three flip-flops for a 3-bit counter




23 = 8 different combinations
Binary 000 through 111
Modulus is 8
MOD8 counter
11
Ripple Counters

Three J-K flip-flops used toggle mode to form a
MOD-8 (3-bit) ripple counter
12
Ripple Counters


Asynchronous due to propagation delay.
3-bit counter waveform
13
Ripple Counters

3-bit counter state diagram
13
Ripple Counters

Propagation delay skews the waveform
14
Ripple Counters

Maximum frequency is approximately
equal to the reciprocal of the combined
propagation delays
f max
1

N tp
N  number of flip - flops
t p  average propagatio n delay of each flip - flop (C p to Q )
15
Ripple Counters

16 bit counter and waveforms
16
Ripple Counters

17
Design of Divide-by-N Counters

Reduce the frequency of periodic waveforms
18
Design of Divide-by-N Counters

Divide-by-5 (MOD5) Counter
19
Design of Divide-by-N Counters

Divide-by-5 (MOD5) waveforms and state diagram
20
Design of Divide-by-N Counters

MOD-6 Up-Counter with a manual push button reset
21
Ripple Counter Integrated
Circuits

7493 4-bit binary ripple counter logic diagram and
pin configuration
22
Ripple Counter Integrated
Circuits

7493 connected as a MOD-16 ripple counter
23
Ripple Counter Integrated
Circuits


7493 can form any modulus counter less than or
equal to MOD-16
7490 4 bit ripple counter
Divide by 2 and divide by 5 sections
 Cascade together to form divide by 10 (decade or
BCD)
 Commonly used in decimal display applications

24
Ripple Counter Integrated
Circuits

7492 4 bit ripple counter
Divide by 2 and divide by 6 sections
 Cascade together to form divide by 12 (MOD-12)
 Commonly used in divide by 6 or divide by 12
applications such as digital clocks

25
Ripple Counter Integrated
Circuits

Logic diagram and pin configuration for the 7490
26
Ripple Counter Integrated
Circuits

Logic diagram and pin configuration for the 7492
26
System Design Applications

LED illuminate for 1 s once every 13 s


Turn on LED for 20 ms once every 100 ms


See Application 12-1
See Application 12-2
Three digit decimal counter 000 - 999

See Application 12-3
27
28
Figure 12-33b
29
30
31
System Design Applications

Digital clock capable of hours, min and sec


See Application 12-4
Egg timer circuit

See Application 12-5
32
33
Figure 12-36
34
35
Seven-Segment LED Display
Decoders


Common-anode LED requires active-LOW
outputs
Common-cathode LED requires activeHIGH output - not as popular
38
Figure 12-37
36
Seven-Segment LED Display
Decoders


Counters must output BCD
Common-Anode LED Display
37
Seven-Segment LED Display
Decoders

7447 BCD-to-Seven-Segment Decoder/Driver ICs




4-bit BCD input
Seven active-LOW outputs
Lamp test input
Ripple blanking input and output
39
Seven-Segment LED Display
Decoders

A 7447 7-segment display driver
40
Seven-Segment LED Display
Decoders

Driving a Multiplexed Display with a
Microcontroller

2 ports can drive up to 8 digits
1 port determines which digit is active
 1 port drives the segments

More efficient
 Assembly language used
 Not all displays are on at once

41
Figure 12-44
42
Synchronous Counters


All clock inputs tied to common clock line
4-bit synchronous counter
MOD16 counter
 4 flip-flops

43
Figure 12-45
44
Synchronous Up/Down
Counter ICs

74192 and 74193
74192 - decade counter
 74193 - binary counter

45
Synchronous Up/Down
Counter ICs

74192 and 74193
Two clock inputs (up and down)
 Terminal count outputs - when max is reached
 Function Table
 See Table 12-2 in your text

46
Synchronous Up/Down
Counter ICs

74190 and 74191
74190 - BCD counter
 74191 - 4-bit counter

47
Synchronous Up/Down Counter
ICs

74190 and 74191
Parallel load - preset counter
 U/D - select up or down counting
 Terminal count output when max reached
 Ripple clock output for cascading

48
Synchronous Up/Down
Counter ICs

74160/61/62/63
Two count enable inputs
 Terminal count output

49
Applications of Synchronous
Counter ICs

Count 0 to 9, 9 to 0 and 0 to 9


Divide-by-9 frequency divider using 74193


See Application 12-8
Divide-by-200 using synchronous counters


See Application 12-7
See Application 12-9
MOD-7 synchronous up-counter using 74163

See Application 12-10
50
51
52
53
54
Summary



Toggle flip-flops can be cascaded end to end to
form ripple counters.
Ripple counters cannot be used in high-speed
circuits because of the problem they have with
the accumulation of propagation delay through
all the flip-flops.
A down counter can be built by taking the
outputs from the not-Q’s of a ripple counter.
67
Summary


Any modulus (or divide-by) counter can be
formed by resetting the basic ripple counter
when a specific count is reached.
A glitch is a short-duration pulse that may
appear on some of the output bits of a counter.
68
Summary


Ripple counter ICs such as the 7490, 7492, and
7493 have four flip-flops integrated into a single
package providing four-bit counter operations.
Four-bit counter ICs can be cascaded end to end
to form counters with higher than MOD16
capability.
69
Summary

Seven-segment LED displays choose between
seven separate LEDs (plus a decimal point
LED) to form the 10 decimal digits. They are
constructed with either the anodes or the
cathodes connected to a common pin.
70
Summary


LED displays require a decoder/driver IC such
as the 7447 to decode BCD data into a seven-bit
code to activate the appropriate segments to
illuminate the correct digit.
Synchronous counters eliminate the problem of
accumulated propagation delay associated with
ripple counters by driving all four flip-flops with
a common clock.
71
Summary


The 74192 and 74193 are 4-bit synchronous
counter ICs. They have a count-up/countdown feature and can accept a 4-bit parallel load
of binary data.
The 74190 and 74191 synchronous counter ICs
are similar to the 74192/74193 except they are
better for constructing multistage counters of
more than 4 bits.
72
Summary

The 74160 series goes one step further and
allows for truly synchronous high-speed
multistage counting.
73