Chapter 2: Performance
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Measure, Report, and Summarize
Make intelligent choices
See through the marketing hype
Key to understanding underlying organizational motivation
Why is some hardware better than others for different programs?
What factors of system performance are hardware related?
(e.g., Do we need a new machine, or a new operating system?)
How does the machine's instruction set affect performance?
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Which of these airplanes has the best performance?
Airplane
Passengers
Boeing 737-100
Boeing 747
BAC/Sud Concorde
Douglas DC-8-50
101
470
132
146
Range (mi) Speed (mph)
630
4150
4000
8720
598
610
1350
544
•How much faster is the Concorde compared to the 747?
•How much bigger is the 747 than the Douglas DC-8?
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Definitions
• Performance is in units of things-per-second
– bigger is better
• If we are primarily concerned with response time
– performance(x) =
1
execution_time(x)
" X is n times faster than Y" means
Performance(X)
n
=
---------------------Performance(Y)
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Example
• Time of Concorde vs. Boeing 747?
• Concord is 1350 mph / 610 mph = 2.2 times faster
= 6.5 hours / 3 hours
• Throughput of Concorde vs. Boeing 747 ?
• Concord is 178,200 pmph / 286,700 pmph = 0.62 “times faster”
• Boeing is 286,700 pmph / 178,200 pmph = 1.6 “times faster”
• Boeing is 1.6 times (“60%”)faster in terms of throughput
• Concord is 2.2 times (“120%”) faster in terms of flying time
We will focus primarily on execution time for a single job
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Computer Performance: TIME, TIME, TIME
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Response Time (latency)
— How long does it take for my job to run?
— How long does it take to execute a job?
— How long must I wait for the database query?
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Throughput
— How many jobs can the machine run at once?
— What is the average execution rate?
— How much work is getting done?
If we upgrade a machine with a new processor what do we increase?
If we add a new machine to the lab what do we increase?
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Execution Time
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Elapsed Time
– counts everything (disk and memory accesses, I/O , etc.)
– a useful number, but often not good for comparison purposes
CPU time
– doesn't count I/O or time spent running other programs
– can be broken up into system time, and user time
Our focus: user CPU time
– time spent executing the lines of code that are "in" our program
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Book's Definition of Performance
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For some program running on machine X,
PerformanceX = 1 / Execution timeX
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"X is n times faster than Y"
PerformanceX / PerformanceY = n
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Problem:
– machine A runs a program in 20 seconds
– machine B runs the same program in 25 seconds
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Clock Cycles
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Instead of reporting execution time in seconds, we often use cycles
seconds
cycles
seconds


program program
cycle
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Clock “ticks” indicate when to start activities (one abstraction):
time
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cycle time = time between ticks = seconds per cycle
clock rate (frequency) = cycles per second (1 Hz. = 1 cycle/sec)
A 200 Mhz. clock has a
1
200  10 6
 10 9  5 nanoseconds cycle time
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How to Improve Performance
seconds
cycles
seconds


program program
cycle
So, to improve performance (everything else being equal) you can either
________ the # of required cycles for a program, or
________ the clock cycle time or, said another way,
________ the clock rate.
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How many cycles are required for a program?
...
6th
5th
4th
3rd instruction
2nd instruction
Could assume that # of cycles = # of instructions
1st instruction
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time
This assumption is incorrect,
different instructions take different amounts of time on different machines.
Why? hint: remember that these are machine instructions, not lines of C code
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Different numbers of cycles for different instructions
time
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Multiplication takes more time than addition
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Floating point operations take longer than integer ones
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Accessing memory takes more time than accessing registers
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Important point: changing the cycle time often changes the number of
cycles required for various instructions (more later)
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Example
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Our favorite program runs in 10 seconds on computer A, which has a
400 Mhz. clock. We are trying to help a computer designer build a new
machine B, that will run this program in 6 seconds. The designer can use
new (or perhaps more expensive) technology to substantially increase the
clock rate, but has informed us that this increase will affect the rest of the
CPU design, causing machine B to require 1.2 times as many clock cycles as
machine A for the same program. What clock rate should we tell the
designer to target?"
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Don't Panic, can easily work this out from basic principles
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Now that we understand cycles
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A given program will require
– some number of instructions (machine instructions)
– some number of cycles
– some number of seconds
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We have a vocubulary that relates these quantities:
– cycle time (seconds per cycle)
– clock rate (cycles per second)
– CPI (cycles per instruction)
a floating point intensive application might have a higher CPI
– MIPS (millions of instructions per second)
this would be higher for a program using simple instructions
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Performance
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Performance is determined by execution time
Do any of the other variables equal performance?
– # of cycles to execute program?
– # of instructions in program?
– # of cycles per second?
– average # of cycles per instruction?
– average # of instructions per second?
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Common pitfall: thinking one of the variables is indicative of
performance when it really isn’t.
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CPI Example
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Suppose we have two implementations of the same instruction set
architecture (ISA).
For some program,
Machine A has a clock cycle time of 10 ns. and a CPI of 2.0
Machine B has a clock cycle time of 20 ns. and a CPI of 1.2
What machine is faster for this program, and by how much?
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If two machines have the same ISA which of our quantities (e.g., clock rate,
CPI, execution time, # of instructions, MIPS) will always be identical?
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# of Instructions Example
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A compiler designer is trying to decide between two code sequences
for a particular machine. Based on the hardware implementation,
there are three different classes of instructions: Class A, Class B,
and Class C, and they require one, two, and three cycles
(respectively).
The first code sequence has 5 instructions: 2 of A, 1 of B, and 2 of C
The second sequence has 6 instructions: 4 of A, 1 of B, and 1 of C.
Which sequence will be faster? How much?
What is the CPI for each sequence?
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MIPS example
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Two different compilers are being tested for a 100 MHz. machine with
three different classes of instructions: Class A, Class B, and Class
C, which require one, two, and three cycles (respectively). Both
compilers are used to produce code for a large piece of software.
The first compiler's code uses 5 million Class A instructions, 1
million Class B instructions, and 1 million Class C instructions.
The second compiler's code uses 10 million Class A instructions, 1
million Class B instructions, and 1 million Class C instructions.
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Which sequence will be faster according to MIPS?
Which sequence will be faster according to execution time?
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Benchmarks
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Performance best determined by running a real application
– Use programs typical of expected workload
– Or, typical of expected class of applications
e.g., compilers/editors, scientific applications, graphics, etc.
Small benchmarks
– nice for architects and designers
– easy to standardize
– can be abused
SPEC (System Performance Evaluation Cooperative)
– companies have agreed on a set of real program and inputs
– can still be abused (Intel’s “other” bug)
– valuable indicator of performance (and compiler technology)
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Basis of Evaluation
Cons
Pros
• representative
Actual Target Workload
• portable
• widely used
• improvements
useful in reality
• easy to run, early in
design cycle
• identify peak
capability and
potential bottlenecks
• very specific
• non-portable
• difficult to run, or
measure
• hard to identify cause
•less representative
Full Application Benchmarks
Small “Kernel”
Benchmarks
Microbenchmarks
• easy to “fool”
• “peak” may be a long
way from application
performance
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SPEC ‘89
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Compiler “enhancements” and performance
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SPEC95
• Eighteen application benchmarks (with inputs) reflecting a
technical computing workload
• Eight integer
– go, m88ksim, gcc, compress, li, ijpeg, perl, vortex
• Ten floating-point intensive
– tomcatv, swim, su2cor, hydro2d, mgrid, applu, turb3d,
apsi, fppp, wave5
• Must run with standard compiler flags
– eliminate special undocumented incantations that may
not even generate working code for real programs
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SPEC ‘95
go
m88ksim
gcc
compress
li
ijpeg
perl
vortex
tomcatv
swim
su2cor
hydro2d
mgrid
applu
trub3d
apsi
fpppp
wave5
Artificial intelligence; plays the game of Go
Motorola 88k chip simulator; runs test program
The Gnu C compiler generating SPARC code
Compresses and decompresses file in memory
Lisp interpreter
Graphic compression and decompression
Manipulates strings and prime numbers in the special-purpose programming language Perl
A database program
A mesh generation program
Shallow water model with 513 x 513 grid
quantum physics; Monte Carlo simulation
Astrophysics; Hydrodynamic Naiver Stokes equations
Multigrid solver in 3-D potential field
Parabolic/elliptic partial differential equations
Simulates isotropic, homogeneous turbulence in a cube
Solves problems regarding temperature, wind velocity, and distribution of pollutant
Quantum chemistry
Plasma physics; electromagnetic particle simulation
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SPEC CPU2000
164.gzip
175.vpr
176.gcc
181.mcf
186.crafty
197.parser
252.eon
253.perlbmk
254.gap
255.vortex
256.bzip2
300.twolf
168.wupwise
171.swim
172.mgrid
173.applu
177.mesa
178.galgel
179.art
183.equake
187.facerec
188.ammp
189.lucas
191.fma3d
200.sixtrack
301.apsi
C
C
C
C
C
C
C++
C
C
C
C
C
Fortran
Fortran
Fortran
Fortran
C
Fortran
C
C
Fortran
C
Fortran
Fortran
Fortran
Fortran
Compression
FPGA Circuit Placement and Routing
C Programming Language Compiler
Combinatorial Optimization
Game Playing: Chess
Word Processing
Computer Visualization
PERL Programming Language
Group Theory, Interpreter
Object-oriented Database
Compression
Place and Route Simulator
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Physics / Quantum Chromodynamics
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Shallow Water Modeling
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Multi-grid Solver: 3D Potential Field
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Parabolic / Elliptic Partial Differential
3-D Graphics Library
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Computational Fluid Dynamics
Image Recognition / Neural Networks
Seismic Wave Propagation Simulation
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Image Processing: Face Recognition
Computational Chemistry
90
Number Theory / Primality Testing
90
Finite-element Crash Simulation
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High Energy Nuclear Physics Accelerator
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Meteorology: Pollutant Distribution
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SPEC ‘95
Does doubling the clock rate double the performance?
Can a machine with a slower clock rate have better performance?
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SpecCPU2000 Benchmark results
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Advanced Micro Devices AMD Athlon (TM) XP 2700+
Advanced Micro Devices, AMD Athlon (TM) XP 2800+
Advanced Micro Devices, AMD Athlon (TM) XP 3000+
IBM Corporation pSeries 630 (1450 MHz, 1 CPU)
Intel Corporation (2.67 GHz, Pentium 4 processor)
Intel Corporation (2.8 GHz, Pentium 4 processor)
Intel Corporation (3.06 GHz, Pentium 4 processor
Sun Microsystems Sun Blade 2000 (1.015GHz)
Sun Microsystems Sun Blade Model 2050
878 913
898 933
960 995
884 910
998 1005
1032 1040
1099 1107
516 576
537 610
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More SPEC CPU2000 Results
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This data is current as of Wed Mar 19 20:01:27 PST 2003
SPECint ® 2000
1099.0 3067.0 MHz Pentium 4 HT Intel D850EMVR motherboard (3.06 GHz, Pentium 4 processor wi
1085.0 3066.0 MHz Pentium 4 Dell Precision WorkStation 350 (3.06 GHz P4)
967.0 2800.0 MHz Xeon Fujitsu Siemens Computers CELSIUS R610
960.0 2167.0 MHz Athlon ASUS A7N8X Deluxe Motherboard, AMD Athlon (TM) XP 3000+
909.0 1450.0 MHz POWER4+ IBM Corporation IBM eServer pSeries 650 Model 6M2 (1450 MHz, 1 CPU)
898.0 2250.0 MHz Athlon XP ASUS A7N8X (REV 1.02) Motherboard, AMD Athlon (TM) XP 2800+
845.0 1250.0 MHz Alpha Hewlett-Packard Company hp AlphaServer ES45 68/1250
822.0 1300.0 MHz POWER4 IBM Corporation IBM eServer pSeries 655 Model 651 (1300 MHz, 1 CPU)
810.0 1000.0 MHz Itanium 2 Hewlett-Packard Company hp server rx2600 (1000 MHz, Itanium 2)
751.0 2133.0 MHz Athlon MSI K7D Master Motherboard, AMD Athlon (TM) MP 2600+
747.0 1350.0 MHz SPARC64 V Fujitsu Limited PRIMEPOWER900 (1350MHz)
737.0 2000.0 MHz Athlon MP Asus A7M266-D Motherboard, AMD Athlon (TM) MP 2400+
648.0 1400.0 MHz Pentium III Dell PowerEdge 1500SC (1.4 GHz PIII)
642.0 875.0 MHz PA-RISC Hewlett-Packard Company hp workstation c3750
569.0 750.0 MHz PA-RISC 8700 Hewlett-Packard Company hp workstation j6700
537.0 1050.0 MHz UltraSPARC III Cu Sun Microsystems Sun Blade Model 2050
512.0 810.0 MHz SPARC64 GP Fujitsu Limited PRIMEPOWER650 (810MHz)
483.0 600.0 MHz R14000 SGI SGI Origin 3200 1X 600MHz R14k
471.0 600.0 MHz R14000A SGI SGI Origin 300 1X 600MHz R14000A
439.0 900.0 MHz UltraSPARC III Sun Microsystems Sun Blade 1000 Model 1900
437.0 1000.0 MHz Pentium III Xeon Dell PowerEdge 4400 (1.0 GHz PIII Xeon)
431.0 750.0 MHz RS64 IV IBM Corporation IBM eServer pSeries 620 Model 6F0 (750 MHz)
417.0 552.0 MHz PA-RISC 8600 Hewlett-Packard Company hp visualize j6000 UNIX workstation
379.0 800.0 MHz Itanium Hewlett-Packard Company hp server rx4610
333.0 450.0 MHz POWER3 II IBM Corporation RS/6000 44P-170 (450 MHz)
328.0 400.0 MHz R12000 SGI SGI Origin 3200 400MHz R12k
313.0 400.0 MHz PA-RISC 8500 Hewlett-Packard Company hp visualize b2000 UNIX workstation
264.0 500.0 MHz PowerPC RS64 III IBM Corporation RS/6000 Model 7026-M80 (1 CPU)
225.0 480.0 MHz UltraSPARC II Sun Microsystems Sun Enterprise 450
168.0 340.0 MHz RS64 II IBM Corporation RISC System/6000 H70 (1 CPU)
165.0 500.0 MHz UltraSPARC IIe Sun Microsystems Sun Blade 100
99.4 250.0 MHzP owerPC 604e IBM Corporation RS/6000 43P-150 (250MHz)
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Metrics of performance
Answers per month
Application
Useful Operations per second
Programming
Language
Compiler
ISA
(millions) of Instructions per second – MIPS
(millions) of (F.P.) operations per second – MFLOP/s
Datapath
Control
Megabytes per second
Function Units
Transistors Wires Pins
Cycles per second (clock rate)
Each metric has a place and a purpose, and each can be misused
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Aspects of CPU Performance
CPU time
= Seconds
Program
= Instructions x Cycles
Program
instr. count
CPI
x Seconds
Instruction
Cycle
clock rate
Program
Compiler
Instr. Set Arch.
Organization
Technology
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CPI
“Average cycles per instruction”
CPI = (CPU Time * Clock Rate) / Instruction Count
= Clock Cycles / Instruction Count
n
•
CPU time = ClockCycleTime * CPI
i =1
* I
i
i
n
CPI =
•CPI
i =1
*i
F
i
where F
=i
I
i
Instruction Count
"instruction frequency"
Invest Resources where time is Spent!
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Example (RISC processor)
Base Machine (Reg / Reg)
Op
Freq Cycles CPI(i)
ALU
50%
1
.5
Load
20%
5
1.0
Store
10%
3
.3
Branch
20%
2
.4
2.2
% Time
23%
45%
14%
18%
Typical Mix
How much faster would the machine be if a better data cache
reduced the average load time to 2 cycles?
How does this compare with using branch prediction to shave a
cycle off the branch time?
What if two ALU instructions could be executed at once?
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Amdahl's Law
Execution Time After Improvement =
Execution Time Unaffected +( Execution Time Affected / Amount of Improvement )
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Example:
"Suppose a program runs in 100 seconds on a machine, with
multiply responsible for 80 seconds of this time. How much do we have to
improve the speed of multiplication if we want the program to run 4 times
faster?"
How about making it 5 times faster?
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Principle: Make the common case fast
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Amdahl's Law
Speedup due to enhancement E:
ExTime w/o E
Speedup(E) = -------------------- =
ExTime w/ E
Performance w/ E
--------------------Performance w/o E
Suppose that enhancement E accelerates a fraction F of the task
by a factor S and the remainder of the task is unaffected then,
ExTime(with E) Š ((1-F) + F/S) X ExTime(without E)
Speedup(with E) Š
1
(1-F) + F/S
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Example
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Suppose we enhance a machine making all floating-point instructions run
five times faster. If the execution time of some benchmark before the
floating-point enhancement is 10 seconds, what will the speedup be if half of
the 10 seconds is spent executing floating-point instructions?
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We are looking for a benchmark to show off the new floating-point unit
described above, and want the overall benchmark to show a speedup of 3.
One benchmark we are considering runs for 100 seconds with the old
floating-point hardware. How much of the execution time would floatingpoint instructions have to account for in this program in order to yield our
desired speedup on this benchmark?
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Remember
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Performance is specific to a particular program/s
– Total execution time is a consistent summary of performance
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For a given architecture performance increases come from:
– increases in clock rate (without adverse CPI affects)
– improvements in processor organization that lower CPI
– compiler enhancements that lower CPI and/or instruction count
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Pitfall: expecting improvement in one aspect of a machine’s
performance to affect the total performance
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You should not always believe everything you read! Read carefully!
(see newspaper articles, e.g., Exercise 2.37)
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