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Marketing
Requirements
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6
Engineering Requirements
A. User interface will consist of a single on/off
switch.
B. The design process will be well-documented.
4,10
C. Upon power up, the system will counteract noise
signals which fall between 420 Hz and 460 Hz.
5,6
D. The output of the system will be a 3.5 mm
headphones jack.
E. The cost of the system will not exceed $1000 per
academic unit.
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1,2,7,8,11
F. The processor and all internal connections must
be encompassed in a hard case with dimensions no
more than four inches larger than the dimensions of
the FPGA.
Justification
The system does not need to be configured by
the user.
Documentation is important for any future work
that may be done on the project. It can also be
used as a resource for other projects.
This chosen frequency range signifies all the
unwanted noise the system will need to counteract. This range does not need to be configured
by the user.
The 3.5 mm headphone jack is the standard for
many electronic devices.
Keeping the cost of the system to $1000 per unit
will help make the system more affordable and
marketable to customers.
Keeping the system enclosed in a case that is
about the size of the board used will ensure that
the system is safe, small, easy to move, durable,
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and more aesthetically pleasing to the customer.
Marketing Requirements
Engineering Requirements
5,8
G. The system must contain two microphones, an
FPGA, necessary wires, a headset, and a hard
case.
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H. The microphones must be able to detect
frequencies in the range 60 Hz to 15 kHz.
3,9,12
1,12
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Justification
The basic components are what the system
needs to work.
This is a basic need of the system so that it can
detect the noise signals which must be
countered.
I. The system must consume less than 0.3 kWh on With a low power consumption, the product is
average.
more affordable. Low-power systems also do not
produce much heat.
J. The system must not exceed a peak
Putting a cap on the peak power usage of the
instantaneous power usage of 10 W.
system will act as a safety feature to keep it from
tripping breakers or drawing more than a
desired amount of power at any given point in
time. This will also ensure that the system stays
energy efficient.
K. A drop in the volume of the noise signal must The noise signal will not be completely
be detected by 85% of individuals who test the
countered; however, a drop in volume should be
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system.
able to be detected by a customer with average
hearing capabilities.
Marketing Requirements
Engineering Requirements
4,14
L. The delay between the point at which the
system is powered on and the noise signal is
cancelled will not exceed 3 seconds.
1,4
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M. The volume of the counter signal will not
exceed 85 dB.
N. The system must be able to interact with two
microphone inputs either through line inputs or
GPIO pins.
Justification
If the delay is too long, there will be an extended
period of unpleasant ringing while the signals
are not 180 degrees out of phase. If this period
is excessively long, it could become unpleasant
to the customer.
To produce a pleasant output sounds the counter
signal must be relatively inaudible by humans.
Also, the system should never produce a sound
that could be painful or cause harm to the
customers’ ears.
This is a fundamental part of the system’s
operation. The system must be able to take in
the noisy signal and have a feedback loop for the
algorithm to work.
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3rd Order FIR Filter
𝑦 𝑛 = 𝑊0 𝑥 𝑛 + 𝑊1 𝑥 𝑛 − 1 + 𝑊2 𝑥 𝑛 − 2 + 𝑊3 𝑥 𝑛 − 3
LMS Algorithm
𝑊 𝑛 + 1 = 𝑊 𝑛 + 2 ∗ µ ∗ 𝑒 𝑛 ∗ 𝑥[𝑛]
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Microphone
I2S Connections
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• Pin 39: SCK
• Pin 40: SD
• Pin 61: WS
Xilinx Virtex 5
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Audio Codec
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Component Description
Cost
Our Cost Availability
Omnidirectional
Microphone
$3.23
$0.60
In stock from InvenSense.
http://store.invensense.com/ProductDetail/INMP441ACEZ-InvenSenseInc/485883&pid=1135
Part Number: INMP441ACEZ
Lead Time: 4-5 business days
Surface-mount PCB
Capacitors
$0.43
$0.43
In stock from DigiKey.
http://www.digikey.com/product-detail/en/0/1276-1506-1-ND
Part Number: 1276-1506-1-ND
Lead Time: 3 business days
Surface-mount PCB
Resistors
$1.15
$1.15
In stock from DigiKey.
http://www.digikey.com/product-detail/en/0/MCS0402-100K-CFCT-ND
Part Number: MCS0402-100K-CFCT-ND
Lead Time: 3 business days
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Component Description
Cost
Our Cost Availability
Superlux HD668B
Headphone
$43.82
$0.00
Xilinx Virtex-5
XC5VLX110T
$2,199.00 or $799.00 $0.00
(Academic)
Total Cost
$2,247.63 or $847.63 $2.18
In stock from Amazon.
http://www.amazon.com/Superlux-HD668B-Dynamic-Semi-OpenHeadphones/dp/B003JOETX8
Part Number: NA
Lead Time: 3-5 business days
In stock from Digilent.
http://www.digilentinc.com/Products/Detail.cfm?Prod=XUPV5&Nav1=Products
&Nav2=Programmable
Part Number: 6003-410-008P-KIT
Lead Time: 2-3 business days
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Engineering
Requirement
C
Test Description
Expected Result
Pass/Fail
Unit Testing
The purpose of this test is to test the Matlab version The Matlab code should accurately
of the LMS algorithm. Since the Matlab software has model the operations required by the
already been verified, the algorithm will be verified by LMS algorithm.
code inspection by a team member who did not write
the Matlab code.
C
The purpose of this test is to test the Matlab version The Matlab code should accurately
of the FIR filter. Since the Matlab software has
model the operations required by the
already been verified, the filter will be verified by code FIR filter.
inspection by a team member who did not write the
Matlab code.
C
The purpose of this test is to test the HDL description The output HDL description matches
of the FIR filter using a VHDL testbench. Stimulus the expected output.
and expected output data can be generated by the
Matlab model.
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Engineering
Requirement
C
Test Description
Expected Result
Pass/Fail
Unit Testing
The purpose of this test is to test the HDL description The output HDL description matches
of the LMS algorithm using a VHDL testbench.
the expected output.
Stimulus and expected output data can be generated
by the Matlab model.
C, D
The purpose of this test is to test the Audio Codec on The sinusoid will be heard through the
the board. A sinusoid will be generated and passed plugged in headset.
through the Audio Codec to verify that it is
functioning as expected.
N
The purpose of this test is to test the I2S protocol
The I2S protocol functions as expected.
library using a VHDL testbench. The testbench will
act as a SLAVE to ensure the communication
protocol is functioning properly.
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Engineering
Requirement
N
C
C
Test Description
Expected Result
Pass/Fail
Unit Testing
The purpose of this test is to test the microphones use The microphone is using the I2S
of the I2S protocol. This will be accomplished by
protocol as
applying a 2.82 MHz clock to SCK, applying a 44.1 expected.
KHz clock to WS, driving L/R high, and driving
CHIPEN to high. The clocks will be generated by the
FPGA. The output will be monitored on an
oscilloscope.
Integration Testing
The purpose of this test is to test the hierarchical
The system as a whole functions as
MATLAB model. This will be accomplished through expected.
testing all the modules of the system by driving the
input signal.
The purpose of this test is to test the integrated HDL The output HDL description matches
description of the noise cancellation module using a the expected output.
VHDL testbench. Stimulus and expected output can
be generated by the Matlab model.
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Engineering
Requirement
N
C, K
Test Description
Expected Result
Pass/Fail
Integration Testing
The purpose of this test is to test the integration of
Audio detected by the microphone is
the microphone and the Audio Codec. The FPGA passed through the Audio Codec
will be configured to send the audio data from the
without distortion.
microphone directly to the Audio Codec.
The purpose of this test is to ensure that the
There has been a noticeable drop in
algorithm works on the FPGA. The adaptive noise volume.
system as a whole will be connected and tested for
noisy input signals in the frequency range of 420 Hz
to 460 Hz. At least 20 individuals will be polled to
determine if there is a
noticeable drop in volume.
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Engineering
Requirement
Test Description
Expected Result
Pass/Fail
Acceptance Testing
D
The purpose of this test is to test the successful
output of a signal to the headphones. The input
signal will be sent through the Audio Codec,
through the 3.5 mm jack, and to the headset.
A clear audio signal is produced by
the headset.
A
The purpose of this test is to test the accessibility of The system powers on/off as
the on/off switch. The switch will be pressed to
expected.
test it.
B
The purpose of this test is to review the system
documentation for completeness. This includes
comments in the MATLAB code and the VHDL
description.
The document is thorough.
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Engineering
Requirement
Test Description
Expected Result
Pass/Fail
Acceptance Testing
D
The purpose of this test is to ensure the 3.5 mm
The 3.5 mm jack is accessible to the
headphone jack is accessible to the user. Plug the
user.
headphones in to ensure the 3.5 mm jack is accessible to
the user.
E
Review the necessary components and ensure the total
The system cost does not exceed
cost of the
$1000.
system does not exceed $1000.
This test verifies that the system dimensions are within The enclosure is no more than two
the required dimensions. The dimensions of the case will inches
be measured to ensure the system will fit in the enclosure. larger than the FPGA on any side.
F
F
This test verifies the safety of the system. The enclosure The enclosed system has no sharp
will be checked for sharp edges or exposed wires.
edges or exposed wires.
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Engineering
Requirement
Test Description
Expected Result
Pass/Fail
Acceptance Testing
F
This test verifies that the system is aesthetically pleasing
to a majority of potential users. At least 10 individuals
will be polled to gather feedback on the aesthetics of the
system.
H
The purpose of this test is to test that the 60 Hz sine wave The sine waves are successfully
and a 15 kHz sine wave can be detected by the
viewed on the
microphones and monitored on an oscilloscope.
oscilloscope.
I, J
This test verifies that the system's total energy usage is
within the required usage. A watt-meter will be used to
monitor the instantaneous power and the total energy in
kilowatt-hours over a 12 hour period.
At least 80% of the individuals
polled agree that the system is
aesthetically pleasing compared to
a board with no enclosure.
The instantaneous power is less
than ten watts
and the total energy in kilowatthours is less than 0.3 kilowatthours.
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Engineering
Requirement
L
Test Description
Expected Result
Acceptance Testing
This test verifies the noise range countered by the system.
The system will be tested with frequencies in the band
420 Hz to 460 Hz, in increments of 10 Hz, to ensure
cancellation of the signals within 3 seconds. This will be
measured using a stopwatch.
The system successfully counters all
tones in
the frequency band within the 3
second window.
M
This test verifies that the gain of the system output is
The system produces output signals
below the required threshold. Sensors will be used to
that are
measure an ambient noise and the output signal for the below 85 dB.
frequency band of 60 Hz to 15 kHz. This will be used to
calculate the output dB of the system. (The sensor type is
still to be determined, but we could possibly use a
standard computer microphone.)
C
This test verifies that the functional algorithm counter
frequencies in the band 420 Hz to 460 Hz. This will be
accomplished by sending these frequencies through our
functional MATLAB simulation and listening to the
output file.
There has been a noticeable drop in
volume.
Pass/Fai
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