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Chapter 6
External Device
Yonsei University
Contents
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6-2
External Devices
I/O Modules
Programmed I/O
Interrupt-Driven I/O
Direct Memory Access
I/O Channel and Processors
The External Interface:SCSI and FireWire
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Overview
External Devices
• Input / Output modules are the third critical
element of the computer system (others are the
CPU and the memory)
• Why one does not connect peripherals directly
to the system bus
– Variety of peripherals with various methods of
operation
– Data transfer rate of peripherals is slow
– Different data format and word lengths
• I/O module major functions
– Interface to the processor and memory via the
system bus or central switch
– Interface to the one or more peripheral devices by
tailored data links
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Generic Model of an I/O Module
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External Devices
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Peripheral device
External Devices
• External device is referred to as a peripheral
device
• External Device
– Human readable
• VDT(video display terminal)
– Machine readable
• Magnetic disk, tape systems, sensor
– Communication
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External Device
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External Devices
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Keyboard/Monitor
External Devices
• Most common means of computer/user
interaction
• Basic unit of exchange is the character
• ASCII is most commonly used
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America Standard Code
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External Devices
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ASCII Control Characters
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External Devices
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ASCII Control Characters
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External Devices
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ASCII Control Characters
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External Devices
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ASCII Control Characters
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External Devices
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Disk Drive
External Devices
• Disk driver exchanges data, control, status
signal with an I/O module plus the electronics
for controlling the disk read/write mechanism
• Fixed-head disk
– Convert the magnetic patterns on the moving disk
surface to bits in the devices buffer
• Moving-head disk
– Cause disk arm to move in and out across the
disk’s surface
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Module Function
I/O Modules
• Major funtion for an I/O module
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Control and timing
Processor communication
Device communication
Data buffering
Error detection
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Control and timing
• Control step of the transfer data
– Processor interrogates the I/O module
– I/O module returns the device status
– Transfer data by means of a command to the I/O
module
– I/O miodule obtains a unit of data
– Data are transferred from the I/O module to the
processor
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Processor communication
• Processor communication
– Command decoding
• I/O module accepts commands from processor
– Data
• Exchange data between processor and I/O
– Status reporting
• It is important to know status of I/O module
• Common status signal : BUSY, READY
– Address recognition
• Each I/O device has an address
• An I/O module must recognize one unique
address for each peripheral it controls
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I/O Device Data Rates
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External Devices
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Device communication
External Devices
• Device communication involves commands,
ststus information, and data
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Data buffering
External Devices
• Data coming from main memory are sent to
an I/O module in a rapid burst
• Data are buffered in the I/O module and then
sent to the peripheral device at it data rate
• In opposite direction, data I/O module must
be able to operate at both device and
memory speeds.
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Error detection
External Devices
• I/O module is responsible for error detection
and for subsequently reporting errors to the
processor
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I/O Module Structure
External Devices
• Connect to the rest of the computer through a set of
signal lines
• I/O module function to allow the processor to view a
wide range of devices in a simple-minded way
• I/O channel
– Quite primitive and requires detailed control
– Commonly seen on the microcomputer
• I/O controller
– Used on mainframes
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Block Diagram of an I/O Module
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External Devices
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Three Techniques for I/O Operations
Programmed I/O
• Programmed I/O
• Interrupt driven I/O
• DMA
No Interrupts
Use of Interrupts
I/O-to-memory transfer Programmed I/O
through processor
Interrupt-driven I/O
Direct I/O-to-memory
transfer
Direct memory access
(DMA)
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Overview
Programmed I/O
• Processor execute program that give it direct
control I/O operation
• I/O module perform the requested action
• Set the appropriate bits in the I/O status
register
• I/O module takes no further action to alter the
processor
• It does not interrupt the processor
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I/O Commands
Programmed I/O
• Four type I/O commands
– Control
• Activate a peripheral and tell it what to do
– Ex. Megnetic-tape rewind, forward…
– Test
• Test a various ststus conditions associated with
an I/O module and its peripherals
– Read
• Obtain an item of data from the peripheral and
place it in an internal buffer(Fig6.4 data register)
– Write
• Take an item of data(byte or word) from the
data bus and transmit that data item to the
peripherals
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Tree Techniques for Input of a Block of Data
Programmed I/O
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I/O Instructions
Programmed I/O
• Instruction are easily mapped into I/O
commands
• Form of the instruction depends on the way
external devices are
• I/O devices is given a unique identifier or
address
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I/O Instructions
Programmed I/O
• Two modes of addressing
– Memory mapped I/O
• Single address space for memory locations and
I/O devices
• Same machine instruction to access both
memory and I/O devices
– Isolated I/O
• Address space for I/O is isolated from memory
• Need I/O or memory select lines
• Special commands for I/O
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Memory-Mapped and Isolated I/O
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Programmed I/O
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Interrupt-Driven I/O
Interrupt-Driven I/O
• Problem of programmed I/O
– Processor wait a long time for the I/O module of
concern to be ready for either reception or
transmission of data
• Alternative
– Processor issue an I/O command to a module and
go on to do some other useful work
– Interrupt the processor to request service when it
is ready to exchange data with the processor
– Execute data transfer and resume its former
processing
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Interrupt-Driven I/O
Interrupt-Driven I/O
• Interrupt I/O is more efficient than
programmed I/O because it eliminate
needless waiting
• Interrupt I/O still have much processor time
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Simple Interrupt Processing
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Interrupt-Driven I/O
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Interrupt Processing
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Interrupt-Driven I/O
Sequence of hardware events
1. Device issues an interrupt signal to processor
2. Processor finish execution of execution of current
instruction
3. Processor signals acknowledgment of interrupt
4. Processor push PSW and PC onto control stack
5. Processor loads new PC value based on interrupt
6. Save remainder of process state information
7. Process interrupt restore process state
information
8. Restore process state information
9. Restore old PSW and PC
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Design Issues
Interrupt-Driven I/O
• How does the processor determine which
device issued the interrupt
• If multiple interrupts have occurred, how does
the processor decide which one to process?
• Four device identification
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Multiple interrupt lines
Software poll
Daysy chain(hardware poll, vectored)
Bus arbitration(vectored)
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Changes in Memory & Register
Interrupt-Driven I/O
(a) Interrupt occurs after instruction at location N
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Changes in Memory & Register
Interrupt-Driven I/O
(b) Return from interrupt
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Multiple Interrupt lines
Interrupt-Driven I/O
• Most straightforward approach to the problem
• Impractical to dedicate bus lines or processor
pins to interrupt lines
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Software Poll
Interrupt-Driven I/O
• On interrupt, processor branchs to an
interrupt-service routine which it is to poll each
I/O module to determine which module
caused the interrupt
• Poll is in the form of a separate command
line(TESTI/O)
• Each l/O module contain an addressable
status register
• Read status register of each IO module to
identify the interrupting module
• Disadvantage is time consuming
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Daisy Chain
Interrupt-Driven I/O
• Hardware poll
• Vectored interrupt
– Vector
• A word on the data lines
• Address of the I/O module or unique identifier
– Processor use vector as a pointer to the
appropriate device routine
– Avoid the need to execute a general interruptservice routine first
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Bus Arbitration
Interrupt-Driven I/O
• I/O module must first gain control of the bus
• One module can raise the line at a time
• On interrupt, it respond on the interrupt ack
line
• Requesting module place its vector on the
data lines
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Intel 82C59A Interrupt Controller
Interrupt-Driven I/O
• Intel 80396 provide a single interrupt
request(INTR) and single ack(INTA)
• External interrupt arbiter, 82C59A
• 82C59A manage interrupt
• Interrupt mode
– Fully nested
• Interrupt request are ordered in priority from
0(IR0) through 7(IR7)
– Rotating
• Lowest priority in the group
– Special mask
• Processor inhibit interrupt from certain devices
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82C59A Interrupt Controller
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Interrupt-Driven I/O
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Intel 82C55A
Interrupt-Driven I/O
• General-purpose I/O module designed for
use with the Intel 80386 processor
• Next page Fig 6.10
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Intel 82C55A
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Interrupt-Driven I/O
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Keyboard/Display Interface
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Interrupt-Driven I/O
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Drawbacks of I/O
Direct memory access
• Processor intervene in data transfer between
memory and an I/O module
• Inherent drawback
– I/O transfer rate is limited
– Processor is tied up in managing an I/O transfer
• More efficient technique is required:
– Direct memory access(DMA)
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DMA Block Diagram
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Direct memory access
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DMA Function
Direct memory access
• DMA involves an additional module on
system bus
• DMA module take over control of the system
from processor
• Cycle stealing
– DMA module in effect steals a bus cycle
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DMA Function
Direct memory access
• Issue a command to the DMA module, by
sending to the DMA module the following
information
– Whether a read or write is requested, using the
read or write control line between the processor
and the DMA module
– Address of I/O device involved, communicated on
the data lines
– Starting location in memory to read from or write to,
communicated on the data lines and stored by the
DMA module in its address register
– The number of words to be read or written, again
communicated via the data lines and stored in the
data count register
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DMA Function
Direct memory access
• DMA module transfer the entire block of data,
– One word at a time
– Directly to or from memory
– Without going through the processor
• When transfer complete, DMA module sends
an interrupts signal to processor
• Processor is involved only at the beginning
and end of the transfer
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DMA & Interrupt Break point
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Direct memory access
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Alternative DMA Configuration
Direct memory access
• Single-Bus, Detached DMA
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Alternative DMA Configuration
Direct memory access
• Single-Bus, Integrated DMA-I/O
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Alternative DMA Configuration
Direct memory access
• I/O Bus
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The evolution of the I/O Functions
I/O Channels & Processors
• Evolutionary step
1. CPU directly controls a peripheral device
2. Controller or I/O module is added
3. Same configurations is used, but now interrupts
are employed
4. I/O module is given direct access to memory via
DMA
5. I/O module is enhanced to become a processor in
its own right, with a specialized instruction set
tailored for I/O (I/O channel)
6. I/O module has a local memory of its own and is a
computer in its own right (I/O processor)
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The evolution of the I/O Functions
I/O Channels & Processors
• More and more of the I/O function is
performed without CPU involvement
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Characteristics of I/O Channels
I/O Channels & Processors
• I/O channel an extension of DMA concept
• I/O channel has the ability to execute I/O
instruction
• CPU does not execute I/O instruction
• Two type of I/O channel
– Selector channel
• Control multiple high-speed devices
• Transfer of data with one of those devices
– Multiplexor channel
• Handle I/O with multiple devices at the same
time
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I/O Channel Architecture
I/O Channels & Processors
(a)Selector
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I/O Channel Architecture
I/O Channels & Processors
(b)Multiplexor
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Type of Interface
External Interface:
SCSI and FireWire
• Parallel interface
– Multiple line connecting the I/O module and the
peripheral
– Multiple bits transferred simultaneously
– Used for higher speed peripherals(tape,disk)
• Serial interface
– One line used to transmit data
– Bits must be transmitted one at a time
– Printer, terminals
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Dialogue for a Write Operation
External Interface:
SCSI and FireWire
1. I/O module send a control signal
2. Peripheral acknowledges the request
3. I/O module transfer data
4. Peripheral acknowledges receipt of the data
(read operation proceeds similary)
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Parallel and Serial I/O
External Interface:
SCSI and FireWire
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Point-to-Point & Multipoint
External Interface:
SCSI and FireWire
• Point-to-point
– Dedicated line between I/O module and external
device
– On small system(PC), include keyboard, printer,
external modem
• Multipoint
– Used to support external mass storage
devices(disk, type) and multimedia devices(CDROM,video)
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Small Computer Interface
External Interface:
SCSI and FireWire
• SCSI
– Popularized in the Macintosh in 1984
– Now widely used on Mac, Windows/Intel system,
workstation
• SCSI Version
– SCSI-1 :
• 8 data lines and operate at a clock speed of
5MHz of a data rate of 5 Mbytes/s
– SCSI-2 :
• Optional expansion of the data lines to 16-32
and increase of the clock speed to 10 MHz
• Maximum data rate of 20 or 40 Mbytes/s
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Signals and Phases
External Interface:
SCSI and FireWire
• Bus Free
– No device is using the bus
• Arbitration
– Enable one device to gain control of the bus
• Selection
– Enable an initiator to select a target to perform a
funcion
• Reselection
– Enable a target to reconnect to an initiator to
resume an operation
• Command
– Enable target to request the command information
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Signals and Phases
External Interface:
SCSI and FireWire
• Data
– Enable the target to request the transfer of data
• Status
– Enable the target to request that status information
be sent from the target to the initiator
• Message
– Enable the target to request the transfer of one or
more messages
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SCSI Bus Phases
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External Interface:
SCSI and FireWire
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SCSI Control Lines
External Interface:
SCSI and FireWire
• BSY
– Set to indicate the bus is busy
• SEL
– Select a target to perform a command
• C/D
– Indicate whether data on the data bus is Control or
Data information
• I/O
– Control the direction of data movement
• MSG
– Indicate to the initiator that the information being
trasferred is a message
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SCSI Control Lines
External Interface:
SCSI and FireWire
• REQ
– Request a data information transfer
• ACK
– Acknowkedge a REQ from traget
• ATN
– Inform the target that it has a message available
for transfer
• RST
– Used to reset the bus
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SCSI Bus Signals
External Interface:
SCSI and FireWire
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SCSI Timing Diagram
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External Interface:
SCSI and FireWire
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Messages
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External Interface:
SCSI and FireWire
Command complete
Disconnect
Initiator Detected Error
Abort
– Sent from initiator to the target to clear the present
operation
• Synchronous Data Transfer
– Exchanged between initiator and target to
establish synchronous data transfer
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Commands
External Interface:
SCSI and FireWire
• Steps for execution of command
– Target acquires and decides command information
– Data is transferred to or from the target
– Target generates and returns status information
• Fields of CDB
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Operation code
Logical unit number
Logical block address
Transfer length
Parameter list length
Allocation length
Control
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SCSI Command Block Format
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External Interface:
SCSI and FireWire
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Commands
External Interface:
SCSI and FireWire
• Mandatory
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Inquiry
Request Sense
Send Diagnostic
Test unit ready
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Fire Wire Serial Bus
External Interface:
SCSI and FireWire
• FireWire
– IEEE standard 1394, for a high-performance serial
bus
• Advantages
– High speed
– Low cost
– Easy to implement
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Fire Wire Serial Bus
External Interface:
SCSI and FireWire
• Use serial transmission (bit at a time) rather
than parallel
• Computers are getting physically smaller
• Provide a single I/O interface with a simple
connector
• User can reach behind the machine and plug
it in without looking
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FireWire Configurations
External Interface:
SCSI and FireWire
• Use a daisy chain
• Provide for what is known as hot plugging
• With SCSI, both ends of the bus must have
terminators and each device must be
assigned a unique address as part of the
configuration
• No terminators
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FireWire Configurations
External Interface:
SCSI and FireWire
• System automatically perform a configuration
function to assign addresses
• Tree structured configuration is possible
• Three layer of the stack
– Physical layer
– Link layer
– Transaction layer
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Comparison of SCSI&FireWire
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External Interface:
SCSI and FireWire
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Physical layer
External Interface:
SCSI and FireWire
• Several alternative transmission media and
their connectors
• Tree structured arrangement of the node
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FireWire Protocol Stack
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External Interface:
SCSI and FireWire
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Link Layer
External Interface:
SCSI and FireWire
• Tow type of transmission
– Asynchronous
– Isochronous
• Subaction’s five time period
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Arbitration sequence
Packet transmission
Acknowledgement gap
Acknowledgment
Subaction gap
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FireWire Subactions
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External Interface:
SCSI and FireWire
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