Task 2: Modeling and Simulation of Conducted
and Radiated EMI from HPM and UWB Sources
on PCBs and ICs
A. C. Cangellaris and E. Michielssen
ECE Department
Center for Computational Electromagnetics
University of Illinois at Urbana-Champaign
Illinois
June 2002
1
Objective
HPM/UWB
Sources
Antennas
Cracks
Apertures
Cables
Internal
Coupling
Propagation
to interior
EMI to
connectors &
packages
Circuits
Internal fields
as radiated EMI
Spurious
behavior

Accurately “propagate” the spurious signals (noise)
through the packaging hierarchy (printed circuit
boards, cards, connectors, interposer, package…) to
the die.
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June 2002
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Major Obstacle: Tackling System Complexity
Courtesy of Qualcomm
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June 2002
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System Complexity translates to EM Complexity
 EM Complexity
– Geometric complexity and distributed nature of the
packaging hierarchy (“coupling path”)
– Broad frequency bandwidth of the interfering signal
– Non-linearity of the terminations
 Tackling Complexity
– Hierarchical approach to the modeling of electromagnetic
interactions
•

From lumped models, to transmission-line models, to quasi-3D
full-wave models, to 3D full-wave models
Abstracting Complexity
– Systematic order reduction of numerical models of the
coupling path
– Equivalent circuit representation of the coupling path for its
seamless incorporation in network-oriented non-linear circuit
simulators
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June 2002
4
SUMMARY OF MODELING OBJECTIVE
Virtual coupling
ports
Radiated EMI
Integrating
Substrate
(PCB, MCM, …)
Conducted
& radiated
EMI
Packaged
digital & analog
devices
Physical coupling ports
(e.g., connectors, cables…)
EM Modeling & Simulation
Model Order Reduction
Synthesis
Source
representation
of conducted
noise at the
physical ports
V
V
Network
representation
of the
coupling
path
Equivalent source
representation of
radiated EMI coupling
Non-linear
lumped circuits
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June 2002
5
Specific Subtasks



Task 2.1 Development of a coupling path modeling
methodology
Task 2.2 Development of a (EMI) source modeling
methodology
Task 2.3 Non-linear Transient Simulation of the
hybrid lumped-distributed non-linear network
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June 2002
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Subtask 1: Modeling of the Coupling Path
 IBM Corporation
Printed Circuit Board
Chip
Package
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June 2002
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Subtask 1: Modeling of the Coupling Path (Cont)


Our modeling approach is hierarchical
– EM-Physics driven “divide and conquer” approach
Use suitable EM modeling approach for individual
blocks
– RLC models for short interconnect at chip & package level
– Multi-conductor Transmission Lines (MTL)
•

Balanced interconnects at the board level
– Quasi-3D EM Modeling for PCB power delivery network
– Full-wave modeling
• Unbalanced interconnects at the board level
• Coupling through cables
• RF/microwave packages & boards
Reduction of EM models to non-linear network
simulator (e.g. SPICE)
– Direct model order reduction
– Equivalent circuit synthesis
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June 2002
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Block Diagram of EM Modeling Flow
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June 2002
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Quasi-3D Modeling of Power Delivery Network
EM field between power/ground plane
pairs exhibits, approximately, a twodimensional variation
• Use simple 2D FDTD
Three-dimensional features (vias, pins,
slots, voids, etc) require locally 3D
models to capture the correct physics
1
j E z (i, j )  x ( H y (i  1, j )  H y (i, j ))
 y 1 ( H x (i, j  1)  H x (i, j ))
 jyH x (i,
j )  Ez (i, j )  Ez (i, j  1)
jxH y (i,
j )  Ez (i, j )  Ez (i  1, j )
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June 2002
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The resulting discrete EM model
 G
 D
 V
 D I   E( s ) 
 C 0   E( s ) 
 s
 FU( s),






R   H( s) 
 0 L   H( s) 
V ( s) = F  A + sB 
T
-1
V = FT X
G -DT 
C 0 
FU( s ) where A = 
, B = 

0
L
 D R 


The multiport transfer function is: Y( s) = FT  A + sB  F
-1
• Direct time-domain simulation is possible if desired
• Could be synchronized with time-domain IE solver
• Alternatively, model order reduction of the transfer function
using an Arnoldi-based subspace iteration method (PRIMA)
is used for the generation of a compact multiport
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June 2002
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Multi-port representation of the reduced-order
model is in terms of rational functions
M
Rk11


 k 1 s  Pk

Y( s )  

 M R N1
k


s  Pk
k

1


M R1N 

k




 s  Pk 

k 1



M R NN 
k

s  Pk 
k 1



Form compatible with circuit simulators that support
rational function models (e.g. H-Spice, ADS)
Equivalent circuit synthesis is possible also
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June 2002
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Passive synthesis through Foster forms
For a passive, reciprocal multi-port, its admittance (or impedance)
matrix may be cast in the following form:
 aq
aq 
H( s )  G 0  sC0   

Gq


s  pq 
q 1  s  pq
where it is:
 Re{ pq }  0, q  1, 2, .Q
Q
 matrices C0 and G q , q  0,1, 2,..., Q, are real and
positive semi-definite
 Re{aq }  0, q  1, 2, .Q

0<Im{aq }Im{ pq }  Re{aq }Re{ pq } , q  1, 2,
.Q
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June 2002
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Equivalent circuit for a two-port
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June 2002
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Two-port sub-circuit for use in H-SPICE
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June 2002
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The advantages of the direct use of the rational
function macro-model in the simulator
Elapsed Simulation Time
3 ports
10 ports
36 ports
H-SPICE
0.7 sec
5.73 sec
21.2 min
Equivalent
2.3 sec
676.55 sec
>12 hours
Transient Data File Size
3 ports
10 ports
36 ports
H-SPICE
25.9 KB
53.4 KB
172 KB
Equivalent
308.2 KB
269 MB
>2 GB
The secret is in the recursive convolution that is utilized for the
interfacing of the macro-model with the rest of the circuit
June 2002
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Application to a 4-layer PCB
8 cm X 4 cm, 4 layer board. A 2mm gap is present all the way across the top
ground plane. A total of 58 pins are used.
Top view
|Z21| From H-SPICE
Cross-sectional view
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June 2002
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Application to a 4-layer PCB (cont’d)
H-SPICE calculation of the transient response.
Switching occurs at port 1 while port 2 is terminated with 50ohm.
Voltage at port 1 is depicted by the solid line.
Voltage at port 2 is depicted by the dotted line.
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June 2002
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Validation study in progress
Intel 4-layer test board
1st layer: Power plane
2nd layer: Ground plane
3rd layer: Ground plane
4th layer: Power plane
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June 2002
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Samples of the generated mesh
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June 2002
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Generated multi-port for switching noise
simulation in SPICE
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June 2002
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Rational function multi-port & equivalent circuit
synthesis from raw data


Data either from measurements or EM field
solvers
Step 1: Rational function fitting
– Process guarantees stability but not passivity
– Check fitted multi-port for passivity
• If not passive, constrain fitting using Foster constraints
• Repeat fitting
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June 2002
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Validation of rational function fitting
PCB interconnect test
structures courtesy of Intel
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June 2002
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Validation of fitting (cont’d)
Measured |Y61|*
Synthesized |Y61|
(*) Measurements courtesy of Intel Corporation
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June 2002
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Task 2.1 Summary



EM modeling flow for the coupling path established
Quasi-3D EM Model for power delivery network
completed
– Validation in progress
– Further enhancements include:
•
•
Incorporation of hooks for balanced MTLs
Incorporation of hooks for matrix transfer functions in Foster form
Capability for SPICE-compatible broadband multi-port
macro-model generation in place
Illinois
June 2002
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Subtask 2.3: Non-linear Transient Simulation
 Physics-oriented nonlinear transient simulator
 Full wave modeling of printed circuit boards (PCBs) with fine
geometric features, finite (and possibly inhomogeneous)
dielectrics, and nonlinear loads and circuits
 Interfaces with SPICE solvers and models
10
cm
15
cm
25 cm
30 cm
15
cm
20
cm
1
cm
1
cm
17.5
cm
25
cm
30
cm
4.5
cm
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June 2002
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Introduction (cont.)
 Time Domain Integral Equation (TDIE) based
Marching-on-in-time (MOT) solvers
20 cm
10 cm
 Have been known to the acoustics and
electromagnetics communities
since the sixties.
 Compared to frequency domain solvers,
5 cm
1 cm
17.5
cm
25 cm
6 cm
0.5
cm
4.5 cm
25 cm
they can solve nonlinear problems directly.
Liu and Tesche (1976),
Landt and Miller (1983),
Djordjevic and Sarkar (1985),
Deiseroth and Singer (1995),
Orlandi (1996)
varistor
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June 2002
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Introduction (cont.)
However TDIE - MOT solvers have long been conceived as
 Unstable: … But recently many proposals have surfaced for

stabilizing these schemes (Davies, Rao and Sarkar, Walker,
Smith, Rynne,…);
Slow: … Computational complexity has prohibited
O N T N S2
application to analysis of large scale problems!
… PWTD technology removes this
2
O
(
N
N
log
NS )
T S
computational bottleneck
c h
Now, we can / should be able to rapidly solve large
-scale, nonlinear problems using the PWTD
technology!!!
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June 2002
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Formulation - Problem Definition
 Given

Eexc (r, t )
an of 3-D inhomogeneous dielectric
bodies (V ), and 3-D arbitrarily
shaped PEC surfaces, wires, and
surface-wire junctions (S ),

Multiple linear / nonlinear lumped
circuits connected to S V

a temporally bandlimited excitation
ckt 1
interconnect
geometry
 Solve for


Er (r, t )
S V
all transient currents and voltages
induced on the interconnect geometry
S V and the the circuits (ckt 1, …, ckt m)
distributed
ckt m
lumped
radiated electric and/or magnetic
fields if required
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June 2002
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Formulation – Time Domain Electric Field
 Assume spatially-variable,
frequency independent
permittivity and free-space
permeability in V, and thin
wires in S .
PEC
Eexc (r, t )
0
0
 Radiated electric field:
0
 (r )
V S
 (r )
Er (r, t )
t

(1)
Er  r, t    A  r, t   c 2  dt   A  r, t  
t
0

0 
 (t  R c)
 (t  R c)
A(r, t ) 
 J PEC (r, t )   dv
 J DIEL (r, t )  ,
  ds
4  S
R
R
V

R  r  r ,
J DIEL (r, t )  ( (r )   0 )
(2)
 total
E (r, t )
t
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June 2002
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Formulation - MOT Algorithm
 Expand current as
N S NT
J (r, t )   I nj f nq (r )T j (t ),
n 1 j  0
 Surface and Volume Spatial Basis Functions
q  s, w, sw, d
N S  N PEC  N DIEL
n
p n
r
1
Tn

n
T
p n
un
rn1
 p
k
A2

sˆ n1
sˆ n
r
rn
un 1
Vn
rn1
Vn
A3
A1
Tk
p n
an
p n
The temporal basis functions are local cubic polynomials
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June 2002
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Formulation - MOT Algorithm (cont.)
 Construct a system of equations by applying spatial Galerkin testing
at each time step.

for the j’th time step:
j 1
Z0I j  Vexc
j   Zl I j l
immediate
interactions
l 1
unknowns
tested
incident
field
previously
computed
delayed
interactions
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June 2002
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Formulation - Transient Circuit Simulator
 SPICE-like transient circuit simulator
 Performs linear and nonlinear large-signal analysis using
Modified nodal analysis
 Nonlinear equations solved using multi-dimensional
Newton
 Incorporates the following circuit elements:



Independent/dependent voltage and current sources
Resistors, inductors, capacitors
Diodes, BJTs, MOSFETs, MESFETs
DC
AC
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June 2002
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Formulation - Transient Circuit Simulator (cont.)
 Circuit behavior described by time-domain nodal equations
(using trapezoidal rule for the jth time step)
G 0  Vj   I
immediate
interactions
exc
j
 G1  V j1 
sources
unknowns
previously
computed
interactions from
previous time step
 For m circuits, the nonlinear system of equations is
 G10  V1j    I exc ,1   G11  V1j 1  

  j  
 exc
G 0 Vj  

  I j  G1 V j 1

 m m  I exc ,m   m m 
G 0  V j    j  G1  V j 1 
 


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June 2002
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Formulation - Coupled EM / Circuit Equations
 Combine the EM and circuit nodal equations into a single consistent
system to be solved for N S EM and N C circuit unknowns at each time
step
Z0

 Ci
 exc j 1

Cv   I j   0   V j   Z l I j  l 
l 1

 V   

0   j  G 0 V j   exc

I

G
V
j
1
j

1


 


 Coupling between the circuits and the interconnect structure is
accounted for by matrices Cv and C i
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June 2002
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Formulation - the MLPWTD Algorithm
Z0I j  V
j 1
exc
j
  Z l I j l
2
O( NT N S log N S )
l 1
for typical PCB
structures
Level
Direct(0)
:
Source block
:
Observer block
:
1
2
S
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June 2002
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Analysis of Active Nonlinear Microwave Amplifier
 Simulation Parameters
 Objective
N s  1468, N v  7096
Characterize structure
from 2-10 GHz
N s  N v  8564, Nt  512
t  5.0 ps
 Geometry
Device
region
Output port
150
 Excitation pulse
V (r, t )  V0 cos(0t )e
inc
110
80
90
 t 2 2 2
 0  2  6 109 rad/s
50
t   t  6 ,   6.82 1011 s
180
70
Input port
Dielectric constant = 2.33
31
Ground plane
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June 2002
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Amplifier : Nonlinear circuitry
 MESFET Circuit Model
0.05 nH
0 .5
0.2 p F
D 0 .5
G
C gs0
Vc
Ids
0.05 nH
0.6 p F
1 .0
S
0 .7
Cgs (vc ) 
Cgs 0
0.1 nH
1  vc / b
3
I ds (vgs , vds )  ( A0  A1vgs  A2vgs2  A3vgs
) tanh(vds )
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June 2002
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Amplifier: Plane Wave Interference
 Transient input/output waveforms
 MOT results*
2
20
Input port voltage
Output port voltage
S21 - MOT
S11 - MOT
S21 - REF
S11 - REF
15
1.5
10
5
dB
amplitude (V)
1
0.5
0
-5
0
-10
-0.5
-15
-1
0
0.2
0.4
0.6
0.8
1
1.2
time (ns)
1.4
1.6
1.8
2
-20
2
3
4
5
6
7
Frequency (GHz)
8
9
10
* C. Kuo, B. Houshmand, and T. Itoh, “Full-wave analysis of packaged microwave circuits with active and nonlinear
devices: an FDTD approach,” IEEE Trans. Microwave Theory Tech., vol. 45, pp. 819-826, May 1997.
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June 2002
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Amplifier + Shield: geometry
 Simulation Parameters
 Objective
N s  3288, Nv  7096
Determine effect of shielding box
on S-parameters
N s  N v  10384, Nt  700
t  6.25 ps
 Geometry
PEC shielding box
(640x186x690mils)
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June 2002
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Amplifier + Shield: S-parameters
20
S21 - WITH SHIELD
S11 - WITH SHIELD
S21 - NO SHIELD
S11 - NO SHIELD
15
10
dB
5
0
-5
-10
-15
-20
2
June 2002
3
4
5
6
7
frequency (GHz)
41
8
9
10
Illinois
Amplifier + Shield: Plane Wave Interference
Eexc (r, t )  E0 cos(0t )et 
2
Transient response at transistor
output
2 2
E0  500xˆ  500yˆ V m
1
 0  2  6 10 rad/s
9
t   t  6  (zˆ  r) c
0.8
  8.68 1011 s
0.6
DG ONLY
DG+PLANE-WAVE
DG+PLANE-WAVE+SHIELD
Voltage (V)
0.4
Eexc
0.2
0
k̂
-0.2
-0.4
-0.6
0
0.5
1
1.5
Time (ns)
2
2.5
3
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June 2002
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Amplifier + Shield: Plane Wave Interference
E (r, t )  E0 cos(0t )e
exc
Transient response at transistor
output
 t 2 2 2
0  2  4 109 rad/s
t   t  6  (kˆ  r ) c
  1/ 4 ns
i  145, i  0
kˆ  0.5736xˆ  0.8192yˆ
Eexc
E  500 V/m, E  500 V/m
k̂
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June 2002
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Amplifier + Shield: Plane Wave Interference
Eexc (r, t )  E0 cos(0t )et 
2
2 2
Transient response at transistor
output
0  2  3 109 rad/s
t   t  6  (kˆ  r ) c
  3/14 ns
i  115, i  45
kˆ  0.6409(xˆ  yˆ )  0.4226zˆ
E  500 V/m, E  500 V/m
Eexc
k̂
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June 2002
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Amplifier + Shield: Plane Wave Interference
Eexc (r, t )  E0 cos(0t )et 
2
Transient response at transistor
output
2 2
0  2  6 109 rad/s
t   t  6  (kˆ  r ) c
  3/11 ns
i  180, i  0
kˆ   zˆ
E  500 V/m, E  500 V/m
Eexc
k̂
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June 2002
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Task 2.3: Summary
1)
2)
3)
4)
5)
A MOT algorithm based on a hybrid surface/volume time domain
integral equation has been developed for analysis of conducting/
inhomogeneous dielectric bodies,
This algorithm has been accelerated with the PWTD technology
that rigorously reduces the O ( NT N S2 ) computational complexity of
the MOT solver to O( NT N S log 2 N S ) for typical PCB structures,
Linear/Nonlinear circuits in the system are modeled by coupling
modified nodal analysis equations of circuits to MOT equations,
A nonlinear Newton-based solver is used at each time step to
consistently solve for circuit and electromagnetic unknowns.
The proposed method can find extensive use in EMC/EMI and
signal integrity analysis of PCB, interconnect and packaging
structures with realistic complexity.
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June 2002
46