Systems- Things to remember
Steady state error
- Defined as the difference between the input and output for a prescribed test input as t → infinity
• Step inputs represent constant position and are useful in determining the ability of the system
to position itself with respect to a stationary target (time function = 1, Laplace transform = 1/s)
• Ramp inputs represent constant velocity inputs and are useful in testing a system’s ability to
track a constant velocity target (time function = t, Laplace transform = 1/s2)
• Parabolas represent constant acceleration inputs and can be used to represent accelerating
targets such as a missile (time function = t2/2, Laplace transform = 1/s3)
𝑒𝑠𝑠 (𝑠𝑡𝑒𝑎𝑑𝑦 𝑠𝑡𝑎𝑡𝑒 𝑣𝑎𝑙𝑢𝑒 𝑜𝑓 𝑡ℎ𝑒 𝑒𝑟𝑟𝑜𝑟) =
1
𝑐 (𝑠𝑡𝑒𝑎𝑑𝑦 𝑠𝑡𝑎𝑡𝑒 𝑣𝑎𝑙𝑢𝑒 𝑜𝑓 𝑡ℎ𝑒 𝑜𝑢𝑡𝑝𝑢𝑡)
𝐾 𝑠𝑠
- If the forward path gain (K) is replaced by an integrator (K/s), there will be zero error for a step input
- Error for closed loop transfer function T(s) and input R(s) – applies only if system is stable:
𝑒(∞) = lim 𝑠𝑅(𝑠)[1 − 𝑇(𝑠)] 𝑤ℎ𝑒𝑟𝑒 𝐸(𝑠) = 𝑅(𝑠)[1 − 𝑇(𝑠)]
𝑡 →∞
𝑠𝑅(𝑠)
𝑠 →0 1 + 𝐺(𝑠)
𝑎𝑛𝑑 𝑠𝑜 𝑒(∞) = lim 𝑠𝐸(𝑠) = lim
𝑠 →0
𝑒𝑠𝑡𝑒𝑝 (∞) =
1
,
1 + lim 𝐺(𝑠)
𝑠 →0
𝑒𝑟𝑎𝑚𝑝 (∞) =
1
,
lim 𝑠𝐺(𝑠)
𝑠 →0
𝑒𝑝𝑎𝑟𝑎𝑏𝑜𝑙𝑎 (∞) =
1
,
lim 𝑠 2 𝐺(𝑠)
𝑠 →0
𝐾𝑝 = lim 𝐺(𝑠)
𝑠 →0
𝐾𝑣 = lims𝐺(𝑠)
𝑠 →0
𝐾𝑎 = lim 𝑠 2 𝐺(𝑠)
𝑠 →0
- The static error constants are Kp, Kv and Ka: position, velocity & acceleration constants respectively
- System type is defined as the number of poles or the number of pure integrations n in the forward
path. Type 0 has n = 0, Type 1 has n = 1 and Type 2 has n = 2. APPLIES ONLY TO UNITY FEEDBACK!
- If the question asks for an error, the system type will enable us to infer what type of input is used. For
example, if it is a Type 0 system, only a step input will yield a finite value for error. For a Type 1 system,
only a ramp input yields a finite value for error etc.
- Note that T(s) refers to closed loop, and G(s) refers to open loop
- Time constant = 1/σ
- The desired input reference is always 1. If the error is found to be 0.75, then the steady state value will
be the deviation from 1, i.e. it will be 1-0.75 = 0.25
Sketching the root locus
1. Label all the poles and zeros on the s-plane
2. Draw in the real axis segments
3. Find the number of asymptotes: #poles - #zeros
4. Find the location of the asymptotes:
𝜎𝑎 =
∑𝑝 − ∑𝑧
#𝑝 − #𝑧
𝜎𝑎 =
(2𝑘 + 1)𝜋
#𝑝 − #𝑧
5. Find the angle of the asymptotes:
6. Find the break-away and break-in points:
∑
1
1
= ∑
𝜎 + 𝑧𝑖
𝜎 + 𝑝𝑖
7. Find the angles of departure and arrival:
𝜃(𝑧𝑒𝑟𝑜𝑠) − 𝜃(𝑝𝑜𝑙𝑒𝑠) = (2𝑘 + 1)180°
- K = 0 at the poles of the open-loop system
- K = infinity at the zeros of the open loop system
Bode plots
- For a Type 0 system, the magnitude plot starts out at 20log(the normalized number when s = 0).
The phase plot starts at 0 degrees.
- For a Type 1 system, the pole at 0 means that the plot will begin with a slope of -20dB/dec.
The phase will start at -90 degrees
- For a Type 2 system, the magnitude will begin with a slope of -40dB/dec.
The phase will start at -180 degrees
- Resonant peak is max value of magnitude plot
- Resonant frequency is the frequency at which the peak occurs
Mr (resonant peak) indicates the relative stability of a stable closed loop system.
A large Mr corresponds to larger maximum overshoot of the step response. Desirable value: 1.1 to 1.5
BW gives an indication of the transient response properties of a control system.
A large bandwidth corresponds to a faster rise time. BW and rise time tr are inversely proportional.
BW also indicates the noise-filtering characteristics and robustness of the system.
Increasing wn increases BW.
Increasing damping ratio decreases BW as well as Mr.
BW and Mr are proportional to each other for 0 <damping ratio< 0.707
Comparison of methods
- The disadvantage of design by gain adjustment is that only the transient response and steady-state
error represented by points along the root locus are available.
- Frequency response methods, unlike root locus methods can be implemented without a computer to
aid in stability and transient response design via gain adjustment
- An advantage of using frequency design techniques is the ability to design derivative compensation,
such as lead compensation to speed up the system and at the same time build in a desired steady-state
error requirement that can be met by the lead compensator alone
Lag vs Lead
Lead compensator: pc > zc
- Root locus moved to the left, makes system more stable
- Increases speed of response
- Increases K at high frequencies
- Increases cross-over frequency
- Decreases rise time/settling time
Lag compensator: zc > pc
- Root locus moved to the right, undesirable
- Pole and zero need to be close so that they do not drive the system unstable. Their effects will be very
small
- Improves the steady state response of the system
Classical techniques used to model LTI systems
LTI methods cannot model: