DIGITAL LOGIC DESIGN
by
Dr. Fenghui Yao
Tennessee State University
Department of Computer Science
Nashville, TN
Sequential Circuits
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Note
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Most of the figures are from your
course book
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Sequential Circuits
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Combinational
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The outputs depend only on the current input
values
It uses only logic gates
Sequential
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The outputs depend on the current and past input
values
It uses logic gates and storage elements
Example
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Vending machine
They are referred as finite state machines since
they have a finite number of states
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Block Diagram
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Memory elements can store binary
information
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This information at any given time determines
the state of the circuit at that time
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Sequential Circuit Types
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Synchronous
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The circuit behavior is determined by the signals
at discrete instants of time
The memory elements are affected only at
discrete instants of time
A clock is used for synchronization
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Memory elements are affected only with the
arrival of a clock pulse
If memory elements use clock pulses in their
inputs, the circuit is called
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Sequential Circuits
Clocked sequential circuit
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Sequential Circuit Types
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ASynchronous
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The circuit behavior is determined by the signals
at any instant of time
It is also affected by the order the inputs change
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Clock
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It emits a series of pulses with a
precise pulse width and precise
interval between consecutive pulses
Timing interval between the
corresponding edges of two
consecutive pulses is known as the
clock cycle time, or period
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Flip-Flops
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They are memory elements
They can store binary information
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Flip-Flops
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Can keep a binary state until an input
signal to switch the state is received
There are different types of flip-flops
depending on the number of inputs
and how the inputs affect the binary
state
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Latches
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The most basic flip-flops
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They operate with signal levels
The flip-flops are constructed from
latches
They are not useful for synchronous
sequential circuits
They are useful for asynchronous
sequential circuits
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SR Latch with NOR
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SR Latch with NOR
S  set
R  reset
Q  1, Q'  0
 set state
Q  0, Q'  1
 reset state
S  1, R  1
 undefined, Q and Q' are set to 0
In normal conditions , avoid S  1, R  1
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SR Latch with NAND
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SR Latch with NAND
S  set
R  reset
Q  0, Q'  1
 set state
Q  1, Q'  0
 reset state
S  0, R  0
 undefined, Q and Q' are set to 1
In normal conditions , avoid S  0, R  0
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SR Latch with Control Input
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D Latch
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Symbols for Latches
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Note
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The control input changes the state of
a latch or flip-flop
The momentary change is called a
trigger
Example: D Latch
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It is triggered every time the pulse goes to the
logic level 1
As long as the pulse remains at the logic level 1,
the change in the data (D) directly affects the
output (Q)
THIS MAY BE A BIG PROBLEM since the state of
the latch may keep changing depending on the
input (may be coming from a combinational logic
network)
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How to Solve?
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Trigger the flip-flop only during a
signal transition
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Edge-Triggered D Flip-Flop
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Characteristics of D FlipFlop
Q(t  1)  D
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Edge-Triggered J-K Flip-Flop
Q(t  1)  JQ' K ' Q
How???????
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Excitation Table
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Edge-Triggered T Flip-Flop
T Q (t  1)
0 Q (t )
1 Q ' (t )
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Q(t  1)  T  Q  TQ'T ' Q
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Excitation Table
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Direct Inputs
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You can use asynchronous inputs to
put a flip-flop to a specific state
regardless of the clock
You can clear the content of a flip-flop
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The content is changed to zero (0)
This is called clear or direct reset
This is particularly useful when the power is off
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Sequential Circuits
The state of the flip-flop is set to unknown
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D Flip-Flop with
Asynchronous Reset
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State Equations
A state equation shows
the next state as a
function of the current
state and inputs
A(t  1)  A(t ) x(t )  B(t ) x(t )
B(t  1)  A' (t ) x(t )
y (t )  A(t )  B(t )x' (t )
A(t  1)  Ax  Bx
B(t  1)  A' x
y  ( A  B) x'
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State Table
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State Diagram
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Analysis with D Flip-Flops
DA  A  x  y
A(t  1)  A  x  y
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State Reduction
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Reduce the number of states but keep
the input-output requirements
Reducing the number of states may
reduce the number of flip-flops
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If there are n flip-flops, there are 2^n states
If you have two circuits that produce
the same output sequence for any
given input sequence, the two circuits
are equivalent
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They may replace each other
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State Reduction Example
Find the states for which the
next states and outputs are
the same
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Example (Cont.)
In the next
state, g is
replaced with e
In the next
state, f is
replaced with d
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Example (Cont.)
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State Assignment
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You need to assign binary values for
each state so that they can be
implemented
You need to use enough number of
bits to cover all the states
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State Assignments
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Design Procedure
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Derive a state diagram
Reduce the number of states
Assign binary values to the states
Obtain binary coded state table
Choose the type of flip-flop to be used
Derive simplified flip-flop input
equations and output equations
Draw the logic diagram
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Example
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Design a circuit (with D flip-flops) that
detects three or more consecutive 1’s in a
string of bits coming through an input line
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Example (Cont.)
A(t  1)  DA ( A, B, x)   3,5,7 
B(t  1)  DB ( A, B, x)   1,5,7 
y ( A, B, x)   6,7 
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Example (Cont.)
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Example (Cont.)
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Example
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Design a circuit (with JK flip-flops) that
detects three or more consecutive 1’s in a
string of bits coming through an input line
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Example (Cont.)
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Example (Cont.)
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Example (Cont.)
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Study Problems
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Course Book Chapter – 5 Problems
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5–3
5–5
5–6
5–7
5 – 10
5 – 12
5 – 13
5 – 19
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Questions
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