II/I sem
EC203 ELECTRONIC DEVICES AND CIRCUITS
BRANCH: ECE
[E] =EASY; [A] = AVERAGE; [D] = DIFFICULT, Not mentioned are supposed to be EASY.
UNIT – 1
(ONE MARK QUESTIONS)
1.
2.
3.
4.
5.
6.
7.
8.
9.
What is a valence band?
What is conduction band?
What is an intrinsic semiconductor?
What is doping?
What is a hole?
What is an extrinsic semiconductor?
Name one dopant which can be used with germanium to form an n-type semiconductor
Name the majority charge carriers in p-type semiconductors.
How does the width of the depletion region of a p-n junction change when it is reverse
biased?
10. What is the forward resistance of an ideal p-n junction diode?
11. Draw the circuit symbol of a semiconductor diode.
12. Name any one optoelectronic device.
13. Draw the circuit symbol of a Zener diode.
14. How does the conductivity of a semiconductor change with rise in its temperature?
15. Which process causes depletion region in a p-n junction?
16. What is the order of the thickness of the depletion layer in an unbiased p-n junction?
17. What is a photodiode?
18. Under which bias condition a Zener diode is used as a voltage regulator?
19. What is a Fermi Level?
20. What is tunneling?
21. In which part of the VI characteristic, Zener Diode will be operated?
22. Draw the equivalent circuit of a Tunnel Diode?
23. Give an application of a Zener Diode?
24. List the possible breakdown mechanisms in a diode?
25. Which diode is used in high speed switching?
26. What is reverse saturation current?
27. List any application of a Varactor diode?
28. How many junctions does an SCR has?
29. What is holding current for an SCR?
30. What is a latching current?
31. Draw the equivalent circuit of a practical diode?
32. How much Reverse saturation current change with temperature?
33. Give the principle of working of a Photodiode?
(TWO MARKS QUESTIONS)
1. Name one impurity each, which when added to pure Si produces (i) n-type and (ii) ptype semiconductor.
2. Give two differences between intrinsic and extrinsic semiconductors.
3. Give two differences between n-type and p-type semiconductors.
4. What happens to the width of the depletion layer of a p-n junction when it is (i) forward
biased? (ii) reverse biased?
5. Zener diodes have higher dopant densities as compared to ordinary p-n junction diodes.
How does it effect: (i) the width of the depletion layer? (ii) the junction field?
6. Explain why a photodiode is usually operated under reverse bias
7. What is an LED? Mention two advantages of LED over conventional incandescent
lamps.
8. Give two operational differences between light emitting diode (LED) and photodiode.
9. What is intrinsic semiconductor? Explain the formation of a hole in the covalent bond
structure of a Ge crystal.
10. How is an n-type semiconductor formed? Name the majority charge carriers in it. Draw
the energy band diagram of an n-type semiconductor.
11. How is a p-type semiconductor formed? Name the majority charge carriers in it. Draw
the energy band diagram of a p-type semiconductor.
12. Distinguish between n-type and p-type semiconductors on the basis of energy band
diagrams.
13. Explain the formation of the depletion region in a p-n junction. How does the width of
this region change when the junction is (i) forward biased? and (ii) reverse biased
(FIVE MARKS QUESTIONS)
1. What is extrinsic semiconductor? Distinguish between n-type and p-type semiconductors.
Draw relevant energy band diagrams.
2. Compare the characteristics of p-n junction diode, zener diode and tunnel diode. The
voltage across a si diode at room temperature of 3000 k is 0.71V when 2.5 mA current
flows through it. If the voltage increases to 0.8V, calculate the new diode current.
3. Explain the working of varactor diode?
4. Find the voltage at which the reverse current in a germanium PN junction diode attains a
value of 90%of its saturation value at its room temperature?
5. Determine the forward resistance of a PN junction diode, when the forward current is
5mA at T=300K .Assume silicon diode.
6. A silicon diode has a saturation current of 7.5microA at room temperature 300K.calculate
the saturation current at 400K.
7. Explain the following terms in a PN junction diode:
(a)static resistance ,(ii) dynamic resistance.
8. Explain the term diffusion capacitance CD?
9. Explain the V-I characteristics of a PN junction diode?
10. Explain the operation of a LED?
11.Explain the operation of a Photodiode?
Ten marks questions
1. (a) derive the expression for diode current equation?.
(b) Find the value of D.C. resistance and A.C resistance of a Germanium junction diode at
250C with Io = 25µA and at an applied voltage of 0.2V across the diode.
2. (a) Explain the formation of depletion region in an open-circuited pn-junction with neat
sketches.
(b) A pn-junction diode has a reverse saturation current of 30 µA at a temperature of 1250C.
At the same temperature find the dynamic resistance for 0.2V bias in forward and reverse
direction.
3.
(a) Explain the concept of tunneling with energy band diagrams.
(b) The resistivity of the two sides of a step-graded Si junction are 5 -cm (p.side) and 2.5
-cm (n side). Calculate the height of the potential barrier V0. Take p = 475 cm2 /V.sec
and µn=1500 cm2/V.sec at the room temperature of 3000k, and ni = 1.45 × 1010
atoms/cm3.
4. (a) Explain the terms avalanche breakdown and ‘zener breakdown’? How does zener diode
regulate the d.c. voltage.
(b) A certain pn-junction diode has a leakage current of 10 –14 A at room temperature of 270
C and 10-9A at 1250 C. The diode is forward biased with a constant current source of
1mA at room temperature. If current is assumed to remain constant. Calculate the
junction barrier voltage at room temperature and at 1250 C.
5. (a) What is a tunnel diode? Draw the V-I characteristics of such a diode and explain the
occurrence of the negative differential resistance.
(b) A Ge diode has a saturation current of 1 nA at 200 C. Find it current when it is forward
biased by 0.4v. Find the current in the same diode when the temperature rises 1100 C.
6.
In the case of an open circuited p-n junction, the acceptor atom concentration is
2.5x1016/m3and donor atom concentration is 2.5x1022 /m3. Intrinsic concentration ni is
2.5x1019 /m3. Determine the value of contact difference of potential.
7. (a) Draw the band diagram of PN junction under open circuit conditions and explain.
(b) Explain the temperature dependence of VI characteristics.
8. (a) Explain the operation of SCR.discuss its V-I characteristics?
(b) A Diode operating at 300 k at a forward voltage of 0.4V carries a current of 10ma when
voltage is changed to 0.42V the current becomes thrice. Calculate the value of reverse
leakage current and η for the diode (Assume VT = 26 mv).
9. (a) What is varactor diode? Explain the operation of varactor diode with its equivalent
circuit. What are its applications.
(b) The conductivity of intrinsic Si is 3 s/m at room temperature and the electron and hole
mobilities in it are 0.4 m2/V.Sec and 0.2 m2/V.Sec. respectively. Calculate the number of
electrons and holes per m3 participating in the conduction process.
10. (a) Define CD and CT. Derive the expression for CD and CT?
(b)Calculate the Dynamic forward and reverse resistance of a p – n junction diode when the
applied voltage is 0.25V at T=300K given I0 = 2A.
(c) Find the Concentration of holes and electrons in ap-type silicon at 3000 K. Assuming
resistivity as 0.02 -cm. Assume p = 475 m2 /V.sec, ni = 1.45 × 1010 atoms/cm3.
UNIT-II
1 MARK QUESTIONS
1. The ripple factor of a power supply is a measure of------------------------[D]
2. Ripple factor of a full-wave rectifier without filter will be ----------------------[E]
3. What are the types of filters?[E]
4. A series clipper produces a changing output when the diode is……………[A]
5. What is another name of clipper?[A]
6. Define peak inverse voltage of the diode.[A]
7. Define transformer utilization factor.[D]
8. What is the value of TUF in bridge type FWR?[E]
9. In which region zener diode acts as voltage regulator[A]
10. List out the types of filters used in rectifiers[E]
11. Define wave shaping and wave shaping circuits[D]
12. Explain the meaning of clamping in an electronic circuit?[A]
13. Give a diode circuits that clamps a given voltage at +2V? ?
[A]
14. How does a clamper affect the peak-to-peak and RMS values of a waveform?
[D]
15. A shunt clipper produces a changing output when the diode is………………[A]
16. Define TUF of a transformer used in a rectifier. [D]
17. A clamper circuit sometimes uses a DC battery in addition to diode, a capacitor and a
resistor. Why?
[D]
18. What is a the characteristic of a regulated power supply?
19. Draw a clipping circuits that clips at two independent levels?
20. Give any application of a filter?
2 MARKS QUESTIONS
1. Compare the performance of half-wave and full-wave rectifier[E]
2. Compare rectifier and regulator.[D]
3. Define load regulation and line regulation.[D]
4.
5.
6.
7.
8.
9.
What are the advantages of bridge rectifier?[A]
What are the advantages of FWR over HWR?[A]
What is the need for a filter in rectifier?[T]
Give some examples of linear and non-linear wave shaping circuits[E]
List some advantages and disadvantages of CLC filters[A].
What is the need for voltage regulators? What are the drawbacks of unregulated power
supply?[E]
10. A clamper has values of C = 47 F, RS = 10 , and RL = 5 . When the capacitor is
discharging, the time constant of the circuit is ________.[D]
11. The circuit in Figure has values of RS = 10 and RL = 100 . When VS reaches its
positive peak value of +12 V, the value of the load current is approximately _____[D].
12. Sketch the shape of the output voltage waveform for this "clipper" circuit, assuming an
ideal diode with no forward voltage drop:[A]
13. Sketch the shape of the output voltage waveform for this "clipper" circuit, assuming an
ideal diode with no forward voltage drop: [A]
14. Sketch the
shape of the output voltage waveform for this
"clipper" circuit, assuming an ideal diode with no forward voltage drop: [A]
15. Design a clipper circuit that eliminates the positive portion of this AC waveform, leaving
only the negative half-cycles to appear on the output: [D]
16. Design a clamper circuit that biases the AC waveform so it lies
completely below (negative) the zero line: [D]
17. Draw any double diode clipper circuit?
5 MARKS QUESTIONS
1. A full wave rectifier (FWR) supplies a load requiring 300V at 200mA. Calculate the
a. capacitor input filter using a capacitor of 10 µF.
b.a choke input filter using a choke of 10 H and a capacitance of 10µF. Neglect the
resistance of choke.
[D]
2. Draw the circuit diagram of full-wave rectifier with inductor filter.[E]
3. A full-wave rectified voltage of 18V peak is applied across a 500µF filter capacitor.
Calculate the ripple and d.c. voltages if the load takes a current of 100mA. [E]
4. Explain about the regulation characteristics of Zener diode with a circuit and
waveforms.[E]
5. A full wave rectifier circuit uses two silicon diodes with a forward resistance of 20 each.
A d.c. voltmeter connected across the load of 1k reads 55.4 volts. Calculate[A]
i. IRMS
ii. Average voltage across each diode
iii. Ripple factor
iv. Transformer secondary voltage rating.
6. Compare various filter circuits in terms of their circuits, ripple factor and a voltage
waveforms[D]
7. Compare the performance of HWR uses capacitor filter, inductor filter and L-section
filter. What is the need of bleeder resistance in FWR choke filter?[A]
8. A FWR circuit is fed from a transformer with a center tap. The rms voltage from end of
secondary to center tap is 30V. If the diode forward resistance is 2 and that of the half
secondary is 8, calculate the following for a 1k load:[A]
i. Power delivered to load
ii. Percentage regulation at full load
iii. Efficiency of rectification
iv. TUF secondary.
9. Determine the ripple factor of an L-type choke input filter comprising a 10H choke and
8µF capacitor. Used with a FWR. Compare with a simple 8µF capacitor input filter at a
load current of 50 mA and also 150 mA. Assuming the d.c. voltage of 50V.[E]
10. A bridge rectifier with capacitor filter is fed from 220V to 40V step down transformer. If
average d.c current in load is 1A and capacitor filter of 800 µF. Calculate load regulation
and ripple factor. Assume power line frequency of 50Hz. Neglect diode forward
resistance and d.c. resistance of secondary of transformer.[A]
11. Describe the operation of series clippers.]E]
12. Describe the circuit operation of a clamper. [E]
13. Describe and analyze the operation of shunt clippers[A]
14. Describe and analyze the operation of biased shunt clippers[A]
10 MARKS QUESTIONS
1. (a) Explain the principle of operation of HWR with and without capacitor input filter and
draw the waveforms.
(b) A FWR circuit is fed from a transformer having a center-tapped secondary winding. The
rms voltage from either end of secondary to center tap is 30V. If the diode forward
resistance is 5 and that of the secondary is 10 for a load of 900, Calculate:
i. Power delived to load
ii. % Regulation at full load
iii. Efficiency at full load
iv. TUF of secondary[E]
2. (a) What are the important characteristics of a rectifer circuit? Explain them briefly.
(b) A diode whose internal resistance is 20 is to supply power to a 100 load from 110V (rms)
source of supply. Calculate:
i. Peak load current
ii. % regulation from no load to the given
iii. a.c load current
iv. d.c load current[E]
load
3. (a) Derive the expression for ripple factor for FWR with L-Section filter.
(b) A 3K resistive load is to be supplied with a d.c.voltage of 300V from a.c.voltage of
adequate magnitude and 50Hz frequency by wave rectification. The LC filter is used
along the rectifier. Design the bleeder resistance, turns ratio of transformer, VA rating of
transformer PIV rating of diodes. [D]
4. (a) Draw and explain the circuit diagram of FWR with c-section filter. What is its ripple
factor?
(b) A HWR circuit has filter capacitor of 1200 µF and is connected to a load of 400. The
rectifier is connected to a 50 Hz, 120 Vrms Source. It takes 2 m sec for the capacitor to
rechandge during each cycle. Calculate the minimum value of the repetitive surge current
for which the diode should be rated. [D]
5. (a) Explain the circuit diagram of a single phase full-wave bridge rectifier and sketch the
input, output waveforms.
(b) Define percentage regulation and prove that the regulation of both half wave and full
wave rectifier is given by percentage regulation is equal to [(Rf +Rs )/ RL]× 100%[E]
6. (a) Calculate the percent ripple for the voltage developed across a 120 − µf filter capacitor
when
Providing a load current of 80mA. The full wave rectifier operating from the 60 HZ
supply
develops a peak rectified voltage of 25V.
(b) Design a CLC or π section filter for V dc = 10V, IL = 200mA and τ = 2%.
[D]
7. (a) Explain the action of a full wave rectifier with centre tapped transformer and sketch the
wave forms of input and output voltages.
(b) Derive the expression for ripple factor in a full wave rectifier with resistive load.
(c) Determine value of ripple factor operating at 50Hz with 100µF capacitor filter and 100
load.[A]
8. Determine:
(a) DC output voltage,
(b) PIV,
(c) Rectification effeminacy of the given circuit [A]
9. Derive the ripple factor of - Filter with neat sketch. [D]
10. Derive the ripple factor of capacitor filter. [A]
11. (a) Explain why a bridge rectifier is preferred over a centre-tap rectifier.
(b) Explain the necessity of a bleeder resistor.
(c) A diode has an internal resistance of 20Ω and 1000Ω load from a 110V rms source of
supply.
Calculate
i. The efficiency of rectification
ii. The percentage regulation from no load to full load.
[A]
12. (a) Draw the circuit diagram of HWR. Explain its working. What is the frequency of ripple
in its output?
(b) A HWR circuit supplies 100mA d.c to a 250Ω load. Find the d.c output voltage, PIV
rating of a diode and the r.m.s. voltage for the transformer supplying the rectifier.[E]
13. Draw the circuit diagram of a FWR
(a) With centre tap connection and
(b) Bridge connection and explain its operation.[E]
14. A voltage of 200 cos wt is applied to HWR with load resistance of 5 K. find the maximum
d.c current component, r.m.s. current, ripple factor, TUF and rectifier efficiency. [D]
15. A 230 V, 60Hz voltage is applied to the primary of a 5:1 step down, centertapped transformer
used in a full wave rectifier having a load of 900 .If the diode resistance and the
secondary coil resistance together has a resistance of 100 , determine
i. dc voltage across the load.
ii. dc current flowing through the load.
iii. dc power delivered to the load.
iv. PIV across each diode
v. Ripple voltage and its frequency.[D]
16. Predict how the operation of this clipper circuit will be affected as a result of the following
faults. Consider each fault independently (i.e. one at a time, no multiple faults):
a.
b.
c.
d.
e.
Diode D1 fails open:
Diode D1 fails shorted:
Resistor R1 fails open:
Resistor R1 fails shorted:
For each of these conditions, explain why the resulting effects will occur.[A]
17. Predict how the operation of this clipper circuit will be affected as a result of the following
faults. Consider each fault independently (i.e. one at a time, no multiple faults):
a)
b)
c)
d)
e)
Diode D1 fails open:
Diode D1 fails shorted:
Resistor R1 fails open:
Resistor R1 fails shorted:
For each of these conditions, explain why the resulting effects will occur. [D]
18. Describe the effects of negative clamper and positive clampers on an input waveform [D]
III UNIT
Bipolar Junction Transistor (BJT): Construction, Principle of Operation of PNP and NPN
transistors, Characteristics of transistor in common emitter, common Base and Common
collector configurations.
Transistor Biasing And Thermal Stabilization - DC & AC load lines, Operating point, types of
transistor Biasing, Stabilization against variations in VBE, β and Ico, stability factors, Bias
Compensation using Diodes and Transistors.
OBJECTIVE TYPE QUESTIONS [ 1 mark ]
1. What is BJT
2. Name the three leads of a common transistor
3. Draw the symbol of PNP transistor and specify the leads
4. Draw the symbol of NPN transistor and specify the leads
5. In any transistor IE =
6. The expression for α in terms of β is α =
7. The expression for β in terms of α =
8. The expression for γ in terms of α = =
9. Which configuration is known as an Emitter-follower?
10. Expression for S =
11. If α is 0.9, then β =
12. In Voltage Divider Bias, The value of S =
13. When transistors are used in digital circuits they usually operate in which regions?
14. What is the phase difference between the input and output ac voltage signals of a commonemitter amplifiers
15. What is the phase difference between the input and output ac voltage signals of a common
base amplifiers
16. What is the phase difference between the input and output ac voltage signals of a common
collector amplifiers
17. What is meant by active region?
18. What is meant by saturation region?
19. What is meant by cut-off region?
20. For every 100C rise in temperature, what is the corresponding change in leakage current of a
transistor?
[A]
SHORT ANSWER QUESTIONS
1.
2.
3.
4.
5.
6.
[ 2marks ]
What is a transistor and why it is so called?
Why BJT is a current controlled device ?
What are the doping levels of emitter, base and collector in a BJT?
What does the arrow in the symbol of a transistor indicates?
What are the Regions of operation in a transistor
Define transistor ‘α’
7. Define transistor ‘β’
8. Define transistor ‘γ’
9. If α = 0.995, IE = 10mA & ICO = 0.5µA, then what is the value of ICEO?
10. What is Early effect or base width modulation.
11. Define AC load line
12. Define operating point. What are the reasons for shifting of operating point.
13. Why CE configuration is most commonly used
14. Define DC load line
15. List the three sources of instability of collector current.
16. Explain Thermal Runaway.
17. Define Stability factor S
18.
Define Stability factor S’
19.
Define Stability factor S”
20. What is meant by faithful amplification?[A]
Essay questions
[5marks ]
1. Sketch and explain various current components of a PNP transistor biased in the active
region.
2. What are the Three Operating Regions of a transistor? Explain them.
3. Give the transistor- junction voltage values of an NPN transistor at 250 C.
4. Explain why α is less than 1 and β is greater than 1 in a transistor.
5. Compare CB,CE and CC transistor configurations.
6. Explain Base width modulation (Early effect). Explain the three consequences of base
width modulation
7. Discuss i) thermal instability and ii) thermal runaway.
8. How does the designer minimize percentage variations in IC due to variations in IC0, VBE
and β. Over what temperature range can a transistor be used if it is a) silicon and b)
germanium.[A]
9. What is the need for biasing? Mention the various methods of transistor biasing? Discuss
the advantages and disadvantages of each circuit.[A]
10. Define a) stabilization techniques and b) compensation techniques[A]
ESSAY QUESTIONS [ 10 marks ]
1. a)Explain the construction and working of i) PNP Transistor and ii) NPN Transistor [A]
b) Obtain IC, β, and ICEO in case a BJT having IE = 10 mA, ICO = 0.5 μA, and α = 0.98.
2. Explain CB configuration with the help of input and output characteristics. Indicate the three
operating regions on the characteristics.[D]
3. Explain CE configuration with the help of input and output characteristics. Indicate the three
operating regions on the characteristics.[A]
4. Explain CC configuration with the help of input and output characteristics. Indicate the three
operating regions on the characteristics.[E]
5. a ) Define Transistor α, β and γ. Obtain the relation between them. [E]
b ) If IB and IC of any BJT are 1mA and 100 mA respectively, determine its current
amplification ratio in CB and CE configurations.
6. a) Define i) dc load line ii)) ac load line and iii)) operating point. Explain the procedure to
determine the operating point. What are the reasons for shifting of operating point.
b) (i) A germanium transistor is to be operated at zero signal IC = 1mA. If the
collector supply VCC = 12V, what is the value of RB in the base resistor method ?
Take β = 100.
(ii) If another transistor of the same batch with β = 50 is used, what will be the new
value of zero signal IC for the same RB ?[D]
7. Explain Fixed bias (base bias) method and derive the expression for stability factor. Discuss
the advantages and disadvantages of the circuit.[A]
b) Fig. below shows biasing with base resistor method. (i) Determine the collector current
IC and collector-emitter voltage VCE. Neglect small base-emitter voltage. Given that β =
50. (ii) If Rb in this circuit is changed to 50 kΩ, find the new operating point.
8. a)Explain Collector-to-base bias method and derive the expression for stability factor.
[A]Discuss the advantages and disadvantages of the circuit.
b) Fig below hows a silicon transistor biased by collector feedback resistor method.
Determine the operating point. Given that β = 100.
9. a) Explain about Voltage divider bias or emitter bias or self bias method and derive the
expression for stability factor. Discuss the advantages and disadvantages of the circuit
b) Determine the quiescent currents and the collector to emitter voltage for a silicon
transistor with β = 60 in the self- biasing arrangement . The circuit component values are
VCC = 20 V, RC = 2 K, Rl = 100 K, Re = 0.1 K, R2 = 5 K.[A]
10. Define compensation techniques. Discuss various compensation techniques using diodes and
transistors.
b) Calculate the values of three currents in the circuit shown in Figure below[A]
UNIT IV:
JUNCTION FIELD EFFECT TRANSISTOR-Construction, Symbol and Principle of
Operation of JFET, Pinch-Off Voltage, JFET Characteristics, Biasing of FET,Comparison of
BJT and FET, MOSFET characteristics (Enhancement and depletion mode)
1 Mark Questions:
1.
Compared to bipolar transistor, a JFET has
Ans: D
a) Lower input impedance
b) higher voltage gain
c) Higher input impedance and high voltage gain
d) higher input impedance and low
voltage gain
2.
Pinch-off voltage VP for an FET is the drain voltage at which
Ans: C
a) significant drain current starts flowing
b) drain current becomes zero
c) all free charges get removed from the channel
d) avalanche break down takes place
3.
In the voltage range, Vp < VDS < BVDSS of an ideal JFET or MOSFET
Ans: B
a) The drain current varies linearly with VDS. b) The drain current is constant.
c) The drain current varies nonlinearly with VDS.
d) The drain current is cut off.
It is the saturation region or pinch off region, and drain current remains almost constant at
its maximum
value, provided VGS is kept constant.
4.
N-channel FETs are superior to P-channel FETs, because
Ans: D
a) They have higher input impedance
b) They have high switching time
c) They consume less power
d) Mobility of electrons is greater than that
of holes
5.
For a JFET, when VDS is increased beyond the pinch off voltage, the drain current
Ans: C
a) Increases
b) decreases
c) remains constant.
d) First decreases and then increases.
At pinch off voltage drain current reaches its maximum off. Now if we further increase
VDS above Vp the depletion layer expands at the top of the channel. The channel acts as a
current limiter & holds drain current constant.
6.
Field effect transistor has
Ans: A
a) large input impedance.
c) large power gain.
b) large output impedance.
d) large votage gain.
7.
In a JFET, at pinch-off voltage applied on the gate,
Ans: D
a) the drain current becomes almost zero
b) the drain current begins to decrease
c) the drain current is almost at saturation value.
d) the drain-to-source voltage is
close to zero volts.
8.
The extremely high input impedance of a MOSFET is Primarily because of
Ans: C
a) Absence of its channel
b) Depletion of current carriers
c) Extremely small leakage current of its gate capacitor
d) Negative VGS
9.
JFET are normally used in ---a) Ohmic region
b) Saturation region c) cut-off region
d) Both a & b
At Pinch-off, Drain current becomes---------a) 0
b) ∞ (infinity)
c) constant
d) may be a & b
Output impedance of MOSFET is
a) 100M ohms
b) 10 ohms
c) 1K ohm
d) 5 k ohms
When the reverse bias between Gate & source increases, the pinch-off voltage becomes-----
10.
11.
12.
--
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
a) More
b) bias
c) not effected
d) first increase then
reduce
The relation between μ, rd and gm for JFET is
JFET can be used as .............................. resistor.
The Drain current of a FET is Given by ID= IDSS (1- (VGS/VP))2
For a FET μ= rd gm where gm =
Input impedance of MOSFET is very high due to _________ layer.
In enhancement MOSFET, source & drain are connected to n-doped regions via
___contacts.
Enhancement MOSFET is OFF when VGS=0
For an enhancement MOSFET, the value of VGS that causes significant increases in drain
current is called Thresh hold Voltage.
Circuit symbol for both n and p channel FET --------Circuit symbol for both n and p channel Enhancement MOSFET --------Circuit symbol for both n and p channel Depletion MOSFET --------Abbreviate MOSFET, IGFET and MOST.
JFET device has Higher input resistance compared to BJT and Lower input resistance
26.
27.
compared to MOSFET.
The purpose of swamping resistor rs connected in series with source resistance Rs
In common source (C.S) JFET amplifier is to reduce distortion.
The disadvantage of JFET amplifier circuit is _________________
TWO MARKS
1)
2)
3)
4)
5)
6)
Why FET is called unipolar device?
What are the important characteristics of FET?
Why we call FET as a voltage controlled device?
Explain the principle of MOSFET in depletion mode.
Draw the drain characteristics of depletion type MOSFET.
Sketch the circuit symbols for
i. n-channel JFET
ii.
p-channel JFET
7) Sketch the circuit symbols for
i. n-channel enhancement type MOSFET
ii.
p-channel
enhancement
type
MOSFET
iii. n-channel depletion type MOSFET and
iv.
p-channel depletion type MOSFET.
8) Draw the output characteristics of JFET.
9) Draw a voltage divider bias JFET circuit
10) Explain the principle of MOSFET in depletion mode. With neat sketches & o/p
characteristics.
5 Marks
11) Draw the drain characteristics of depletion type MOSFET. Explain clearly different operating
regions in
characteristics with proper reasoning.
12) Compare JFET and MOSFETs
13) Sketch the circuit symbols for
i. n-channel JFET
ii.
p-channel JFET
iii.
n-channel enhancement type MOSFET
iv.
p-channel enhancement type
MOSFET
v. n-channel depletion type MOSFET and
vi.
p-channel depletion type MOSFET.
14) Why FET is called unipolar device and is called as voltage operated device. What are the
important characteristics of FET.
15) Write about the broad classification of FET with neat circuit symbols
16) With a neat sketch, explain the construction of JFET with its output characteristics in
Enhancement mode.
17) With a neat sketch, explain the construction of JFET with its output characteristics in
depletion mode.
18) With a neat sketch, explain the drain - source & transfer characteristics of depletion type
MOSFET.
19) With a neat sketch, explain the drain - source & transfer characteristics of enhancement type
MOSFET.
20) Explain giving illustrative diagrams how the pinch-off condition occurs in a MOSFET.
21) List the important characteristics of FET and compare FET with BJT.
22) How should the gate-source junction of a JFET be biased? Explain how the potential applied
to this junction controls the drain current.
23) Draw a voltage divider bias JFET circuit and explain how the Q point is set in it.
24) For JFET ckt with voltage divider bias as shown below, calculate VG, VS, VD & VDS. If
VGS= -2V
25) For the circuit shown, find the values of VDS & VGS. Given ID=5mA, VDD=10V, RD=1K,
RS=500.
26) For the FET self biased circuit shown, calculate the values of RD and RS to obtain the bias
condition. The maximum drain current is 10mA and VGS= -2.2V at ID=5mA.
10 Marks
27) With a neat sketch, explain the construction of JFET with its V-I characteristics. [E]
28) With a neat sketch, explain the drain source characteristics & transfer characteristics of
enhancement and depletion type MOSFET. [E]
29) Compare JFET and MOSFETs & Sketch the circuit symbols for
i.
n-channel JFET
ii.
p-channel JFET
iii.
n-channel enhancement type MOSFET
iv.
p-channel
enhancement type MOSFET
v. n-channel depletion type MOSFET and vi.
p-channel depletion type
MOSFET.[A]
30) Compare BJT, JFET and MOSFET devices in all respects. [E]
31) What are the biasing schemes available to achieve the required bias in a JFET? Explain any
one of the biasing schemes with neat sketch of its dc equivalent model.[A]
UNIT-5 EDC Question Bank
1mark questions:
1. A CE amplifier has RL =10kΩ. Given hie =1kΩ, hfe=50, hre=0 and hoe= 1/40kΩ. What
is the voltage gain?
2. What is the typical value of the current gain of a common-base configuration?
3. An emitter-follower is also known as a………………….
4. A common-emitter amplifier has ________ voltage gain, ________ current gain, ________
power gain, and ________ input impedance.
5. What is the unit of the parameter ho?
6. For the common-emitter amplifier ac equivalent circuit, all capacitors are……
7. A common-collector amplifier has ________ input resistance, ________ current gain, and
________ voltage gain.
8. A BJT is a ________-controlled device.
9. There is a ________º phase inversion between gate and source in a source follower.
10. Which FET amplifier(s) has (have) a phase inversion between input and output signals?
11. For the common-emitter fixed-bias configuration, there is a ________ phase shift between
the input and output signals.
12. Draw small signal model of Common Drain amplifier.
13. A FET is a ________-controlled device.
14. The input and output signals are in phase in a ________ configuration.
15. Transconductance is the ratio of changes in ________.
16. why should the input impedance of an amplifier high?
17. Why should the output impedance of an amplifier low?
18.Which amplifier configuration has unity gain?
19. What happens to the overall gain when two amplifiers are cascaded
20. What is loading?
2marks questions:
1. The transistor in the amplifier shown bellow has following parameters: hfe=100, hie=2kΩ,
hoe=0.05m Mho. C is very large. Find output impedance?
\
2. Refer to this figure. Determine the value of Av.[D]
3. Refer to this figure. If Vin = 20 mV p-p what is the output voltage?[D]
4. Refer to this figure. If Vin = 1 V p-p, the output voltage Vout would be
[D]
5. calculate gm for a JFET having IDSS = 10 mA, VP = –5 V, and VGSQ = –2.5 V?
6. Referring to the following figure, calculate gm for VGSQ = –1.25 V.
[D]
7. Referring to this figure, find Zo if yos = 20
S.[D]
8. Refer to this figure. If gm = 4000 mS and a signal of 75 mV rms is applied to the gate,
calculate the p-p output voltage.
[D]
9. Chose the correct match for input resistance of various amplifier configuration shown
in bellow.
Configuration
Input Resistance
CB: Common base
LO: low
CC: Common Collector
Mo: Moderate
CE: Common Emitter
HI: High
10. For the BJT Q1 in the circuit shown bellow, β=α, VBE on=0.7V,VCE sat=0.7V. The
switch is initially closed. At what time ‘t’ at which Q1 leaves the active region is
[D]
5marks questions:
1. What is an amplifier? Explain the operation of Common Emitter amplifier with input and
output waveforms.[A]
2. Explain the operation of Common Base amplifier with input and output waveforms.[A]
3. Explain the operation of Common Collector amplifier with input and output waveforms.[A]
4. Derive the expressions for voltage gain, current gain, input impedance and output impedance
using h-parameter approximate model.[A]
5. Give the approximate h-parameter conversion formulae for CC and CB configuration in terms
of CE configuration.[D]
6.Compare Av,Ai,Zi and Zo of CE,CB and CC configurations.[D]
7. Give the advantages and disadvantages of h-parameter model.[A]
8. How to represent a transistor in h-parameter model.[A]
9. Draw the h-parameter equivalent circuits for Transistor amplifiers in the three
configurations.[D]
10. Explain the procedure to obtain the small signal model of FET.[A]
11. Derive the expressions for voltage gain, current gain, input impedance and output impedance
using small signal model for Common Drain amplifier.[A]
12. Derive the expressions for voltage gain, current gain, input impedance and output impedance
using small signal model for Common Gate amplifier.[D]
10 marks questions:
1.Derive the expressions for voltage gain, current gain, input impedance and output impedance
using h-parameter exact model.[A]
2.Find Ai,R i , Av, Avs , AIS and Ro for the following circuit. Given hje =1.1kΩ, hoe=25𝜇A/v,
hfe =50 and hre =2.5×10-7
[D]
3.For the common collector configuration, the transistor parameters are hic=1.2KΩ, hfc =-101,
hrc =1 and hoc=25μA/V. calculate Ri, Ai, AV, Avs , Ro for the circuit.
[A]
4.For the common base circuit, the transistor parameters are hib=22Ω, hfb=-0.98, hob=0.49μA/V,
hrb =2.9×10-4. Calculate the values of R i , Ro, AI, AV, Avs , Ro and R′o .
[A]
5.Explain the procedure to analyze FET amplifier using small signal model for
Self bias Common Source amplifier with bypass capacitor Cs
Self bias Common Source amplifier without bypass capacitor Cs
[D]
6.a) Draw the circuit diagram of Common Drain amplifier and derive expressions for
voltage gain and input resistance.
b) What are the values of ID and gm for VGS = -1.5V if IDSS and VP are given as 8.4mA
and – 3V respectively.
[A]
7.a) Draw the FET tree and draw circuit symbols for all types of FET.
b) Why we call FET as a Voltage Controlled Device.
c) What are the values of ID and gm for VGS = -0.8V if IDSS and VP are given as 12.4mA
and -6V respectively.
[A]
8. (a) Derive an expression for voltage gain, Input impedance and output impedance of
CG amplifier at low frequencies.
(b) In an N - channel JFET based voltage divider common drain configuration, determine
the value of resistor RS so as to have the operating point as IDQ = 5mA, VDSQ =10 V.
Given that VDD=28V, R1 =1 M ohms, R2=0.5 M ohms, saturation drain current of the
JFET is 10 mA and gate source pinch off voltage is `-5V'. [D]