RTAS 2011
Overview
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0
Goal
Switch mode power supplies (SMPS)
Real-Time
Energy
Optimization
Systems
Embedded
Systems
0 Real-time scheduling
0 Our work
Energy
Optimization
Switching
Power
Supplies
Application Domain -
Embedded Systems
Goal
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Reduce power and energy used by embedded computing systems in a cost-effective way
Basics
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Two parts: Static and dynamic
P = S
P
V
CC
2 + C
Power a V 2
P
V
CC
2 f
Clock
0
0 Energy is power * time
Competing pressures for energy optimization
0 Shut off unused subsystems
When running, run as fast as possible to minimize static power (must raise supply voltage to speed up clock)
0 When running, use minimum voltage which supports logic’s clock frequency
Switching Power Converters
0 Function
0 Efficient conversion of voltage up (boost) or down
(buck), or both (buck-boost)
0 Benefits
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Can run circuitry at lowest feasible voltage
Can scale voltage dynamically as needed to support changing clock speed
Battery voltage variations across discharge curve do not affect operating point of circuit
SMPS Extends Battery Life
9.00
8.50
8.00
7.50
7.00
6.50
6.00
5.50
5.00
4.50
4.00
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40
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120
160
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520
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680
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840
880
920
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1000 1080
1040 1120
Hours battery Linear SMPS
Boost Converter Operation
0 Switch (transistor) S turns on
0 Current starts flowing through inductor L and S
0 Switch S turns off
0 Current flowing through
L now goes through diode to charge C and power load
Switching Converter
Challenges
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Low-frequency “noise” at switching frequency.
0 Easy to remove with capacitors
High-frequency “noise” at harmonics of switching frequency.
0 Reaches circuit in three ways: conducted, reflected, radiated
0 Very sensitive to PCB layout: trace length, capacitor placement
0 Can be 100 mV
More on Harmonics
0 “Unconscionable amounts of bypass capacitors, ferrite beads, shields, Mumetal and aspirin have been expended in attempts to ameliorate noiseinduced effects.” [Jim
Williams, Linear
Technology
Application Note 70]
Reducing Harmonics
0 Methods
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Redesign PCB and test. Repeat until acceptable
Use high-quality (expensive) capacitors
Limit slew rate of switches, use sinusoidal drive
Change to balanced topology
Insert inverse of harmonic
0 Drawbacks
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More complex hardware design raises cost, size, mass
Some methods reduce efficiency
System Schedule and Noise
Real-Time System Analysis
0 Problem statement
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We have a system of periodic software tasks running on a processor
How do we make sure all tasks meet their deadlines (are
schedulable)?
0 Approaches
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Use response-time analysis
0 When does the last task finish in the worst case?
Use a utilization-based test
0 How much of the processor’s time could we use?
Real-Time System Model
0 Assumptions
0 Single CPU
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0
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T
ContextSwitch
= 0 tasks are periodic with period t i
Deadline D i period t i
=
No data dependencies between tasks
0 Constant process execution time T i
Burns & Welling
Scheduling Approaches
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Dimensions to task scheduling
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Static vs. dynamic task ordering
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Preemptive vs. non-preemptive
Prioritized vs. non-prioritized
0 Fixed vs. dynamic priority
Common scheduling approaches for real-time systems
Dynamic task ordering
Preemption among tasks
0 Priority assigned based on
0 Task frequency (“rate monotonic”, RM), or
0 Deadline frequency (“deadline monotonic” DMS), or
0 Earliest deadline first (EDF)
Utilization-Based
Schedulability Tests
0 Utilization: Fraction of time processor is busy
U
i m
1
T i t i
0 Easy for EDF: Schedulable if U < 100%
0 Harder for RMS/DMS
0
U
Schedulable if utilization U < U max
Max
m
2
1 / m
1
1
0.8
0.6
0.4
0.2
0
0 10 20
Number of Tasks
30 40
Our Contributions
0 Goal
0 Ensure that noisy SMPS will not switch while a noisesensitive task is running
0 Make-and-Take Approach
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Put the SMPS under control of the task scheduler
Enhance the real-time scheduling model math to include
SMPS activity
Task Scheduler Controls SMPS
Get ready task T i
Stop SMPS, measure V supply
Restart SMPS
Yes
Is V supply
> V
Threshold,i
?
No
Is task T i rivalrous with SMPS?
No
Yes Wait until
V supply
> V
Threshold,i
Stop SMPS
Run task T i
Real-time Model Updated
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Start with execution time T i for each task i
Add in time if needed to run power supply to charge capacitor
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For non-rivalrous tasks, T i
* = T i
For rivalrous tasks, T i
* = T i
+ T
SMPS,i
0 Simple yet remarkably powerful
Experimental Evaluation
0 Build a system and see …
Hardware
0 QSK62P MCU board
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16-bit, 24 MHz, 32K
SRAM, 64K ROM
3-5V operation
0 Boost converter
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Dirt-Cheap Valueengineered
450 kHz switching freq.
3.7 V input (Lithium cell)
0 Spec: 3.8 V to 4.8 V V supply
Application Software
0 Tasks t
1
-t
3 sample analog values (pressure, temperature, audio) and are sensitive to SMPS noise
0 Add in corresponding SMPS active time requirement
0 Task t
4 transmits data out UART, is not sensitive
Schedulability Analysis
0 Use rate-monotonic priority ordering, preemptive fixed-priority scheduling
0 Utilization test
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Initial task set: U = 0.050
After adding SMPS: U* = 0.128
Utilization bound for RMS = 0.766
0 So system is schedulable and will never miss a deadline
Mutual Exclusion Enforced
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T1* ready to run after T3*, but V supply
So SMPS runs first, then T1 runs is too low
V supply is low, so scheduler turns it on and can also run T4
Task Released While SMPS On
0 T2* ready to run, but SMPS is running
0 Scheduler measures V supply decides it is high enough to shut off SMPS and run T2* to completion
SMPS Idle When Not Needed
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Scheduler runs when task T3* is released
Determines V supply high enough to run T3* without SMPS
Future Work
0 Tighten up utilization bound
0 Enable more overlap of SMPS operation with noiseinsensitive tasks
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Enhance scheduler
Tighten up schedulability model
Support buck conversion
0 Support multiple voltage domains
Conclusions
0 Practical to use real-time scheduling to enable use of noisy power converters in noise-sensitive applications without adding hardware
Thank you!
0 alex_dean@ncsu.edu
0 http://www.cesr.ncsu.edu/agdean
Appendix
1 - Task Scheduler Controls SMPS
Flowchart of task scheduler
SMPS Allows Low-Voltage
Operation
0 Different Minimum Voltages
Supporting Preemptive vs.
Non-preemptive