Exp.No:01
PHASE SHIFT KEYING
AIM:
Study the operation of PSK (Binary) Modulation & Demodulation and to plot the PSK wave
forms for Binary data at different frequencies.
APPARATURS:
1. Phase Shift Keying trainer
2. Dual trace Oscilloscope
3. Digital multi meter
4. Patch chords
BLOCK DIAGRAM:
Fig.1.1 PSK Demodulator
1
Fig.1.2 PSK Demodulator
THEORY:
Phase Shifting Keying (PSK) is a modulating / Data transmitting technique in which phase of the
carrier signal is shifted between two distinct levels. In a simple PSK (i.e. Binary PSK) un shifted
carrier Vcos W˳t is transmitted to indicate a 1 condition, and the carrier shifted by 180º i.e-Vcos
W˳t is transmitted to indicate a 0 condition. Wave forms are shown in Figure PSK Modulating &
Demodulating circuitry can be developed in number of ways, one of the simple circuit is used in
this trainer.
PROCEDURE:
1. Study the THEORY of operation.
2. Connect the trainer to mains and switch on the power supply.
3. Measure the output of the regulated power supply ie. +5V and -5V with the help of digital
multimeter.
4. Observe the output of the carrier generator using CRO, it should be an 8 KHz Since with 5
Vpp amplitude.
5. Observe the various data signals (1KHz, 2KHz and 4KHz) using CRO.
Modulation:
6. Connect carrier signal to carrier input of the PSK Modulator.
7. Connect data signal say 4 KHz from data source to data input of the modulator.
8. Keep CRO in dual mode.
2
9. Connect CH1 input of the CRO to data signal and CH2 to the output of the PSK modulator
10. Observe the PSK o/p signal with respect to data signal and plot the wave forms Compare the
plotted waveforms with given wave forms.
Demodulation:
11. Connect the PSK output the PSK input of the demodulator.
12. Connect carrier to the carrier input of the PSK demodulator
Note: In actual communication system reference carrier is generated at receiver.
13. Keep CRO in dual mode.
14. Connect CH1 to the data signal (at Modulator) and CH2 to the output of the demodulator.
15. Compare the demodulated signal with original data signal, By this we can notice that there
is no loss in modulation and demodulation process.
16. Repeat the steps 7 to 15 with different data signals i.e 2KHz and 1KHz.
3
Figure 1.3 PSK wave forms for different data input signals
4
Exp.No:02
DIFFERENTIAL PHASE SHIFT KEYING
AIM:
Study the characteristics of differential phase shift keying
APPARATUS:
1. Differential Phase Shift Keying Kits.
2. CRO (20MHz).
3. Digital multimeter.
4. No’s of coaxial cables (standard accessories with trainer).
BLOCK DIAGRAM:
Fig. 2.1 DPSK Modulator
5
Fig. 2.2 DPSK Demodulator
THEORY:
DPSK: Phase Shift Keying requires a local oscillator at the receiver which is accurately
synchronized in phase with the un-modulated transmitted carrier, and in practice this can be
difficult to achieve. Differential Phase Shift Keying (DPSK) over comes the difficult by combining
two basic operations at the transmitter (1) differential encoding of the input binary wave and (2)
phase shift keying hence the name differential phase shift keying. In other words DPSK is a
noncoherent version of the PSK.
The differential encoding operation performed by the modulator is explained below Let b (t) be
the binary message to be transmitted. An encoded message stream b(t) is generated from b’(t) by
using a logic circuit The first bit in b(t) does not change its value fig 1.4 shows two possible bit
streams b(t) and the respective phases. In the first bit stream, the initial bit (arbitrary) is 1 and in the
6
second bit stream, the initial bit is 0 EX-NOR gate can be used to perform this operation as its
output is a 1 when both the input are same, and a 0 when the inputs are different.
DPSK Demodulator:
The DPSK modulator. This consist of PSK modulator and differential encoder.
PSK Modulator:
IC CD 4052 a 5 channel analog multiplexer and is used as an active component in this circuit. One of the
control signals of 4052 is grounded so that 4052 will act as a two channel multiplexer and other control is
being connected directly to CH1 and carrier shifted by 180º is connected to CH2. Phase shift network is a
unity gain inverting amplifier using Op-amp (TL0840).
When control signal is at high voltage, output of the 4052 is connected to CH1 and un shifted (or 0 phase)
carrier is passed on to output. Similarly when control signal is at zero voltage output of 4052 is connected to
CH2 and carrier shifted by 180º is passed on to output.
Differential encoder: This consists of 1 bit delay circuit and X-NOR Gate. 1 bit delay circuit is formed by
a D-Latch. Data signal i.e, signal to be transmitted is connected to one of the input of the X-NOR other one
being connected to out of the delay circuit. Output of X-NO R gate and is connected to control input of the
multiplexer (IC 4952) and as well as to input of the D-Latch. Output of the X-NOR gate is 1 when both the
inputs are same and it is 0 when both the inputs are different.
DPSK Demodulator:
The DPSK Demodulator. This consists of 1 bit delay circuit, X-NOR gate and a signal
shaping circuit. Signal shaping circuit consists of a Op-amp based zero crossing detector followed
by a D-latch. Receiver DPSK signal is converted to square wave with the help of zero crossing and
this square wave will passed through the D-latch. So output of the D-latch is an encoded data. This
encoded data is applied to 1 bit delay circuit as well as to one of the inputs of X-NOR gate. And
output of the delay circuit is connected to another input of the X-NOR gate. Output of the X-NOR
gate is 1 when both inputs are same and it is 0 when both the inputs are different.
7
PROCEDURE:
Modulation:
1. Connect carrier signal to carrier input of the PSK Modulator.
2. Connect data signal from data input of the X-NOR gate.
3. Keep CRO in dual mode.
4. Connect CH1 input of the CRO to data signal and CH2 input to the encoded data (which is
nothing but the output of the X-NOR gate)
5. Observe the encoded data with respect to data input. The encoded data will be in a given
sequence.
Actual data signal : 10101101001010110100
Encoded data signal: 011000211011001110010
6. Now connect CH2 input of the CRO to the DPSK output and CH1 input to the encoded data.
Observe the input and output waveforms and plot the same.
7. Compare the plotted waveforms with the given waveforms in fig: 1.3 Note: Observe and
plot the waveforms after perfect triggering. Better to keep the encoded data more than 4
cycles for perfect triggering.
Demodulation:
1. Connect DPSK signal to the input of the signal shaping circuit from DPSK transmitter with
the help of coaxial cable (supplied with trainer).
2. Connect clock from the transmitter (i.e. DPSK Modulator) to clock input of the 1 bit delay
circuit using coaxial cable.
3. Keep CRO in dual mode. Connect CH1 input to the encoded data (at modulator) and CH2
input to the encoded data (at demodulator).
4. Observe and plot both the waveforms and compare it with the given waveforms. You will
notice that both the signals are same with one bit delay.
5. Keep CRO in dual mode. Connect CH1 input to the data signal (at modulator) and CH2
input to the output of the demodulator.
8
6. Observe and plot both the waveforms and compare it with the given waveforms. You will
notice that both the signals are same with one bit delay.
7. Disconnect clock from transmitter and connect to local oscillator clock (i.e., clock generator
output from De Modulator) with remaining setup as it is. Observe demodulator output and
compare it with the previous output. This signal is little bit distorted. This is because lack of
synchronization between clock at modulator and clock at demodulator. You can get further
perfection in output waveform by adjusting the locally generated clock frequency by
varying potentiometer.
Fig: 2.3 DPSK Wave Form
9
Exp No: 03
FREQUENCY SHIFT KEYING
AIM:
Study the operation of FSK modulation & Demodulation and to plot the FSK wave forms
for Binary data at different frequencies.
EQUIPMENT REQUIRED:
1 .Frequency Shift Keying system trainer
2 .Dual trace Oscilloscope
3 .Digital multimeter
4 .Digital frequency counter
THEORY:
Frequency Shift Keying (FSK) is a modulation/ Data transmitting technique in which
carrier frequency is shifted between two distinct fixed frequencies to represent logic 1 and
logic 0. The low carrier frequency represents a digital 0 (space) and higher carrier frequency is
a 1 (mark). FSK system has a wide range of applications in low speed digital data
transmission systems. Wave forms are shown in Fig 3.3. FSK Modulating & Demodulating
circuitry can be developed in number of ways, familiar VCO and PLL circuits are used in this
trainer. Fig 3.1 and Fig 3.2 shows the FSK modulator and demodulator respectively.
FSK Modulator:
Fig 3.1shows the FSK modulator using IC XR 2206. IC XR 2206 is a VCO based
monolithic function generator capable of producing Sine, Square, Triangle signals with AM
and FM facility. In this trainer XR2206 is used generate FSK signal. Mark (Logic 1) and
space (logic 0) frequencies can be independently adjusted by the choice of timing
potentiometers F0 & F1. The output is phase continuous during transitions. The keying
signal i.e. data signal is applied to pin 9.
10
Fig3.1 FSK Modulator using XR2206
FSK Demodulator:
Fig 3.2 shows FSK Demodulator, is a combination of PLL (LM565) and comparator (Opamp). The frequency-changing signal at the input to the PLL drives the phase detector to
result in rapid change in the error voltage, which is applied to the input of the comparator. At
the space frequency, the error voltage out of the phase detector Is below the comparison
voltage of the comparator. The comparator is a non-inverting circuit, so its output level is also
low. As the phase detector input frequency shifts low (to the mark frequency), the error
voltage steps to a high level, passing through the comparison level, causing the comparator
output voltage to go high. This error voltage change will snap the comparator output voltage
between its two output levels in manner that duplicates the data signal input to the XR2206
modulator.
The free running frequency of the PLL (no input signal) is set midway between the mark and
space frequencies. A space at 2025 Hz and mark at 2225 Hz will have a free running VCO
frequency of 2125 Hz.
11
Fig3.2 FSK Demodulator using LM565
12
Fig3.3 FSK Waveforms
PROCEDURE:
1. Study the THEORY of operation.
2. Connect the trainer to mains and switch on the power supply.
3. Measure the output voltage of the regulated power supply i.e. +12V with the help of digital
multimeter.
4.Verify the operation of the logic source using digital multimeter. Output should be zero volts
in Logic 0 position and 12V in logic 1 position.
5.Observe the output of the data signal using Oscilloscope. It should be a square wave of 20
Hz to 180 Hz @ 10Vpp. (For frequency variation potentiometer is provided).
13
FSK Modulation:
1.Connect output of the logic source to data input of the FSK Modulator.
2.Set logic source switch in 0 position.
3.Connect FSK modulator output to Oscilloscope as well as frequency counter.
4.Set the output frequency of the FSK modulator as per your desire(say 1.2 KHz) with the
help of control F1 which represents logic 1.
5.Set logic source switch in position.
6. Set the output frequency of the FSK modulator as per your desire (say 2.4 KHz) with the
help of control F1 which represents logic 1.
NOTE: We have chosen F0 as 1.2 KHz and F1 as 2.4 KHz for ease of operation, in fact
you may set any value.
8.
Now connect data input of the FSK modulator to the output of the data signal
generator.
9.
Keep CRO in dual mode connect CH1 input of the oscilloscope to the input of the
FSK modulator and CH2 input to the output of the FSK modulator.
10.
Observe the FSK signal for different data signal frequencies and plot them. By this
we can observe that the carrier frequency is shifting between two predetermined frequencies
as per the data signal i.e. 1.2 KHz when data signal is 0 and 2.4 KHz when data input is 1 in
this case.\
11.
Compare these plotted wave forms with the theoretically drawn in fig 3.3.
FSK Demodulation:
12.
Again connect input of the FSK modulator to the logic source and put data source
switch in 0 position.
13.
Connect the frequency counter to the output of the FSK modulator output.
14.
Set FSK output frequency to 2025 Hz with the help of F0 control.
14
15.
Now put data source switch in 1 position and set the FSK output frequency to 2225
Hz with the help of F1 control without disturbing the F0.
NOTE: As per one of the standards, for proper demodulation of FSK signal the F0 should be
2025 Hz and F1should be 2225 Hz.
16.
Disconnect the FSK input of the modulator from logic source and connect to the data
signal generator.
17.
Observe the output of the modulator using CRO and compare them with given
waveforms in figure 1:3.
18.
Now connect the FSK modulator output to the FSK input of the demodulator.
19.
Connect CH1 input of the Oscilloscope to the data signal at modulator and CH2
input to the output of the FSK demodulator (keep CRO in dual mode).
20.
Observe and plot the output of the FSK demodulator for different frequencies of data
signal. Compare the original data signal and demodulated signal; by this we can observe that
there is no loss in process of FSK modulation and demodulation.
15
Exp.No:04
QUADRATURE PHASE SHIFT KEYING
AIM:
Study the operation of PSK (Binary) modulation & Demodulation and to plot the PSK
wave forms for Binary data at different frequencies.
EQUIPMENT REQUIRED:
1.
QUADRATURE Phase Shift Keying trainer kit.
2.
Dual trace Oscilloscope
3.
Digital multi meter
THEORY:
Quadrature phase shift keying (QPSK) and binary phase shift keying (BPSK)
modulators are used to change the amplitude, frequency, and/or phase of carrier signal in order to
transmit information. QPSK devices modulate input signals by 0º,90º,180º and 270º phase shifts.
BPSK devices modulate input signals by 0º and 180º phase shifts. Both QPSK modulators and
BPSK modulators are used in conjunction with demodulators that extract information from the
modulated, transmitted signal. Some QPSK modulators and BPSK modulators include an integral
dielectric resonator oscillator. Others are suitable for military of wireless applications. QPSK
modulators and BPSK modulators with root raised cosine (RRC) and Butterworth filters are also
available.
Performance specifications for QPSK modulators and BPSK modulators include input
carrier frequency, insertion loss, amplitude unbalance, phase unbalance, and voltage standing wave
ratio. Insertion loss is the total RF power transmission loss through the device. Amplitude
unbalance, phase transmission loss through the device. Amplitude unbalance is the different in
power between the I output signal and the ! output signal. Phase unbalance is the deviation from 90º
of the phase angle difference of the I and Q output signals. Voltage standing wave ratio (VSWR) is
a unit less ratio ranging from 1 to infinity that expresses the amount of reflected energy passes
16
through. Any other value indicates that a portion of the energy is reflected. Other performance
specifications for QPSK modulators and BPSK modulators include frequency range, return loss,
and reflected power.
Phase Shift Keying (PSK) is a modulation/Data transmitting technique in which phase of
the carrier signal is shifted between two distinct levels. In a simple PSK ( i.e. Binary PSK) un
shifted carrier Vcos W˳t is transmitted to indicate a 1 condition, and the carrier shifted by 180º i.e –
V cos W˳t is transmitted to indicate as 0 condition. Wave forms are shown in Fig 4.3. PSK
Modulating & Demodulating circuitry can be developed in number of ways, one of the simple
circuit is used in this trainer.
PSK Modulator:
Fig 4.1 shows the PSK modulator. IC CD 4052 is a 4 channel analog multiplexer and is
used as an active component in this circuit. One of the control signals of 4052 is grounded so that
4052 will act as a two channel multiplexer and other control is being connected to the binary signal
i.e data to be transmitted. Un shifted carrier signal is connected directly to CH1 and carrier shifted
by 180º is connected to CH2. Phase shift network is a unity gain inverting amplifier using Op-amp
(TL084).
When input data signal is 1 i.e. control signal is at high voltage, output of the 4052 is
connected to CH1 and un shifted (or 0 phase) carrier is passed on to output. Similarly when data
signal is 0 i.e. control signal is at zero voltage output of 4052 is connected to CH2 and carrier
shifted by 180º is passed on to output.
PSK Demodulator:
Demodulation of PSK is achieved by subtracting the received carrier from a derived
synchronous reference carrier of constant phase. Fig 4.2 shows the simple coherent (synchronous)
PSK demodulator.
Received PSK signal is converted to square wave using an Op-amp (TL084) based zero
crossing detector and connected to EX-OR circuit. The derived reference carrier is connected to
other input of the EX-OR gate through an Op-amp based zero crossing detector. For the simplicity
17
same carrier is used at receiver as reference carrier( Note: In practical communication system
reference carrier is generated at receiver). We can observe the exact operation of demodulator with
the help of wave forms at various nodes in the circuit.
Experimental PROCEDURE:
1.
Study the THEORY of operation.
2.
Connect the trainer to mains and switch on the power supply.
3.
Measure the output of the regulated power supply i.e. +5V and -5V with the help of
digital multimeter.
4.
Observe the output of the carrier generator using CRO, it should be an 8 KHz Since with
5 Vpp amplitude.
5.
Observe the various data signals (1KHz, 2KHz and 4KHz) using CRO.
Modulation:
6.
Conncet carrier signal to carrier input of the PSK Modulator.
7.
Connect data signal say 4 KHz from data source to data input of the modulator.
8.
Keep CRO in dual mode.
9.
Connect CH1 input of the CRO to data signal and CH2 to the output of the PSK
modulator.
10.
Observe the PSK o/p signal with respect to data signal and plot the wave forms.
Compare the plotted waveforms with the given wave forms.
Demodulation:
11.
Connect the PSK output to the PSK input of the demodulator.
12.
Connect carrier to the carrier input of the PSK demodulator.
Note: In actual communication system reference carrier is generated at receiver.
13.
Keep CRO in dual mode.
14.
Connect CH1 to the data signal (at modulator) and CH2 to the output of the
demodulator.
18
15.
Compare the demodulated signal with the original data signal. By this we can notice that
there is no loss in modulation and demodulation process.
16.
Repeat the steps 7 to 15 with different data signals i.e. 2KHz and 1KHz.
Fig4.1 PSK modulator
Fig4.2 PSK demodulator
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Exp No: 05
16-QAM MODULATOR AND DEMODULATOR
AIM:
Study the operation of 16-QAM modulation and demodulation and to plot the 16-QAM
waveforms for different ampitues.
APPARATUS:
1. 16-QAM trainer kit
2. CRO
THEORY:
QAM Transmitter (Modulator):
Observe the block diagram and follow the arrows to understand flow of data with control. The
panel consists of high speed ADC, Latch, mux, modulation control i/p bits & QAM modulator
logic. The Analog Input is sampled using ADC and the value is latched. Based on the setting of
SW3 either ADC latched data bits are used to modulate I or Q Sin waves or switches SW 8,2,5,4
are used to modulate the same. Quadrature amplitude modulation takes place in the QAM
modulator block which mainly consist digital of signed adder of two phase shifted (modulated)
quadrature Sin waves (90º apart) in digital form followed by scaling circuit
20
Fig: 5.1 Block diagram of 16-QAM
Fig 5.2: Construction of Sin Wave using 12 equidistant values
21
How to create two phase shifted Sin waves using lookup table?
SIN Lookup (12 values)
Fig 5.3: Generation of 12 Point Sin Wave
Val n= 3F Sin (n ) + 40h where 0≤ n ≤11 & =30º
Using ubiquitous registers available in FPGA/CPLD, a 12 point Sin lookup table is constructed
which is continuously addressed using modulo 12 counter. Thus stored values of Sin; which are 7
bit unsigned integers (00 to 7F); are continuously output to binary adder. COS wave is nothing but
same lookup table but with different starting point (90º phase shifted) begins at
value stored.
Thus instantaneous digital values of Sin & COS are output as 7 bit binaries. These are amplitude
modulated using two data bits per axis. Here (A, A/2, -A/2, -A), end point being simpler cases.
Obviously scaling will be needed after addition of two integers divide by 2 to scale down 8 bit
result into 7 bit to obtain values commensuration with 7 bit ADC output.
22
Fig 5.4: Flow Chart For 16-Qam Demodulation
QAM Receiver (Demodulator):
The right portion of block diagram consists of amplitude and phase detector logic, decoder, latch,
mux & DAC. QAM demodulator contains comparator computing amplitude and phase of incoming
QAM wave in comparison to reference TTL wave of Sin (I). Following the flow chart, 5 bits of
modulating data bits are identified after the comparison & are output for latching. Based on the
setting of SW3, either QAM modulator output is directly sent to mux or demodulator output i.e. 2
23
sets of 5 bits consecutively latched are output to mux. The mux will drive DAC whose output may
be observed on CRO channel. Therefore you can understand how 16QAM modulation output is
generated for experimental verification of figure 2 by comparing this Sin wave with Sin(I) TTL
reference, or by actually transmitting & receiving voice using 16QAM modulation-demodulation
and onboard CODEC.
Timing Diagram:
A basic clock frequency of 660 KHz to 1200 KHz (however factory set to 1200KHz) driving ADC
may be observed at TP1. After modulo 12 counter to construct 12 point Sin, a 55 KHz digital Sin &
COS waves are generated represented by Sin(I) TTL wave at socket 12. Apply ADC sample’s
lower 4 bit of data first & then higher 4 bit of data. So it requires total 32 cycle/sample of TTL
wave. Thus theoretically sampling frequency becomes 1.72 KHz. Based on the Shannon’s sampling
theorem sampling frequency should be greater than or equal to twice of modulation frequency. Thus
it can modulate up to 800Hz. Only
NOTE: You have to appreciate that though Shannon’s law permits upto
frequency, in practice best results are found around
the sampling
of sampling frequency i.e. 200-300-Hz..
Observe following Timing waveform to understand the relationship.
PROCEDURE:
1. Connect +12V, GND, -12V from MU to socket 1, 2 & 3 resp.
2. Keep SW3 in downward position to reconstruct CRO observable wave of 16 QAM
demodulation O/P.
3. Connect DAC o/p (socket 16) to channel 1 of CRO. Keep CRO channel 1 on 2V &
10us/Div.
4. Connect Reference o/p (TTL wave-socket 12) to channel 2 of CRO. Keep CRO channel 2
on 2V, 10us/Div & trigger this channel to observe phase shift in modulated wave.
5. Keep SW6 in downward position i.e. filter o/p is ON.
6. Set the i/p using SW8, 7, 5, 4. Observe phase & amplitude change in modulated carrier
wave.
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7. Observe phase count on LED L6 to L2.
8. To observe waveforms on DSO, trigger the channel where the TTL wave (socket 12) is
connected. So that you can measure phase shift change in modulated output.
9. Phase change can be measured from the zero crossing of the 16 QAM wave in positive
direction to the next falling edge of REF signal. Thus incoming audio sin is sampled using A
TO D, thus obtained data bits are used to modulate carrier sin such that its amplitude &
phase changes w.r.t. reference TTL wave. As in FM OR AM analog mod technique, you do
not expect to see original modulating sin signal/voice in any form except as agent change
phase amplitude relationship of carrier sin w.r.t. to reference TTL wave. This is a digital
modulation technique where you can only see data bits in action at modulator O/P eg. Check
PCM modulation O/P on CRO
10.Following above, fill table and plot constellation diagram in Excel in polar format (r<0)
using (r) amplitude observe on CRO & observed phase shift . Or Plot constellation diagram in
Cartesian format using X & Y component as filled in table. Refer table 12.5 & its wiring
schedule.
Phase count measurement: After the zero crossing of Sin wave counter starts incrementing till
the next falling edge of the TTL wave. That count is nothing but phase count which is displayed
on LED L6 (MSB) to L2 (LSB).
Fig 12.10: Phase Shift Measurement
Conclusion: 1) Within practical limits on resolution due to frequency of sampling, the
constellation diagram based on lab measurement tallies well with theoretical diagram as given if
Fig.2. You may have to draw by hand vectors connecting origin to even plotted point on
constellation diagram.
2) Modulated QAM O/P is nothing but same original carrier but phase shifted depending upon
data bits (4 here) selected from incoming audio after A to D.
25
OUTPUT:
Fig 5.6 16 QAM waveforms
26
Fig5.7 Observation for 16-QAM
27
Exp No: 06
NOISE GENERATOR & MATCHED FILTER
AIM:
Study and implementation of matched filters
THEORY:
Correlation receivers as matched-filter receivers:
Realizing a matched-filter whose impulse response has to be matched with the received
waveforms is difficult. However, there is a widely used structure for matched filter detection.
Which can easily be realized. This structure is referred to as ‘correlation receiver’. In the
floolowing, we show that a correlation receiver is a matched filter receiver for wideband systems.
Let si (t) be the signal plus noise at the input to a matched filter receiver shown
Figure 6.1 A matched filter receiver
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The matched-filter output signal may be written as:
The sampled output signal is then given by:
Since
Then
This result can be implemented by a correlation receiver as illustrated in Fig 6.1 the received
signal si(t) is multiplied by a locally generated waveform s2(t)-s1(t). The output of the multiplier is
passed through an integrator and then sampled at the end of each symbol. Finally, the threshold
comparator gives logic state ‘1’ or ‘2’ depending on whether the sampled value is larger or smaller
than a specific threshold level. At the beginning of each new symbol all the energy stored in the
integrator must be discharged by a dump circuit.
29
Fig 6.2 A correlation receiver
The Noise generator & matched filter consist of following sections.
1. Digital Data Generator section
2. Pulse Generator
3. Gaussian Noise Generator
4. Communication Channel Noise Adder
5. Integrated & Dump Filter
6. Comparator Section
7. Power supply section
(1) Digital Data Generation:(2) Pulse Generator:This section generates different line coding of baseband data s e.g. NRZ, Bipolar NRZ, RZ and
Bipolar RZ.
(3) Gaussian noise Generator:Four-transistor circuit is used to generate Gaussian noise signal. The amplitude pot varies its
amplitude from 0 to 1V rms.
30
(4) Communication Channel Noise Adder:This section adds NRZ Baseband data and Gaussian noise signal. The output is baseband signal.
(5) Integrated & Dump filter (Matched Filer):This section integrates the noisy baseband signal and then it is dumped at bit clock interval at the
output. The output is maximized at bit sampling pulse. Hence it removes noise and output is
maximum.
(6) Comparator Section:This section converts integrated output of Matched filter into pure recovered data using
comparator IC 311.
(7) Power supply Section:The regulated power supply is used for different supply voltages.
Following output D.C. Voltages are required to operate the trainer.
+15V, 250mA,
-15V, 250mA,
+5V, 250mA,
-5V, 250mA,
Three terminal regulators are used for different output voltages i.e. IC 7805 +5V, IC 7815 for
+15V, IC 7915 for -15V, 7905 for -5V
These ICs are supplied different dc input voltages by two Bridge rectifiers consisting of D1-D4
and D5-D8 & two 1000/25 EC and 1000/10 EC. The capacitors at each input & each output are for
filtering purpose.
31
PROCEDURE:
1.
Connect CRO Channel-1 at Carrier clock socket and observe it. waveform
(T1)
2.
Connect CRO Channel-1 at Bit Clock (Bk) socket and observe it. waveform
(T2)
3.
Connect CRO Channel-1 at Word Clock (Bk) socket and observe it.
waveform (T3)
4.
Connect CRO Channel-1 at NRZ DATA (NRZ) socket and observe it.
waveform (T4)
5.
Observe NRZ, Bipolar NRZ, RZ, Bipolar RZ signals. waveform (T5 to T8)
6.
Connect CRO channel-1 at Gaussian noise output and observe it. Keep
noise level at minimum. waveform (T9)
7.
Observe noisy baseband NRZ signal at o/p of noise adder section.
waveform (T10)
8.
Observe raw data signal at output of matched filter. waveform (T11)
9.
Observe received pure NRZ data at the output of comparator. waveform
(T12)
10.Now add Gaussian noise by rotating noise level pot and observe its effect on all received
signals.
Conclusion:The detection of baseband signal in the presence of noise understood.
32
TEST POINT WAVEFORMS
33
34
35
SIMULATION
36
Exp No: 01
GENERATION OF VARIOUS FUNDAMENTLAL/STANDARD SIGNALS
AIM: To write a MAT LAB Program to generate various fundamental signals
Software Used: MATLAB 7.9.0.529 (R2009b)
Contents
- Closing and clearing comments
-Calculations
-Plotting various signals
- Results
% Standard signals generation
% Closing and clearing comments
clc;
close all;
clear all;
% Calculations
n=-30:1:30;
x1=(n==0);
x2=(n>=0);
x3=n.*(n>=0);
x4=n.^2.*(n>=0);
t=0:.001:0.5;
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x5=2*cos(2*pi*15*t);
x6=3*square(2*pi*15*t);
x7=4*sawtooth(2*pi*15*t);
x8=4*sawtooth(2*pi*15*t, 0.5);
x9=3*randn(1,200);
w=linspace(-5,5);
x10=sinc(w);
% Plotting various signals
subplot(4,2,1);
stem(n,x1);
title('Unit Impluse Signal');
subplot(4,2,2);
stem(n,x2);
title('Unit Step Signal');
subplot(4,2,3);
stem(n,x3);
title('Unit Ramp Signal');
subplot(4,2,4);
stem(n,x4);
title('Unit Parabolic Signal');
subplot(4,2,5);
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plot(t,x5);
title('Cosinusoidal Signal');
subplot(4,2,6);
plot(t,x6);
title('Square Wave Signal');
subplot(4,2,7);
plot(t,x7);
title('Sawtooth Waveform');
subplot(4,2,8);
plot(t,x8);
title('Triangular Waveform');
figure;
subplot(1,2,1);
plot(x9);
title('Random Signal');
subplot(1,2,2);
plot(x10);
title('Sampling Signal');
39
40
41
Exp No:02
IMPLEMENTATION OF THE MATCHED FILTER FOR THE GIVEN SIGNAL
AIM: To write a MAT LAB Program to implement a Matched Filter for a given signal
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
. Closing and clearing all
.Programming
.Plotting the graphs
.Graphs
%Closing and Clearing Comments
clear all;
close all;
clc;
%Program
n=0:0.1:1;
x=n;
h=fliplr(x);
y=conv(x,h);
%Plotting the graphs
subplot(3,1,1)
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plot(n,x)
xlabel('n')
ylabel('x(n)')
title(' Input signal ');
grid
subplot(3,1,2)
plot(n,h)
xlabel('n')
ylabel('h(n)')
title(' Impules response of matched filter ');
grid
subplot(3,1,3)
plot(y)
xlabel('n')
ylabel('y(n)')
title(' Output of matched fillter ');
grid
disp(' GRAPH: ');
43
OUTPUT WAVE FORMS
44
Exp No: 03
DESIGNING OF FIR FILTERS USING WINDOWING TECHNIQUE
AIM: To write a MAT LAB Program to design various Filters
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
-Closing and clearing comments
-Filter parameters
-Selection of Filter Type
-Plotting of various Windowing Techniques
-Graphs
%FIR Filter design using window techniques
% Closing and Clearing Comments
clc;
clear all;
close all;
%Filter parameters
rp=input('enter passband ripple');
rs=input('enter the stopband ripple');
fp=input('enter passband freq');
fs=input('enter stopband freq');
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f=input('enter sampling freq ');
beta=input('enter beta value');
wp=2*fp/f;
ws=2*fs/f;
num=-20*log10(sqrt(rp*rs))-13;
dem=14.6*(fs-fp)/f;
n=ceil(num/dem);
n1=n+1;
if(rem(n,2)~=0)
n1=n;
n=n-1;
end
%Filter Selection
disp('1.LPF');
disp('2.HPF');
opt=input('select filter, enter only no.');
switch opt
case 1
filtertype='low';
wn=wp;
case 2
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filtertype='high';
wn=wp;
otherwise
disp('invalid option')
end
%Filter Calculations
y1=rectwin(n1);
%disp('Rectangular window filter response');
y2=triang(n1);
% disp('Triangular window filter response');
y3=hamming(n1);
%disp('HAMMING window filter response');
y4=hann(n1);
%disp('HANNING window filter response');
y5=blackman(n1);
%disp('BLACKMAN window filter response');
y6=kaiser(n1,beta);
% disp('kaiser window filter response');
b1=fir1(n,wp,filtertype,y1);
[h,o]=freqz(b1,1,256);
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m=20*log10(abs(h));
figure;
subplot(3,2,1)
plot(o/pi,m);
title('Rectangular window filter response');
ylabel('Gain in dB-->');
xlabel('(a) Normalized frequency-->');
b2=fir1(n,wp,filtertype,y2);
[h,o]=freqz(b2,1,256);
m=20*log10(abs(h));
subplot(3,2,2)
plot(o/pi,m);
title('Triangular window filter response');
ylabel('Gain in dB-->');
xlabel('(b) Normalized frequency-->');
b3=fir1(n,wp,filtertype,y3);
[h,o]=freqz(b3,1,256);
m=20*log10(abs(h));
subplot(3,2,3)
plot(o/pi,m);
title('HAMMING window filter response');
48
ylabel('Gain in dB-->');
xlabel('(c) Normalized frequency-->');
b4=fir1(n,wp,filtertype,y4);
[h,o]=freqz(b4,1,256);
m=20*log10(abs(h));
subplot(3,2,4)
plot(o/pi,m);
title('HANNING window filter response');
ylabel('Gain in dB-->');
xlabel('(d) Normalized frequency-->');
b5=fir1(n,wp,filtertype,y5);
[h,o]=freqz(b5,1,256);
m=20*log10(abs(h));
subplot(3,2,5)
plot(o/pi,m);
title('BLACKMAN window filter response');
ylabel('Gain in dB-->');
xlabel('(e) Normalized frequency-->');
b6=fir1(n,wp,filtertype,y6);
[h,o]=freqz(b5,1,256);
49
m=20*log10(abs(h));
subplot(3,2,6)
plot(o/pi,m);
title('kaiser window filter response');
ylabel('Gain in dB-->');
xlabel('(f) Normalized frequency-->');
OUTPUT:
enter passband ripple 0.02
enter the stopband ripple 0.01
enter passband freq 1000
enter stopband freq 1500
enter sampling freq 10000
enter beta value 2
Select filter, enter only no. 1
50
OUTPUT WAVE FORMS
51
Exp No: 04
GENERATION OF PSK SIGNALWITH M=8
AIM: To write a MAT LAB Program to generate a PSK signal with M=8
SOFTWARE USED: MATLAB 6.5
CONTENTS
. Clearing previous contents
.Program
.Plotting of outputs
. Results
%Closing and Clearing Comments
clear all;
close all;
clc;
%Program
echo on
T=1;
M=8;
Es=T/2;
fc=6/T;
N=100;
52
delta_T=T/(N-1);
t=0:delta_T:T;
u0=sqrt(2*Es/T)*cos(2*pi*fc*t);
u1=sqrt(2*Es/T)*cos(2*pi*fc*t+2*pi/M);
u2=sqrt(2*Es/T)*cos(2*pi*fc*t+4*pi/M);
u3=sqrt(2*Es/T)*cos(2*pi*fc*t+6*pi/M);
u4=sqrt(2*Es/T)*cos(2*pi*fc*t+8*pi/M);
u5=sqrt(2*Es/T)*cos(2*pi*fc*t+10*pi/M);
u6=sqrt(2*Es/T)*cos(2*pi*fc*t+12*pi/M);
u7=sqrt(2*Es/T)*cos(2*pi*fc*t+14*pi/M);
%plotting of outputs
subplot(8,1,1)
plot(t,u0)
subplot(8,1,2)
plot(t,u1)
subplot(8,1,3)
plot(t,u2)
subplot(8,1,4)
plot(t,u3)
subplot(8,1,5)
plot(t,u4)
53
subplot(8,1,6)
plot(t,u5)
subplot(8,1,7)
plot(t,u6)
subplot(8,1,8)
plot(t,u7)
disp('GRAPH:')
OUTPUT WAVE FORMS
54
Exp No: 05
GENERATION OF PSK MODULATION & DEMODULATION SIGNAL
AIM: To write a MAT LAB Program to generate PSK Modulator and Demodulator signal
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
- Closing and clearing comments
-Calculations
-Plotting various signals
- Results
% Closing and clearing comments
clc;
clear all;
close all;
% Calculations
mat=input('Enter The Input data Sequence : ');
sig1=(2*mat)-1;
len=length(sig1);
% mat converted to matrix of 1 and -1 form
% length of input data seq.
x=0:1/10:len*2*pi;
y=sin(x);
% sinusoidal signal
len1=length(y);
len2=len1/len;
% l2 is the length of one period of signal
55
j=1;
for i=1:len
for k=1:len2
z(j)=y(j)*sig1(i);
sig(j)=sig1(i);
% multiply signal with corresponding bits
% stretch the data sequence
k=k+1;
j=j+1;
end
i=i+1;
end
ln=length(sig);
for i=1:ln
if sig(i)<0
sig(i)=0;
end
end
% Plotting various signals
subplot(3,1,1);
stairs(sig,'linewidth',2); % display data sequence
axis([0 ln -2 3]);
title('Input data Sequence');
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ylabel('Amplitude--->');
xlabel('Time--->');
subplot(3,1,2);
plot(y);axis([0 ln -1 1]);
%plot sinusoidal signal
title('Sinusoidal Signal');
ylabel('Amplitude--->');
xlabel('Time--->');
subplot(3,1,3);
plot(z); axis([0 ln -1 1]);
%plot the psk modulated signal
title('PSK Modulated Signal');
ylabel('Amplitude--->');
xlabel('Time--->');
l0=length(y);
l1=length(z);
for i=1:l1
y1(i)=y(i);
% Make both PSK signal matrix and carrier of same size
end
% Demodulation Of PSK signal
for i=1:l1
dsig(i)=y1(i)*z(i);
% Multiply with carrier
end
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% figure
% plot(dsig);
% Process to make as 0 and 1 sequence
for i=1:l1
if dsig(i)>0
dsig2(i)=1
else
dsig2(i)=0;
end
end
figure
stairs(dsig2,'linewidth',2); axis([0 ln -2 3]);
title('Demodulated data Sequence');
ylabel('Amplitude--->');
xlabel('Time--->');
Output:
Enter The Input data Sequence : [1 0 1 1 0 0 1 0]
58
OUTPUT WAVE FORMS
59
Exp No: 06
GENERATION OF FREQUENCY SHIFT KEYING SIGNAL
AIM: To write a MAT LAB Program to generate a FSK Signal
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
-Clearing previous contents
-Programming
-Plotting the outputs
-Results
%Closing and Clearing Comments
clear all
close all
clc
%PROGRAM
a=[1 0 0 1 1 0 1 0 1 1]
k=length(a)
initial_phase=pi;
f1=1;
f2=4;
N=200;
i=[0:1:N-1];
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sin2=sin(2*pi*f2*i/N);
sin1=sin(2*pi*f1*i/N);
for j=[1:1:k]
for i=[1:1:N]
yout(N*(j-1)+i)=a(j)*sin1(i)+(1-a(j))*sin2(i);
end
end
sin22=sin2;
sin11=sin1;
for j=[1:1:k-1]
sin22=[sin22 sin2];
sin11=[sin11 sin1];
end
for j=[1:1:k]
for i=[1:1:N]
a1(N*(j-1)+i)=a(j);
end
end
%Plotting of graph
%figure(1)
subplot(2,1,1)
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plot(a1,'--r')
title('input signal');
hold on
subplot(2,1,2)
plot(yout)
title('FSK Modulation');
grid on
OUTPUT WAVE FORMS
62
Exp No: 07
GENERATION OF BINARY PHASE SHIFT KEYING SIGNAL
AIM: To write a MAT LAB Program to generate BPSK Signal
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
. Clearing previous contents
.Programming
.Plotting the outputs
.Results
%Closing and Clearing Comments
clear all; close all; clc
%PROGRAM
function bpskd(g,f)
if nargin>2
error(' Too many input arguments ');
elseif norgin==1
f=1;
end
if f<1;
error(' Frequency must be bigger then 1 ');
end
63
t=0:2*pi/99:2*pi;
cp=[];sp=[];
mod=[]; mod1=[]; bit=[];
for n=1:length(g);
if g(n)==0;
die=-ones(1,100); % modulation
se=zeros(1,100); %senal
else g(n)==1
die=ones(1,100); % modulation
se=zeros(1,100); %senal
c=sin(f*t);
cp=[cp die];
mod=[mod c];
bit=[bit se];
end
end
bpsk=cp.*mod;
%Plotting of outputs
subplot(2,1,1);
plot(bit,'Line Width',1.5);
grid on
64
title('Binary Signal');
axis([0 100*length(g) -2.5 2.5]);
grid on
subplot(2,1,2);
plot(bpsk,'Line Width',1.5);
grid on
title('BPSK Modulation');
axis([0 100*length(g) -2.5 2.5]);
65
Exp No: 08
DECIMATION AND INTERPOLATION OF A GIVEN SIGNAL
AIM: To write a MAT LAB Program to find Decimation and Interpolation of a given signal
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
. Closing and clearing all
.Calculation of finding the decimation
.Plotting of Decimation and Interpolation signals
.Result
%Closing and Clearing Comments
clear all
close all
clc
%Calculation and finding decimation
t=0:0.03:2;
x=cos(2*pi*t);
y=decimate(x,2);
t1=decimate(t,2);
y1=interp(x,2);
t2=interp(t,2);
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%Plotting decimation and interpolation signals
subplot(2,2,1)
stem(t,x)
xlabel('no of samples')
ylabel('Amplitude')
title(' Input signal')
%plot for decimation
subplot(2,2,2)
stem(t1,y)
xlabel('no of samples')
ylabel('Amplitude')
title(' Decimation signal')
%plot for interpolation
subplot(2,2,3)
stem(t2,y1)
xlabel('no of samples')
ylabel('Amplitude')
title(' Interpolation signal')
disp('GRAPHS:')
67
OUTPUT WAVE FORMS
68
Exp No: 09
POWER SPECTRUM ESTIMATION BY USING AR METHOD
AIM: To write a MAT LAB Program to plot Power Spectrum Estimation by using AR method
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
. Closing and clearing all
.Programming
.Plotting of Power Spectrum Estimation
.Result
%Closing and Clearing Comments
clear all
close all
clc
%Program
a=[1 -2.2137 2.9408 -2.1619 0.9609];
rand('state',1)
x=filter(1,a,rand(256,1));
%Plotting the power spectrum estimation using AR Method
subplot(2,1,1)
pburg(x,4);
xlabel(' Normalized frequency')
69
ylabel(' Average power in DB')
title('PSE using burg method');
%plot for PSE
subplot(2,1,2)
pyulear (x,4);
xlabel(' Normalized frequency')
ylabel(' Average power in DB')
title('PSE using yule walker method');
disp('GRAPH:')
OUTPUT WAVE FORMS
70
Exp No: 10
POWER SPECTRUM ESTIMATION BY USING BARTLETT METHOD
AIM: To write a MAT LAB Program to plot Power Spectrum Estimation by using Bartlett method
SOFTWARE USED: MATLAB 7.9.0.529 (R2009b)
CONTENTS
. Closing and clearing all
.Programming
.Plotting the graphs
.Graphs
%Closing and Clearing Comments
clear all;
close all;
clc;
%Plotting the power spectrum estimation
fs=2000;
f1=200;
f2=400;
M=128;
t=0:1/fs:1;
x=2*sin(2*pi*f1*t)+2*sin(2*pi*f2*t)+rand(size(t));
%Program Bartlett Method
71
L=length(x);
k=L/M;
y1=[];
for i=1:M:L-M;
y2=abs(fft(x(i:i+M)).^2);
y1=[y1;y2];
end
y3=sum(y1);
w1=y3/k;
w12=10*log(w1);
fs1=(fs/k)+2;
t1=((1:fs1)/(fs1));
%Plotting PSE using Bartlett Method
plot(t1,w12)
xlabel('normalized frequency')
ylabel('PSD')
title('PSE using Bartlett Method');
disp('GRAPH:')
72
OUTPUT WAVE FORMS
73