Que1 a) In general the CE amplifiers are called low-signal amplifiers as they use only small
values of voltage as a source of input which cant be used in practical purposes, whereas power
amplifiers deal with practical values of input and output voltages.
b) At low frequencies the coupling capacitors and bypass capacitors and at high frequencies
junctions capacitors are responsible that affect the bandwidth of RC coupled amplifiers.
c) Gain desensitivity, low noise , high signal to noise ratio , less non linear distortion and
improved bandwidth.
d) loop gain should be greater than 1 and the phase shift between input and output should be 0 or
360 degrees.
e) Self-stabilization is a concept of fault-tolerance in distributed computing. A distributed
system that is self-stabilizing will end up in a correct state no matter what state it is initialized
with. That correct state is reached after a finite number of execution steps.
f) 1.Minimizes number of passive elements needed.
2. Can produce very high gain in one stage.
3. Much larger single-ended CMRR than single-ended CMRR for resistive load differential
4. Inherent differential-to-single-ended conversion.
5. No differential output available.
g) The full-power bandwidth is the range of frequencies where the op amp has the most gain.
The cutoff point of the full-power bandwidth is when it drops 3dB from its maximum gain. This
is then the half-power point. After this, the gain of the op amp falls at a steady, constant rate
called the gain-bandwidth product, until it reaches 0.
h) Transconductance is a property of certain electronic components. Conductance is the
reciprocal of resistance; transconductance is the ratio of the current change at the output port to
the voltage change at the input port. It is written as gm. For direct current, transconductance is
defined as follows:
For small signal alternating current, the definition is simpler:
Transresistance, infrequently referred to as mutual resistance, is the dual of transconductance.
The term is a contraction of transfer resistance. It refers to the ratio between a change of the
voltage at two output points and a related change of current through two input points, and is
notated as rm:
a) Wein bridge oscillator:
It is essentially a two-stage amplifier with an R-C bridge circuit. R-C bridge circuit (Wien
bridge) is a lead-lag network. The phase’-shift across the network lags with increasing frequency
and leads with decreasing frequency. By adding Wien-bridge feedback network, the oscillator
becomes sensitive to a signal of only one particular frequency. This particular frequency is that at
which Wien bridge is balanced and for which the phase shift is 0°.If the Wien-bridge feedback
network is not employed and output of transistor Q2 is fedback to transistor Q1 for providing
regeneration required for producing oscillations, the transistor Q1 will amplify signals over a
wide range of frequencies and thus direct coupling would result in poor frequency stability. Thus
by employing Wien-bridge feedback network frequency stability is increased.
In the bridge circuit R1 in series with C1, R3, R4 and R2 in parallel with C2 form the four arms.
This bridge circuit can be used as feedback network for an oscillator, provided that the phase
shift through the amplifier is zero. This requisite condition is achieved by using a two stage
amplifier, as illustrated in the figure. In this arrangement the output of the second stage is
supplied back to the feedback network and the voltage across the parallel combination C2 R2 is
fed to the input of the first stage. Transistor Q1 serves as an oscillator and amplifier whereas the
transistor Q2 as an inverter to cause a phase shift of 180°. The circuit uses positive and negative
feedbacks. The positive feedback is through R1 C1 R2, C2 to transistor Q1 and negative feedback
is through the voltage divider to the input of transistor Q1. Resistors R3 and R4 are used to
stabilize the amplitude of the output.
The two transistors Q1 and Q2 thus cause a total phase shift of 360° and ensure proper positive
feedback. The negative feedback is provided in the circuit to ensure constant output over a range
of frequencies. This is achieved by taking resistor R4 in the form of a temperature sensitive lamp,
whose resistance increases with the increase in current. In case the amplitude of the output tends
to increase, more current would provide more negative feedback. Thus the output would regain
its original value. A reverse action would take place in case the output tends to fall.
The amplifier voltage gain, A R3 + R4 / R4 = R3 / R4 + 1 = 3
Since R3 = 2 R4
The above corresponds with the feedback network attenuation of 1/3. Thus, in this case, voltage
gain A, must be equal to or greater than 3, to sustain oscillations. To have a voltage gain of 3 is
not difficult. On the other hand, to have a gain as low as 3 may be difficult. For this reason also
negative feedback is essential.
Operation: The circuit is set in oscillation by any random change in base current of transistor
Q1, that may be due to noise inherent in the transistor or variation in voltage of dc supply. This
variation in base current is amplified in collector circuit of transistor Q1 but with a phase-shift of
180°. the output of transistor Q1 is fed to the base of second transistor Q2 through capacitor C4.
Now a still further amplified and twice phase-reversed signal appears at the collector of the
transistor Q2. Having been inverted twice, the output signal will be in phase with the signal input
to the base of transistor Q1 A part of the output signal at transistor Q2 is fedback to the input
points of the bridge circuit (point A-C). A part of this feedback signal is applied to emitter
resistor R4 where it produces degenerative effect (or negative feedback). Similarly, a part of the
feedback signal is applied across the base-bias resistor R2 where it produces regenerative effect
(or positive feedback). At the rated frequency, effect of regeneration is made slightly more than
that of degeneration so as to obtain sustained oscillations.
The continuous frequency variation in this oscillator can be had by varying the two capacitors C 1
and C2 simultaneously. These capacitors are variable air-gang capacitors. We can change the
frequency range of the oscillator by switching into the circuit different values of resistors R1 and
R2 .
1. Provides a stable low distortion sinusoidal output over a wide range of frequency.
2. The frequency range can be selected simply by using decade resistance boxes.
3. The frequency of oscillation can be easily varied by varying capacitances C 1 and C2
simultaneously. The overall gain is high because of two transistors.
1. The circuit needs two transistors and a large number of other components.
2. The maximum frequency output is limited because of amplitude and the phase-shift
characteristics of amplifier.
The criteria of oscillations is the loop gain AB>=1 and the phase shift between input and output
should be 0 or 360 degrees. The oscillations will take place only if the wein bridge is balanced
b) Base width modulation : As the voltages applied to the base-emitter and base-collector
junctions are changed, the depletion layer widths and the quasi-neutral regions vary as
well. This causes the collector current to vary with the collector-emitter voltage as
illustrated in Figure a
Fig a: Variation of the minority-carrier distribution in the base quasi-neutral region due to
a variation of the base-collector voltage.
A variation of the base-collector voltage results in a variation of the quasi-neutral width in the base. The
gradient of the minority-carrier density in the base therefore changes, yielding an increased collector current
as the collector-base current is increased. This effect is referred to as the Early effect. The Early effect is
observed as an increase in the collector current with increasing collector-emitter voltage as illustrated with
Figure b. The Early voltage, VA, is obtained by drawing a line tangential to the transistor I-V characteristic
at the point of interest. The Early voltage equals the horizontal distance between the point chosen on the I-V
characteristics and the intersection between the tangential line and the horizontal axis. It is indicated on the
figure by the horizontal arrow.
Figure b :
Collector current increase with an increase of the collector-emitter voltage due to the Early
effect. The Early voltage, VA, is also indicated on the figure.
The change of the collector current when changing the collector-emitter voltage is primarily due to the
variation of the base-collector voltage, since the base-emitter junction is forward biased and a constant base
current is applied. The collector current depends on the base-collector voltage since the base-collector
depletion layer width varies, which also causes the quasi-neutral width, wB', in the base to vary.
This variation can be expressed by the Early voltage, VA, which quantifies what voltage variation would
result in zero collector current.
It can be shown that the Early voltage also equals the majority carrier charge in the base, QB, divided by the
base-collector junction capacitance.
The Early voltage can also be linked to the output conductance, r0, which equals:
In addition to the Early effect, there is a less pronounced effect due to the variation of the base-emitter
voltage, which changes the ideality factor of the collector current. However, the effect at the base-emitter
junction is much smaller since the base-emitter junction capacitance is larger and the base-emitter voltage
variation is very limited since the junction is forward biased. This effect does lead to a variation of the
ideality factor, n, given by:
The collector current is therefore of the following form:
Where the IC,s is the collector saturation current.
c) I) High Frequency response of CS amplifier:
Low Frequency response of CS amplifier :
Overall frequency response :
ii) Bipolar transistor amplifiers must be properly biased to operate correctly. In circuits
made with individual devices (discrete circuits), biasing networks consisting of
resistors are commonly employed. Much more elaborate biasing arrangements are
used in integrated circuits, for example, bandgap voltage references and current
The operating point of a device, also known as bias point, quiescent point, or Q-point, is the
point on the output characteristics that shows the DC collector–emitter voltage (Vce) and the
collector current (Ic) with no input signal applied. The term is normally used in connection with
devices such as transistors. Fixed bias (base bias)
This form of biasing is also called base bias. In the example image on the right, the single power
source (for example, a battery) is used for both collector and base of a transistor, although
separate batteries can also be used.
In the given circuit,
Vcc = IBRB + Vbe
IB = (Vcc - Vbe)/RB
For a given transistor, Vbe does not vary significantly during use. As Vcc is of fixed value, on
selection of RB, the base current IB is fixed. Therefore this type is called fixed bias type of circuit.
Also for given circuit,
Vcc = ICRC + Vce
Vce = Vcc - ICRC
The common-emitter current gain of a transistor is an important parameter in circuit design, and
is specified on the data sheet for a particular transistor. It is denoted as β on this page.
IC = βIB
we can obtain IC as well. In this manner, operating point given as (Vce,IC) can be set for given
It is simple to shift the operating point anywhere in the active region by merely changing
the base resistor (RB).
A very small number of components are required.
The collector current does not remain constant with variation in temperature or power
supply voltage. Therefore the operating point is unstable.
Changes in Vbe will change IB and thus cause RE to change. This in turn will alter the gain
of the stage.
When the transistor is replaced with another one, considerable change in the value of β
can be expected. Due to this change the operating point will shift.
For small-signal transistors (e.g., not power transistors) with relatively high values of β
(i.e., between 100 and 200), this configuration will be prone to thermal runaway. In
particular, the stability factor, which is a measure of the change in collector current with
changes in reverse saturation current, is approximately β+1. To ensure absolute stability
of the amplifier, a stability factor of less than 25 is preferred, and so small-signal
transistors have large stability factors.[citation needed]
Due to the above inherent drawbacks, fixed bias is rarely used in linear circuits (i.e., those
circuits which use the transistor as a current source). Instead, it is often used in circuits where
transistor is used as a switch. However, one application of fixed bias is to achieve crude
automatic gain control in the transistor by feeding the base resistor from a DC signal derived
from the AC output of a later stage.
Collector-to-base bias
Collector-to-base bias
This configuration employs negative feedback to prevent thermal runaway and stabilize the
operating point. In this form of biasing, the base resistor
is connected to the collector instead
of connecting it to the DC source
. So any thermal runaway will induce a voltage drop across
resistor that will throttle the transistor's base current.
From Kirchhoff's voltage law, the voltage
across the base resistor
By the Ebers–Moll model,
, and so
From Ohm's law, the base current
Hence, the base current
, and so
is held constant and temperature increases, then the collector current
However, a larger causes the voltage drop across resistor
to increase, which in turn reduces
the voltage
across the base resistor
. A lower base-resistor voltage drop reduces the base
current , which results in less collector current . Because an increase in collector current
with temperature is opposed, the operating point is kept stable.
Circuit stabilizes the operating point against variations in temperature and β (i.e.
replacement of transistor)
In this circuit, to keep
independent of
, the following condition must be met:
which is the case when
As -value is fixed (and generally unknown) for a given transistor, this relation can be
satisfied either by keeping
fairly large or making
very low.
is large, a high
is necessary, which increases cost as well as precautions
necessary while handling.
is low, the reverse bias of the collector–base region is small, which limits
the range of collector voltage swing that leaves the transistor in active mode.
The resistor
causes an AC feedback, reducing the voltage gain of the amplifier. This
undesirable effect is a trade-off for greater Q-point stability.
Usage: The feedback also decreases the input impedance of the amplifier as seen from the base,
which can be advantageous. Due to the gain reduction from feedback, this biasing form is used
only when the trade-off for stability is warranted.
Fixed bias with emitter resistor
Fixed bias with emitter resistor
The fixed bias circuit is modified by attaching an external resistor to the emitter. This resistor
introduces negative feedback that stabilizes the Q-point. From Kirchhoff's voltage law, the
voltage across the base resistor is
VRb = VCC - IeRe - Vbe.
From Ohm's law, the base current is
Ib = VRb / Rb.
The way feedback controls the bias point is as follows. If Vbe is held constant and temperature
increases, emitter current increases. However, a larger Ie increases the emitter voltage Ve = IeRe,
which in turn reduces the voltage VRb across the base resistor. A lower base-resistor voltage drop
reduces the base current, which results in less collector current because Ic = β IB. Collector
current and emitter current are related by Ic = α Ie with α ≈ 1, so increase in emitter current with
temperature is opposed, and operating point is kept stable.
Similarly, if the transistor is replaced by another, there may be a change in IC (corresponding to
change in β-value, for example). By similar process as above, the change is negated and
operating point kept stable.
For the given circuit,
IB = (VCC - Vbe)/(RB + (β+1)RE).
The circuit has the tendency to stabilize operating point against changes in temperature and βvalue.
In this circuit, to keep IC independent of β the following condition must be met:
which is approximately the case if
( β + 1 )RE >> RB.
As β-value is fixed for a given transistor, this relation can be satisfied either by keeping
RE very large, or making RB very low.
If RE is of large value, high VCC is necessary. This increases cost as well as
precautions necessary while handling.
If RB is low, a separate low voltage supply should be used in the base circuit.
Using two supplies of different voltages is impractical.
In addition to the above, RE causes ac feedback which reduces the voltage gain of the
The feedback also increases the input impedance of the amplifier when seen from the base,
which can be advantageous. Due to the above disadvantages, this type of biasing circuit is used
only with careful consideration of the trade-offs involved.
Collector-Stabilized Biasing
Voltage divider biasing
Voltage divider bias
The voltage divider is formed using external resistors R1 and R2. The voltage across R2 forward
biases the emitter junction. By proper selection of resistors R1 and R2, the operating point of the
transistor can be made independent of β. In this circuit, the voltage divider holds the base voltage
fixed independent of base current provided the divider current is large compared to the base
current. However, even with a fixed base voltage, collector current varies with temperature (for
example) so an emitter resistor is added to stabilize the Q-point, similar to the above circuits with
emitter resistor.
In this circuit the base voltage is given by:
voltage across
For the given circuit,
Unlike above circuits, only one dc supply is necessary.
Operating point is almost independent of β variation.
Operating point stabilized against shift in temperature.
In this circuit, to keep IC independent of β the following condition must be met:
which is approximately the case if
where R1 || R2 denotes the equivalent resistance of R1 and R2 connected in parallel.
As β-value is fixed for a given transistor, this relation can be satisfied either by keeping
RE fairly large, or making R1||R2 very low.
If RE is of large value, high VCC is necessary. This increases cost as well as
precautions necessary while handling.
If R1 || R2 is low, either R1 is low, or R2 is low, or both are low. A low R1 raises
VB closer to VC, reducing the available swing in collector voltage, and limiting
how large RC can be made without driving the transistor out of active mode. A
low R2 lowers Vbe, reducing the allowed collector current. Lowering both resistor
values draws more current from the power supply and lowers the input resistance
of the amplifier as seen from the base.
AC as well as DC feedback is caused by RE, which reduces the AC voltage gain of the
amplifier. A method to avoid AC feedback while retaining DC feedback is discussed
The circuit's stability and merits as above make it widely used for linear circuits.
Voltage divider with AC bypass capacitor
Voltage divider with capacitor
The standard voltage divider circuit discussed above faces a drawback - AC feedback caused by
resistor RE reduces the gain. This can be avoided by placing a capacitor (C E) in parallel with RE,
as shown in circuit diagram.
This capacitor is usually chosen to have a low enough reactance at the signal frequencies of
interest such that RE is essentially shorted at AC, thus grounding the emitter. Feedback is
therefore only present at DC to stabilize the operating point, in which case any AC advantages of
feedback are lost.
This idea can also be used to shunt only a portion of RE, thereby retaining some AC feedback.
Emitter bias
Emitter bias
When a split supply (dual power supply) is available, this biasing circuit is the most effective,
and provides zero bias voltage at the emitter or collector for load. The negative supply VEE is
used to forward-bias the emitter junction through RE. The positive supply VCC is used to reversebias the collector junction. Only two resistors are necessary for the common collector stage and
four resistors for the common emitter or common base stage.
We know that,
VB - VE = Vbe
If RB is small enough, base voltage will be approximately zero. Therefore emitter current is,
IE = (VEE - Vbe)/RE
The operating point is independent of β if RE >> RB/β
Good stability of operating point similar to voltage divider bias.
This type can only be used when a split (dual) power supply is available.
d) I) Bipolar junction transistors (BJTs)
Leakage current increases significantly in bipolar transistors (especially germanium-based
bipolar transistors) as they increase in temperature. Depending on the design of the circuit, this
increase in leakage current can increase the current flowing through a transistor and thus the
power dissipation, causing a further increase in Collector-to-Emitter leakage current. This is
frequently seen in a push–pull stage of a class AB amplifier. If the pull-up and pull-down
transistors are biased to have minimal crossover distortion at room temperature, and the biasing
is not temperature-compensated, then as the temperature rises both transistors will be
increasingly biased on, causing current and power to further increase, and eventually destroying
one or both devices.
One rule of thumb to avoid thermal runaway is to keep the operating point of a BJT so that Vce ≤
Another practice is to mount a thermal feedback sensing transistor or other device on the heat
sink, to control the crossover bias voltage. As the output transistors heat up, so does the thermal
feedback transistor. This in turn causes the thermal feedback transistor to turn on at a slightly
lower voltage, reducing the crossover bias voltage, and so reducing the heat dissipated by the
output transistors.
If multiple BJT transistors are connected in parallel (which is typical in high current
applications), a current hogging problem can occur. Special measures must be taken to control
this characteristic vulnerability of BJTs.
ii) CE amplifier :
Hybrid π- model of CE amplifier:
T-model of CE amplifier:
(e) (i) Small signal model of FET:
(ii) The D-MOSFET can be operated in depletion or enhancement modes. To be operated in
depletion mode, the gate is made more negative effectively narrowing the channel or depleting
the channel of electrons. To be operated in the enhancement mode the gate is made more positive
attracting more electrons into the channel for better current flow.
A Depletion MOSFET can operate in two modes: Depletion or Enhancement mode.
Ans 3 (i) potential biasing is preferred over other biasing techniques because of the following
1. only one dc supply is necessary.
2. operating point is almost independent of β variation.
3. Operating point stabilized against shift in temperature.
(ii) Effect of finite open loop gain and bandwidth on circuit performance :
Ans 4
Stability of quiescent operating point:
Let us assume that the transistor is replaced by an other transistor of same type. The dc of the
two transistors of same type may not be same. Therefore, if
dc increases then for same IB,
output characteristic shifts upward. If dc decreases, the output characteristic shifts downward.
Since IB is maintained constant, therefore the operating point shifts from Q to Q1 as shown in fig.
5. The new operating point may be completely unsatisfactory.
Therefore, to maintain operating point stable, IB should be allowed to change so as to maintain
VCE & IC constant as dc changes.
Fig. 5
A second cause for bias instability is a variation in temperature. The reverse saturation current
changes with temperature. Specifically, ICO doubles for every 10oC rise in temperature. The
collector current IC causes the collector junction temperature to rise, which in turn increases ICO.
As a result of this growth ICO, IC will increase ( dc IB + (1+ dc ) ICO ) and so on. It may be
possible that this process goes on and the ratings of the transistors are exceeded. This increase in
IC changes the characteristic and hence the operating point.
Stability Factor:
The operating point can be made stable by keeping IC and VCE constant. There are two
techniques to make Q point stable.
1. stabilization techniques
2. compensation techniques
In first, resistor biasing circuits are used which allow IB to vary so as to keep IC relatively
constant with variations in dc , ICO and VBE.
In second, temperature sensitive devices such as diodes, transistors are used which provide
compensating voltages and currents to maintain the operating point constant.
To compare different biasing circuits, stability factor S is defined as the rate of change of
collector current with respect to the ICO, keeping dc and VCE constant
IC /
If S is large, then circuit is thermally instable. S cannot be less than unity. The other stability
factors are,
IC /
IC /
VBE. The bias circuit, which provide stability with ICO,
dc and
also show stability even if and VBEchanges.
IC =
+ (I +
Differentiating with respect to IC,
In fixed bias circuit, IB & IC are independent. Therefore
and S = 1 + dc. If
dc=100, S
= 101, which means ICincreases 101 times as fast as ICO. Such a large change definitely operate
the transistor in saturation.
Characteristics of BJT :
The forward biased junction in the BJT follows the same curve as we saw for the forward
biased diode. This set of characteristics obeys the same exponential relationship as the diode, has
the same turn on voltage (0.7V for Si and 0.2V for Ge at 25 C), and exhibits the same
temperature dependence (-2.0 mV/ C for Si and –2.5 mV/ C for Ge).
The general form of the base-emitter characteristics are presented to the right and shows the
behavior of the emitter current (iE) as a function of the voltage between base and emitter (vBE), at
a given temperature, when the voltage between the collector and emitter (vCE) is held constant
(note that this is a modification of Figure 4.7a in your text). The inverse of the slope of the curve
about a specified operating point (Q-point) is the dynamic resistance (also referred to as the
emitter resistance) of the transistor
By making the following assumptions:
the emitter resistance may be calculated by
Substituting VT=26mV at room temperature, iE (iC) at the Q-point, and solving for re (rd), we get
CQedImVrr26==. (Equation 4.19)
Note that, if the temperature changes, VT will no longer be 26mV.
The actual iC-vBE characteristics behave identically to the curve above, but have a scaling factor
of α (I0 in the equation above becomes αI0). However, since usually α ≈ 1, this is generally
disregarded. Similarly, the iB-vBE characteristics have the same appearance, but with a scaled
current of I0/β. Finally, the curves for a pnp transistor will look the same, but the polarity on the
base-emitter voltage will be switched (vBE becomes –vBE=vEB).
The second set of characteristics we’re going to be interested in is illustrated to the right as a
family of iC-vCE curves (note that this is a modified combination of Figures 4.7(b) and 4.8 of your
text). Each of the curves in this family illustrates the dependence of the collector current (iC) on
the collector emitter voltage (vCE) when the base current (iB) has a constant value (i.e., vBE is held
There are three distinct regions of these characteristics that are of importance:
decreases, there comes a point when the collector voltage becomes
less than the base voltage. When this happens, the transistor leaves the linear region of operation
and enters the saturation region, which is highly nonlinear and is not usable for amplification.
cutoff region of operation occurs for base currents near zero. In the cutoff region, the
collector current approaches zero in a nonlinear manner and is also avoided for amplification
linear (or active) region
the curves would ideally be horizontal straight lines, indicating that the collector behaves as a
constant current source independent of the collector voltage, as illustrated in the hybrid-π model
(iC = βiB). Practically, these curves have a slight positive slope. If these curves are extended to
the left along the –vCE axis, they will converge to a point known as the Early voltage, shown as
–VA in the figure below.
Ans5: Merits of negative feedback:
(i) negative feedback is employed in high gain amplifiers because the feedback of an amplifier
tends to reduce the gain of an amplifier and also, the bandwidth of feedback increases the gain of
an amplifier, so in an high gain amplifier as to be stabilized.
(ii) Emitter follower circuits are known as common collector Because of the geometry of the
common collector configuration, changes in base voltage appear at the emitter. Said another way,
what happens at the base pretty much happens at the emitter, and the emitter can be said to
"mirror" or "follow" the base. The emitter is a follower of the base, and the name emitter
follower appeared and was used.
(iii) A common emitter circuit without bypass capacitor is called a negative feedback circuit
because if bypass capacitor is not connected , the circuit will reduce its voltage gain.
Ans 6 : E-MOSFET: Although DE-MOSFET is useful in special applications, it does not enjoy
widespread use. However, it played an important role in history because it was part of the
evolution towards the E-mode MOSFET, a device that has revolutionized the electronic industry.
E-MOSFET has become enormously important, in digital electronics and. In the absence of EMOSFET’s the personal computers (PCs) that are now so widespread would not exist.
Construction of an EMOSFET:
Construction of EMOSFET
Figure shows the construction of an N-channel E-MOSFET. The main difference between the
construction of DE-MOSFET and that of E-MOSFET, as we see from the figures given below
the E-MOSFET substrate extends all the way to the silicon dioxide (SiO2) and no channels are
doped between the source and the drain. Channels are electrically induced in these MOSFETs,
when a positive gate-source voltage VGS is applied to it.
Operation of an EMOSFET:
Working of an EMOSFET
As its name indicates, this MOSFET operates only in the enhancement mode and has no
depletion mode. It operates with large positive gate voltage only. It does not conduct when the
gate-source voltage VGS = 0. This is the reason that it is called normally-off MOSFET. In these
MOSFET’s drain current ID flows only when VGS exceeds VGST [gate-to-source threshold
When drain is applied with positive voltage with respect to source and no potential is applied to
the gate two N-regions and one P-substrate from two P-N junctions connected back to back with
a resistance of the P-substrate. So a very small drain current that is, reverse leakage current
flows. If the P-type substrate is now connected to the source terminal, there is zero voltage across
the source substrate junction, and the-drain-substrate junction remains reverse biased.
When the gate is made positive with respect to the source and the substrate, negative (i.e.
minority) charge carriers within the substrate are attracted to the positive gate and accumulate
close to the-surface of the substrate. As the gate voltage is increased, more and more electrons
accumulate under the gate. Since these electrons can not flow across the insulated layer of silicon
dioxide to the gate, so they accumulate at the surface of the substrate just below the gate. These
accumulated minority charge carriers N -type channel stretching from drain to source. When this
occurs, a channel is induced by forming what is termed an inversion layer (N-type). Now a drain
current start flowing. The strength of the drain current depends upon the channel resistance
which, in turn, depends upon the number of charge carriers attracted to the positive gate. Thus
drain current is controlled by the gate potential.
Since the conductivity of the channel is enhanced by the positive bias on the gate so this device
is also called the enhancement MOSFET or E- MOSFET.
The minimum value of gate-to-source voltage VGS that is required to form the inversion layer (Ntype) is termed the gate-to-source threshold voltage VGST. For VGS below VGST, the drain current
ID = 0. But for VGS exceeding VGST an N-type inversion layer connects the source to drain and
the drain current ID is large. Depending upon the device being used, VGST may vary from less
than 1 V to more than 5 V.
JFETs and DE-MOSFETs are classified as the depletion-mode devices because their
conductivity depends on the action of depletion layers. E-MOSFET is classified as an
enhancement-mode device because its conductivity depends on the action of the inversion layer.
Depletion-mode devices are normally ON when the gate-source voltage VGS = 0, whereas the
enhancement-mode devices are normally OFF when VGS = 0.
Characteristics of an EMOSFET.
Drain Characteristics-EMOSFET
Drain characteristics of an N-channel E-MOSFET are shown in figure. The lowest curve is the
VGST curve. When VGS is lesser than VGST, ID is approximately zero. When VGS is greater than
VGST, the device turns- on and the drain current ID is controlled by the gate voltage. The
characteristic curves have almost vertical and almost horizontal parts. The almost vertical
components of the curves correspond to the ohmic region, and the horizontal components
correspond to the constant current region. Thus E-MOSFET can be operated in either of these
regions i.e. it can be used as a variable-voltage resistor (WR) or as a constant current source.
EMOSFET-Transfer Characteristics
Figure shows a typical transconductance curve. The current IDSS at VGS <=0 is very small,
being of the order of a few nano-amperes. When the VGS is made positive, the drain current ID
increases slowly at first, and then much more rapidly with an increase in VGS. The manufacturer
sometimes indicates the gate-source threshold voltage VGST at which the drain current ID attains
some defined small value, say 10 u A. A current ID (0N, corresponding approximately to the
maximum value given on the drain characteristics and the values of VGS required to give this
current VGs QN are also usually given on the manufacturers data sheet.
The equation for the transfer characteristic does not obey equation. However it does follow a
similar “square law type” of relationship. The equation for the transfer characteristic of EMOSFETs is given as:
DE-MOSFET: We know that when the gate is biased negative with respect to the source in an
N-channel JFET, the depletion region widths are increased. Theincrease in the depletion regions
reduces the channel thickness, which increases its resistance. The net result is that drain current
ID is reduced.
If the polarity of VGG were reversed so as to apply a positive bias to the gate with respect to
source, the P-N junctions between the gate and the channel would then be forward biased. Since
a forward bias reduces the width of a depletion region, the thickness of channel would increase
with a corresponding decrease in channel resistance. As a result, drain current ID would increase
beyond the JFET’s IDSS value.
The normal operation of a JFET is in its depletion mode of operation. However, as discussed
above, it is also possible to enhance the conductivity of the JFET channel. However, the forward
bias of the silicon P-N junction is usually restricted to a maximum of 0.5 V (more conservative
limit is 0.2 V) so as to limit the gate current.
As we have seen that, the greater the ID is compared to IDSS the greater the transconductance gm
will be. We have seen before that the voltage gain is directly proportional to gm. So, in general,
the higher the gm, the better it is. This is one of the advantages of being able to enhance the
As its name suggests, the depletion-enhancement MOSFET (DE-MOSFET)-was developed to
be used in either or both the depletion and enhancement modes.
Construction of a DEMOSFET.
Construction of DEMOSFET
Figure shows the construction of an N-channel depletion MOSFET. It consists of a highly doped
P-type substrate into which two blocks of heavily doped N-type material are diffused forming the
source and drain. An N-channel is formed by diffusion between the source and drain. The type of
impurity for the channel is the same as for the source and drain. Now a thin layer of SiO2
dielectric is grown over the entire surface and holes are cut through the SiO2 (silicon-dioxide)
layer to make contact with the N-type blocks (Source and Drain). Metal is deposited through the
holes to provide drain and source terminals, and on the surface area between drain and source, a
metal plate isdeposited. This layer constitutes the gate. Si02 layer results in an extremely high
input impedance of the order of 1010 to 1015 Q for this area. The chip area of a MOSFET is
typically 0.003 um2 or less which is about only 5% of the area required by a BJT. A P-channel
DE-MOSFET is constructed like an N-channel DE-MOSFET, starting with an N-type substrate
and diffusing P-type drain and source blocks and connecting them internally by a P-doped
channel region.
Operation of DEMOSFET.
DE-MOSFET can be operated with either a positive or a negative gate. When gate is positive
with respect to the source it operates in the enhancement—or E-mode and when the gate is
negative with respect to the source, as illustrated in figure, it operates in depletion-mode.
When the drain is made positive with respect to source, a drain current will flow, even with zero
gate potential and the MOSFET is said to be operating in E-mode. In this mode of operation gate
attracts the negative charge carriers from the P-substrate to the N-channel and thus reduces the
channel resistance and increases the drain-current. The more positive the gate is made, the more
drain current flows.
On the other hand when the gate is made negative with respect to the substrate, the gate repels
some of the negative charge carriers out of the N-channel. This creates a depletion region in the
channel, as illustrated in figure, and, therefore, increases the channel resistance and reduces the
drain current. The more negative the gate, the less the drain current. In this mode of operation the
device is referred to as a depletion-mode MOSFET. Here too much negative gate voltage can
pinch-off the channel. Thus operation is similar to that of JFET.
Characteristics of DEMOSFET.
Drain characteristics
Typical drain characteristics, for various levels of gate-source voltage, of an N-channel
MOSFET are shown in figure. The upper curves are for positive VGS and the lower curves are for
negative VGS. The bottom drain curve is for VGS = V GS(OFF). For a specified drain-source
voltage VDS, VGS (OFF) is the gate-source voltage at which drain current reduces to a certain
specified negligibly small value, as shown in figure. This voltage corresponds to the pinch-off
voltage Vp of JFET. For VGS between VGS (0FF) and zero, the device operates in depletion-mode
while for VGS exceeding zero the device operates in enhancement mode. These drain curves
again display an ohmic region, a constant-current source region and a cut-off region. MOSFET
has two major applications: a constant current source and a voltage variable resistor.
DEMOSFET-transfer characteristics
The transfer (or transconductance) characteristic for an N-channel DE-MOSFET is shown in
figure. IDSS is the drain current with a shorted gate. Since the curve extends to the right of the
origin, IDSS is no longer the maximum possibledrain current.
Mathematically, the curve is still part of a parabola and the same square-law relation exists as
with a JFET. In fact, the depletion-mode MOSFET has a drain current given by the same
transconductance equation as before, equation . Furthermore, it has the same equivalent circuits
as a JFET. Because of this, the analysis of a depletion-mode MOSFET circuit is almost identical
to that of a JFET circuit. The only difference is the analysis for a positive gate, but even here the
same basic formulas are used to determine the drain current ID, gate-source voltage VGS etc.
The foregoing discussion is applicable in principle also to the P-channel DE-MOSFET. For such
a device the sign of all currents and voltages in the characteristics must be reversed.
Schematic Symbols of DEMOSFET.
DEMOSFET-Schematic symbols
Figure shows the schematic symbol for a DE-MOSFET. Just to the right of the gate is the thin
vertical line representing the channel. The drain lead comes out from the top of the channel and
the source lead connects to the bottom. The arrow is on the P-substrate and points to the Nmaterial. In some applications, a voltage can be applied to the substrate for added control of
drain current. For this reason, some DE-MOSFETs have four terminal leads. But in most
applications, the substrate is connected to the source. Usually the substrate is connected to the
source internally by the manufacturer. This results in a three terminal device whose schematic
symbol is shown in figure.
Schematic symbol for a three terminal P-channel DE-MOSFET device is shown in figure. The
schematic symbol of a P-channel DE-MOSFET is similar to that of an N-channel DE-MOSFET,
except that the arrow points outward.
Unlike BJTs, thermal runaway does not occur with FETs, as already discussed in our blog.
However, the wide differences in maximum and minimum transfer characteristics make ID
levels unpredictable with simple fixed-gate bias voltage. To obtain reasonable limits on
quiescent drain currents ID and drain-source voltage VDS, source resistor and potential divider
bias techniques must be used. With few exceptions, MOSFET bias circuits are similar to those
used for JFETs. Various FET biasing circuits are discussed below:
Self Biasing :
FET-Self Bias circuit
This is the most common method for biasing a JFET. Self-bias circuit for N-channel JFET is
shown in figure.
Since no gate current flows through the reverse-biased gate-source, the gate current IG = 0 and,
therefore,vG = iG RG = 0
With a drain current ID the voltage at the S is
Vs= ID Rs
The gate-source voltage is then
VGs = VG - Vs = 0 – ID Rs = – ID Rs
So voltage drop across resistance Rs provides the biasing voltage VGg and no external source is
required for biasing and this is the reason that it is called self-biasing.
The operating point (that is zero signal ID and VDS) can easily be determined from equation and
equation given below :
VDS = VDD – ID (RD + RS)
Thus dc conditions of JFET amplifier are fully specified. Self biasing of a JFET stabilizes its
quiescent operating point against any change in its parameters like transconductance. Let the
given JFET be replaced by another JFET having the double conductance then drain current will
also try to be double but since any increase in voltage drop across Rs, therefore, gate-source
voltage, VGS becomes more negative and thus increase in drain current is reduced.
Fixed Biasing :
Fixed bias-FET
DC bias of a FET device needs setting of gate-source voltage VGS to give desired drain current ID
. For a JFET drain current is limited by the saturation current IDS. Since the FET has such a high
input impedance that no gate current flows and the dc voltage of the gate set by a voltage divider
or a fixed battery voltage is not affected or loaded by the FET.
Fixed dc bias is obtained using a battery VQG. This battery ensures that the gate is always
negative with respect to source and no current flows through resistor RG and gate terminal that is
IG =0. The battery provides a voltage VGS to bias the N-channel JFET, but no resulting current is
drawn from the battery VGG. Resistor RG is included to allow any ac signal applied through
capacitor C to develop across RG. While any ac signal will develop across RG, the dc voltage
drop across RG is equal to IG RG i.e. 0 volt.
The gate-source voltage VGS is then
VGS = - vG – vs = – vGG – 0 = – VGG
The drain -source current ID is then fixed by the gate-source voltage as determined by equation.
This current then causes a voltage drop across the drain resistor RD and is given as VRD = ID RD
and output voltage, Vout = VDD – ID RD
Ans 8 : A feedback amplifier having closed-loop gain, Af greater than unity can be obtained by
the use of a positive feedback. This result also satisfies the phase condition and thus results in the
operation of an oscillator circuit. An oscillator circuit then provides a constantly varying output
signal. If the output signal varies sinusoidally, the circuit can be called as a sinusoidal oscillator.
But, if the output voltage rises and drops from one voltage level to another quickly, the circuit
can be called a pulse or square-wave generator.
To understand how an oscillator produces an output signal without an external input signal, let us
consider the feedback circuit shown in fig (a). In the figure Vin is the voltage of ac input driving
the input terminals B-C of an amplifier having voltage gain A.
The amplified output voltage is Vout = A Vin
This voltage drives a feedback circuit that is usually a resonant circuit, as we get maximum
feedback at one frequency. The feedback voltage returning to point a is given by equation Vf = A
β Vin where β is the gain of feedback network
If the phase shift through the amplifier and feedback circuit is zero, then A β Vin is in phase with
the input signal Vin that drives the input terminals of the amplifier.
Now we connect point ‘a’ to point ‘b’ and
simultaneously remove voltage source Vin, then feedback voltage A β Vin drives the input
terminals b c of the amplifier, as shown in fig. (b). In case A β is less than unity, A β V in is less
than Vin and the output signal will die out, as illustrated in second fig. (a). On the other hand if A
P is greater than unity, the output signal will build up, as illustrated in second fig. (b). If A β is
equal to unity, A β Vin equals Vin and the output signal is a steady sine wave, as illustrated in fig.
(c). In this case the circuit supplies its own input signal and produces a sinusoidal output.
Certain conditions are required to be fulfilled for sustained oscillations and these conditions are
(i) The loop gain of the circuit must be equal to (or greater than) unity and
(ii) The phase shift around the circuit must be zero. These two conditions for sustained oscillations are called Barkhausen criteria.
There is no need of an input signal for the initiation of oscillations. In order to obtain a selfsustained oscillation, the condition β A = 1 must be satisfied. The value of β A is made greater
than unity. As a result the system starts oscillating by amplifying noise voltage which is always
present. An average value of β A of 1 can be obtained by the saturation factors in the practical
circuits. The waveforms that are obtained will not be exactly sinusoidal. If the value of β A is
closer to the value 1, the waveform becomes more sinusoidal. The figure above shows how the
noise voltage results in a build up of a steady state oscillation condition.
By noting the denominator in the feedback equation, we can see the way the feedback circuit
operates as an oscillator.
Af= A / 1 + β A. When β A = -1 or magnitude 1 at a phase angle of 180°,
The gain with feedback, Af becomes infinite as the denominator becomes zero. Thus, a
measurable output voltage can be obtained with the help of an infinite signal (noise voltage), and
the circuit acts as an oscillator even without an input signal.
At the resonant frequency, the phase shift around the loop is made 0° by deliberate design. The
phase shift is different from 0° above and below the resonant frequency. Thus, the resonant
frequency of the feedback circuit will be the only frequency where the oscillations will be
One of the simplest implementations for this type of oscillator uses an operational amplifier (opamp), three capacitors and four resistors, as shown in the diagram.
The mathematics for calculating the oscillation frequency and oscillation criterion for this circuit
are surprisingly complex, due to each RC stage loading the previous ones. The calculations are
greatly simplified by setting all the resistors (except the negative feedback resistor) and all the
capacitors to the same values. In the diagram, if R1=R2=R3=R, and C1=C2=C3=C, then:
and the oscillation criterion is:
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