Rishi Agarwal
Graduate Student
Computer Science Department,
UIUC, USA
Residence: 1010 W Clark St, Urbana, IL, USA
Phone
: 1-217-419-3046
Email
: iitk.rishi@gmail.com
EDUCATION
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PhD: 2009 onwards
Computer Science, University of Illinois at
Urbana-Champaign
CGPA : 4.0/4.0
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Bachelor of Technology : 2004-2008
Computer Science, IIT Kanpur, India
CGPA: 3.9/4.0
RESEARCH PROJECTS
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Ubiquitous High Performance Computing Architectures
Authors: Rishi Agarwal, Josep Torrellas , and Intel Collaborators
 Working with Intel researchers on a DARPA project to design very energy-efficient extreme-scale
computer architectures. Currently examining issues related to memory hierarchy design, interconnection
network, and memory consistency.
 Implemented support for software managed cache, scratchpad, switching caches on/off and Mesh
interconnect in SESC simulator.
Refresh: Scalable Checkpointing for Coherent Shared Memory, ISCA 2011
Authors: Rishi Agarwal, Pranav Garg and Josep Torrellas
 The hardware-based global checkpointing schemes proposed for small shared-memory machines do
not scale well due to global operations (syncs and writebacks), work lost to recovery, and inefficiencies in
imbalanced or I/O-intensive loads.
 We introduce Refresh, a novel hardware-based scheme for coordinated local checkpointing in
multiprocessors with directory-based coherence. Refresh leverages the transactions of a directory
protocol to track inter-thread dependences. It also introduces distributed algorithms for
checkpointing and rollback sets of processors.
 Refresh improves checkpointing efficiency with architectures to (i) delay the write back of data to
safe memory in checkpoints, (ii) support operation with multiple checkpoints, and (iii) hide checkpoint
overhead under barrier synchronization.
 Simulations of programs with up to 64 threads show that Refresh is scalable and has very low
overhead. Its average execution overhead is 2%, compared to 15% for global checkpointing.
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Minimizing Squashes in Block-Based Multiprocessors by Intelligently Slicing Code into
Atomic Block, ISCA 2011
Authors: Rishi Agarwal and Josep Torrellas
 Performances of Multiprocessor architectures that continuously operate on atomic blocks are
limited by data collisions between threads leading to block squashes — especially if, to
enable more compiler optimization, blocks are large.
 We present techniques for automatically minimizing the cycles lost to squashes in these
architectures. We identify and characterize locations in the code that often cause
squashes. We call them Squash Hazards. For each of them, we propose a tailored squashremoving algorithm. We also describe a software only framework that profiles the code and
transforms it according to these algorithms.
 We test our framework on several PARSEC and SPLASH -2 codes for a 16-processor simulated
machine. Our results show that our approach removes, on average, 92% of the squash
cycles of the applications. As a result, on average, the applications are sped-up by 1.9x.
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Jose A. Joao, Onur Multu, Hyesoon Kim, Rishi Agarwal and Yale N. Patt, “Improving the
Performance of Object-Oriented Languages with Dynamic Predication of Indirect Jumps”,
Published in ASPLOS 2008.
Rishi Agarwal and Mainak Chaudhary, “Enhancing Memory Performance for Multi -Core
Architecture”, B.Tech report, IIT Kanpur, 2008.
Rishi Agarwal and Nikunj Bahagat, “Partition Clustering Algorithm for Biometric Databases,
Tech. Report, IIT Kanpur, 2007.
JOB AND INTERNSHIP EXPERIENCE
 Job: Microsoft Bing Search, Canada, Full Time Employee, August-2008 to July-2009
Core Relevance Team: Sambavi Muthukrishnan and Andrey Proskurin, Microsoft
 Implemented the support for multiple on-flight queries in the search engine infrastructure.
 Designed and implemented the “training and validating” infrastructure for query alteration s.
 Designed and experimented with several algorithms which improved the quality of query
alterations.
 Internship: Microsoft Research Redmond, USA, Summer-2007
Improving the Performance of Object-Oriented Languages with Dynamic Predication of Indirect
Jumps
Supervisor: Onur Mutlu, MSR and Jose A. Joan, UT Austin
 Analyzed the source codes and generated traces for more than 20 programs/applications
which include Dacapo Benchmarks (Java), M5 (C++), MATLAB (Java), Image Processing Toolkit
(C#) etc.
 Used tools like Intel‟s Vtune, Truscan etc. to analyze overheads of high indirect branch
misprediction and L1, L2 cache stalls.
 Developed various tools and scripts to automate job submission to cluster, data collection,
parsing output files, and graph generation.
 Co-authored a research paper published in ASPLOS 2008 describing a novel solution to the
problem.
Parallelism Aware DRAM Scheduling Algorithm
Supervisor: Onur Mutlu, MSR and Thomas Moscibroda, MSR
 Contributed in developing a new DRAM scheduling algorithm which takes into account
the amount of parallelism present in outstanding memory requests.
Coded (C#) this algorithm in the simulation environment and tested it heavily with SPEC
benchmarks.
 Internship: National Instruments, India, Summer -2006
Software solution for converting NTSC signals into video (RGB Bitmaps) stream
Supervisor: Abhishek Nag and Satish Mohan Ram NI India
 Developed software that generates a RGB image from NTSC signals (acquired using NI
PXI-1411).
 Coded 15000 lines of C program which was fast enough to decode 20 frames/second.
 Project involved intensive Signal and Image Processing concepts.
 Deployed 12 different filters to decode incoming signals.
SCHOLASTIC ACHIEVEMENTS
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Awarded with Andrew and Shana Laursen Fellowship, UIUC, 2009.
Awarded with the Academic Excellence Award of IIT Kanpur continuously for all the years.
Awarded with prestigious best Final year Computer Science Student at IIT Kanpur.
Highest Honor in Computer Science Department with perfect GPA till 7 th Semester.
Selected for prestigious Indian Oil Scholarship given to only 70 students in India, 2004 -2008.
Received Ram Rajendra Malhotra Scholarship, given to only one student in the institute,2005
Awarded with Simran Mandeep Scholarship, given to only one student in the institute,2006
A recipient of Dayanand Scholarship, given to two students in the institute, 2006 -2008.
TECHNICAL SKILLS
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Programming language: C/C++ (6 year), Java (4 year), VC++ (3 year), C# (3 year)
Scripting and Functional Language: Perl, JScript, PHP, Ruby, ML, OZ, Compute Cluster.
Web: HTML/XHTML, Ajax, XML (DOM, SAX parsing), PHP/MySQL, JavaScript, ASP.net.
Environment: Dos, Windows 9x/NT/XP/Vista/7, Linux/Unix environment.
Hardware: Assembly Language, Intel 8086 Architecture, Virology/VHDL.
Others: MATLAB, LabVIEW, Flash, Lex, Yacc, CVS, Make, Bash, XML , UML, Gnuplot, Visual
Studio.
OTHER SELECTED PROJECTS
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Clustering Algorithm for Biometric Databases (Java, 2000 lines, team of two)
Compiler for ML (C, 10000 lines, team of five)
Database for Biometric Applications (Php/MySql, 2000 lines, team of two)
Iris and Fingerprint Recognition System (Java, 6000 lines, team of five)
NetPerf, a network performance measurement tool (C, 1300 lines, team of two)
Extension of Nachos (C, 2000 lines, team of three)
Remote Sensing: Wind Reversal in Tsunami (J ava, 2000 lines, team of three)
Implementation of a functional processor on an FPGA (Ve rilog, 1500 lines, team of two)
Automated acquisition of image from microscope camera (LabView)
Autonomous White Line Follower Robot (8051 Microcontroller, team of two)
RELEVANT COURCES
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Data Structures and Algorithms
Discrete Mathematics
Computer Organization
Principles of Databases
Operating Systems
Theory of Computation
Linear Programming
Principles of Numerical Computation
Theory of Bio-Computing
Programming Tools and Techniques
Computer Networks
Advanced Algorithms
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Compiler Design
Advanced Computer Architecture
Principles of Programming Languages
Software Engineering
Complex Analytics Dynamics and
Fractals
Machine learning and Knowledge
Discovery( audited)
Randomized Algorithm (audited)
Parallel Computer Architecture
Advanced Compiler Construction
Fault-Tolerant Dig System Design
EXTRACURRICULAR ACTIVITIES
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Student representative in DUGC (Departmental Undergraduate Committee) of CSE
department. Served as a member of decision panel for degree termination c ases of students
under „Academic Provision‟.
Served as Student Guide, under Counseling Service IITK, entrusted with the responsibility
of guiding and edifying 8 new entrants of 2005 batch.
Selected as Link Student for CSE department for two consecutive years. Dealt with 15 students
under „Academic Provision‟ (AP) and helped 13 of them to get out of AP.
Held the post of Website and Newsletter Coordinator, ACA (Association of Computer
Activities). Developed a new website and introduced a forum feature in the website for the first
time.
Held the post of Website Coordinator, SFS (Student Film Society). Developed two flash based
website for SFS and UMANG, Inter College film festival of IIT Kanpur.
Actively participated in various social activities.
 Involved in teaching poor students in villages.
 Active member of Ram Krishna Seva Sansthan, dedicated to help poor and needy people.