ADSP-BF538F EZ-KIT Lite®
Evaluation System Manual
Revision 1.2, April 2008
Part Number
82-000945-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
©2008 Analog Devices, Inc., ALL RIGHTS RESERVED. This document
may not be reproduced in any form without prior, express written consent
from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices icon bar and logo, VisualDSP++, the VisualDSP++
logo, Blackfin, the Blackfin logo, the CROSSCORE logo, EZ-KIT Lite,
and EZ-Extender are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-BF538F EZ-KIT Lite is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end
product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-BF538F EZ-KIT Lite has been certified to comply with the
essential requirements of the European EMC directive 89/336/EEC
amended by 93/68/EEC and therefore carries the “CE” mark.
The ADSP-BF538F EZ-KIT Lite has been appended to Analog Devices,
Inc. Technical Construction File (TCF) referenced ‘DSPTOOLS1’ dated
December 21, 1997 and was awarded CE Certification by an appointed
European Competent Body as listed below.
Technical Certificate No: Z600ANA1.028
Issued by: Technology International (Europe) Limited
60 Shrivenham Hundred Business Park
Shrivenham, Swindon, SN6 8TY, UK
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards in the protective
shipping package.
CONTENTS
PREFACE
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents ........................................................................... xiv
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ....................................................... xv
Supported Processors ....................................................................... xv
Product Information ...................................................................... xvi
MyAnalog.com ......................................................................... xvi
Processor Product Information .................................................. xvi
Related Documents ................................................................. xvii
Online Technical Documentation ........................................... xviii
Printed Manuals ........................................................................ xx
Notation Conventions .................................................................... xxi
USING ADSP-BF538F EZ-KIT LITE
Package Contents .......................................................................... 1-3
Default Configuration ................................................................... 1-3
Installation and Session Startup ..................................................... 1-5
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
v
CONTENTS
Evaluation License Restrictions ..................................................... 1-7
Memory Map ............................................................................... 1-7
SDRAM Interface ......................................................................... 1-8
Flash Memory ............................................................................ 1-10
CAN Interface ............................................................................ 1-11
ELVIS Interface .......................................................................... 1-12
Audio Interface ........................................................................... 1-12
LEDs and Push Buttons .............................................................. 1-13
Example Programs ...................................................................... 1-14
Background Telemetry Channel .................................................. 1-14
ADSP-BF538F EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
External Bus Interface Unit ..................................................... 2-3
SPORT0 Interface .................................................................. 2-4
SPI Interface ........................................................................... 2-4
UART Interface ...................................................................... 2-4
Programmable Flags ................................................................ 2-4
UART Port ............................................................................. 2-8
Expansion Interface ................................................................. 2-8
JTAG Emulation Port ............................................................. 2-9
Jumper and Switch Settings ........................................................... 2-9
CAN Enable Switch (SW2) ................................................... 2-10
UART Enable Switch (SW4) ................................................. 2-10
Push Button Enable Switch (SW5) ........................................ 2-11
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ADSP-BF538F EZ-KIT Lite Evaluation System Manual
CONTENTS
Flash Enable Switch (SW6) .................................................... 2-11
FCE Enable Switch (SW14) ................................................... 2-12
Audio Enable Switch (SW7) .................................................. 2-12
Boot Mode Select Switch (SW3) ............................................ 2-13
PPI Direction Control (JP1) .................................................. 2-13
UART Loop Jumper (JP9) ..................................................... 2-14
ELVIS Oscilloscope Configuration Switch (SW1) ................... 2-14
ELVIS Function Generator Configuration Switch (SW8) ........ 2-15
ELVIS Voltage Selection Jumper (JP6) ................................... 2-16
ELVIS Select Jumper (JP8) .................................................... 2-16
LEDs and Push Buttons .............................................................. 2-17
Reset Push Button (SW9) ...................................................... 2-17
Programmable Flag Push Buttons (SW10–13) ........................ 2-18
Power LED (LED7) ............................................................... 2-18
Reset LED (LED8) ................................................................ 2-18
User LEDs (LED2–6) ............................................................ 2-19
USB Monitor LED (ZLED3) ................................................. 2-19
Connectors ................................................................................. 2-20
Audio Connectors (J9 and J10) .............................................. 2-21
CAN Connectors (J5 and J11) ............................................... 2-21
RS-232 Connector (J6) .......................................................... 2-21
Power Connector (J7) ............................................................ 2-22
Expansion Interface Connectors (J1–3) .................................. 2-22
JTAG Connector (ZP4) ......................................................... 2-23
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
vii
CONTENTS
SPORT0 and SPORT1 Connectors (P6 and P7) .................... 2-23
PPI Connector (P8) .............................................................. 2-23
SPI Connector (P9) ............................................................... 2-24
2-Wire Interface Connector (P10) ......................................... 2-24
TIMERS Connector (P11) .................................................... 2-24
UART1 Connector (P12) ...................................................... 2-25
ADSP-BF538F EZ-KIT LITE BILL OF MATERIALS
ADSP-BF538F EZ-KIT LITE SCHEMATIC
Title Page ..................................................................................... B-1
Processor ...................................................................................... B-2
Processor Power ............................................................................ B-3
SDRAM and Flash ....................................................................... B-4
ADC and Audio In ....................................................................... B-5
DAC and Audio Out .................................................................... B-6
CAN ............................................................................................ B-7
Push Buttons, LEDs, and Boot Mode ............................................ B-8
ELVIS Interface ............................................................................ B-9
Expansion Interface and JTAG .................................................... B-10
Stamp Connectors ...................................................................... B-11
Misc Connectors ........................................................................ B-12
Power ......................................................................................... B-13
INDEX
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ADSP-BF538F EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-BF538F EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for Blackfin® processors.
Blackfin processors embody a new type of embedded processor designed
specifically to meet the computational demands and power constraints of
today’s embedded audio, video, and communications applications. They
deliver breakthrough signal-processing performance and power efficiency
within a reduced instruction set computing (RISC) programming model.
Blackfin processors support a media instruction set computing (MISC)
architecture. This architecture is the natural merging of RISC, media
functions, and digital signal processing (DSP) characteristics. Blackfin
processors deliver signal-processing performance in a microprocessor-like
environment.
Based on the Micro Signal Architecture (MSA), Blackfin processors combine a 32-bit RISC instruction set, dual 16-bit multiply accumulate
(MAC) DSP functionality, and 8-bit video processing performance that
had previously been the exclusive domain of very-long instruction word
(VLIW) media processors.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ix
The evaluation board is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the
ADSP-BF538F Blackfin processors. The VisualDSP++ development environment gives you the ability to perform advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-BF538F assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-BF538F processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface gives unrestricted access to the ADSP-BF538F processor and the
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/processors/index.html.
The ADSP-BF538F EZ-KIT Lite provides example programs to demonstrate the capabilities of the evaluation board.
ADSP-BF538F EZ-KIT Lite installation is part of the VisuL The
alDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
to “Evaluation License Restrictions” on page 1-7 and the VisualDSP++ Installation Quick Reference Card.
x
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
The board features:
• Analog Devices ADSP-BF538F processor
D
D
D
D
Core performance up to 600 MHz
External bus performance to 133 MHz
182-pin mini-BGA package
25 MHz crystal
• Synchronous dynamic random access memory (SDRAM)
D
MT48LC32M8 – 64 MB (8M x 8-bits x 4 banks) x 2 chips
• Flash memory
D
4MB (2M x 16-bits)
• Analog audio interface
D
D
D
D
AD1871 96 kHz analog-to-digital codec (ADC)
AD1854 96 kHz digital-to-audio codec (DAC)
1 input stereo jack
1 output stereo jack
• Controller Area Network (CAN) interface
D
Philips TJA1041 high-speed CAN transceiver
• National Instruments Educational Laboratory Virtual Instrumentation Suite (ELVIS) interface
D
D
D
LabVIEW™-based virtual instruments
Multifunction data acquisition device
Bench-top workstation and prototype board
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
xi
• Universal asynchronous receiver/transmitter (UART)
D
D
ADM3202 RS-232 line driver/receiver
DB9 female connector
• LEDs
D
10 LEDs: 1 power (green), 1 board reset (red), 1 USB (red),
5 general-purpose (amber), and 1 USB monitor (amber)
• Push buttons
D
5 push buttons: 1 reset, 4 programmable flags with
debounce logic
• Expansion interface
D
All processor signals
• Other features
D
JTAG ICE 14-pin header
The EZ-KIT Lite board has flash memory with a total of 4 MB. Flash
memory can be used to store user-specific boot code, allowing the board
to run as a stand-alone unit. For more information, see “Flash Memory”
on page 1-10. The board also has 64 MB of SDRAM, which can be used
by the user at runtime.
interfaces with the audio circuit, facilitating development of audio
signal processing applications. SPORT0, SPORT1, and SPORT2 also interface
to an off-board connector for communication with other serial devices.
For more information, see “SPORT0 Interface” on page 2-4.
SPORT0
The UART of the processor connects to an RS-232 line driver and a DB9
female connector, providing an interface to a PC or other serial device.
xii
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector
expansion interface. For more information, see “Expansion Interface” on
page 2-8.
Purpose of This Manual
The ADSP-BF538F EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-BF538F
EZ-KIT Lite. Finally, a schematic and a bill of materials are provided as a
reference for future designs.
The product software installation is detailed in the VisualDSP++ Installation Quick Reference Card.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-BF538/ADSP-BF538F Blackfin Processor Hardware Reference and Blackfin Processor Instruction Set Reference) that describe your
target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
xiii
Manual Contents
Manual Contents
The manual consists of:
• Chapter 1, “Using ADSP-BF538F EZ-KIT Lite” on page 1-1.
Describes EZ-KIT Lite functionality from a programmer’s perspective and provides an easy-to-access memory map.
• Chapter 2, “ADSP-BF538F EZ-KIT Lite Hardware Reference” on
page 2-1.
Provides information on the EZ-KIT Lite hardware components.
• Appendix A, “ADSP-BF538F EZ-KIT Lite Bill Of Materials” on
page A-1.
Provides a list of components used to manufacture the EZ-KIT
Lite board.
• Appendix B, “ADSP-BF538F EZ-KIT Lite Schematic” on
page B-1.
Provides the resources to allow EZ-KIT Lite board-level debugging
or to use as a reference design. Appendix B is part of the online
Help.
What’s New in This Manual
The ADSP-BF538F EZ-KIT Lite Evaluation System Manual has been
updated to reflect the latest revision of the board.
xiv
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
processor.tools.support@analog.com
• E-mail processor questions to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-BF538F Blackfin
embedded processors.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
xv
Product Information
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from printed publications (manuals).
Analog Devices is online at www.analog.com. Our Web site provides information about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
Registration:
Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com.
Registration takes about five minutes and serves as means for you to select
the information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
www.analog.com/processors, which provides access to technical publications, data sheets, application notes, product overviews, and product
announcements.
xvi
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• E-mail questions or requests for information to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Fax questions or requests for information to
1-781-461-3010 (North America)
+49-89-76903-157 (Europe)
Related Documents
For information on product related development software, see the following publications.
Table 1. Related Processor Publications
Title
Description
ADSP-BF538/ADSP-BF538F Embedded Processor
Data Sheet
General functional description, pinout, and
timing.
ADSP-BF538/ADSP-BF538F Blackfin Processor
Hardware Reference
Description of internal processor architecture and all register functions.
Blackfin Processor Programming Reference
Description of all allowed processor assembly instructions.
you plan to use the EZ-KIT Lite board in conjunction with a
L IfJTAG
emulator, also refer to the documentation that accompanies
the emulator.
All documentation is available online. Visit the Technical Library Web
site to access all processor and tools manuals and data sheets:
http://www.analog.com/processors/technicalSupport/technicalLibrary/.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
xvii
Product Information
Table 2. Related VisualDSP++ Publications
Title
Description
ADSP-BF538F EZ-KIT Lite Evaluation System
Manual
Description of the hardware capabilities of
the evaluation system; description of how to
access these capabilities in the VisualDSP++
environment.
VisualDSP++ User’s Guide
Description of the VisualDSP++ features and
usage.
VisualDSP++ Assembler and Preprocessor Manuals
Description of the assembler function and
commands.
VisualDSP++ C/C++ Complier and Library Manual for Blackfin Processors
Description of the complier function and
commands for Blackfin processors.
VisualDSP++ Linker and Utilities Manual
Description of the linker function and commands.
VisualDSP++ Loader and Utilities Manual
Description of the loader/splitter function
and commands.
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary .pdf files of most manuals are provided in the
Docs folder on the VisualDSP++ installation CD.
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the
VisualDSP++ environment, Windows® Explorer, or the Analog Devices
Web site. Each documentation file type is described as follows.
xviii
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
File
Description
.chm
Help system files and manuals in Help format
.htm or
.html
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the .html files requires a browser, such as
Internet Explorer 6.0 (or higher).
.pdf
VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat
Reader (4.0 or higher).
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and navigate to the VisualDSP++ documentation via
the Start menu.
To view ADSP-BF538F EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help
window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
Help system files (.chm) are located in the Help folder, and .pdf files are
located in the Docs folder of your VisualDSP++ installation CD-ROM.
The Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
Your software installation kit includes online Help as part of the Windows
interface. These help files provide information about VisualDSP++ and
the ADSP-BF538F EZ-KIT Lite evaluation system.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
xix
Product Information
Accessing Documentation From Web
Download manuals at the following Web site:
http://www.analog.com/processors/technicalSupport/technicalLibrary/.
Select a processor family and book title. Download archive (.zip) files,
one for each manual. Use any archive management software, such as WinZip, to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
xx
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
Notation Conventions
Text conventions used in this manual are identified and described as follows. Additional conventions, which apply only to specific chapters, may
appear throughout this document.
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
[this,…]
Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.
L
a
[
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
xxi
Notation Conventions
xxii
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1 USING ADSP-BF538F EZ-KIT
LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-BF538F EZ-KIT Lite evaluation system.
The information appears in the following sections.
• “Package Contents” on page 1-3
Lists the items contained in the ADSP-BF538F EZ-KIT Lite
package.
• “Default Configuration” on page 1-3
Shows the default configuration of the ADSP-BF538F EZ-KIT
Lite.
• “Installation and Session Startup” on page 1-5
Instructs how to start a new or open an existing ADSP-BF538F
EZ-KIT Lite session using VisualDSP++.
• “Evaluation License Restrictions” on page 1-7
Describes the restrictions of the VisualDSP++ demo license
shipped with the EZ-KIT Lite.
• “Memory Map” on page 1-7
Defines the ADSP-BF538F EZ-KIT Lite board’s memory map.
• “SDRAM Interface” on page 1-8·
Defines the register values to configure the on-board SDRAM.
• “Flash Memory” on page 1-10
Describes the internal and external flash memory.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1-1
• “CAN Interface” on page 1-11
Describes the on-board Controller Area Network (CAN) interface.
• “ELVIS Interface” on page 1-12
Describes the on-board National Instruments Educational Laboratory Virtual Instrumentation Suite (NI ELVIS) interface.
• “Audio Interface” on page 1-12
Describes the on-board audio circuit.
• “LEDs and Push Buttons” on page 1-13
Describes the board’s general-purpose IO pins and buttons.
• “Example Programs” on page 1-14
Provides information about example programs included in the
ADSP-BF538F EZ-KIT Lite evaluation system.
• “Background Telemetry Channel” on page 1-14
Highlights the advantages of the background telemetry channel
(BTC) feature of VisualDSP++.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For more detailed information about programming the ADSP-BF538F
Blackfin processor, see the documents referred to as “Related
Documents”.
1-2
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite
Package Contents
Your ADSP-BF538F EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-BF538F EZ-KIT Lite board
• VisualDSP++ Installation Quick Reference Card
• CD containing:
D
VisualDSP++ software
D
ADSP-BF538F EZ-KIT Lite debug software
D
USB driver files
D
Example programs
D
ADSP-BF538F EZ-KIT Lite Evaluation System Manual (this
document)
• Universal 7V DC power supply
• 6-foot 3.5 mm male-to-male audio cable
• 3.5 mm headphones
• 10-foot USB 2.0 cable
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The ADSP-BF538F EZ-KIT Lite board is designed to run outside your
personal computer as a stand-alone unit. You do not have to open your
computer case.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1-3
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards in the protective
shipping package.
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components. Figure 1-1 shows the default jumper settings,
switches, connector locations, and LEDs used in installation. Confirm
that your board is in the default configuration before using the board.
Figure 1-1. EZ-KIT Lite Hardware Setup
1-4
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite
Installation and Session Startup
correct operation, install the software and hardware in the
L For
order presented in the VisualDSP++ Installation Quick Reference
Card.
1. Verify that the yellow USB monitor LED (ZLED3, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start –>Programs menu.
The main window appears. Note that VisualDSP++ does not connect to any session. Skip the rest of this step to step 3.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 4.
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Session from the Session List dialog box.
• From the Session menu, Connect to Target.
4. The Select Processor page of the wizard appears on the screen.
Ensure Blackfin is selected in Processor family. In Choose a target
processor, select ADSP-BF538F. Click Next.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1-5
Installation and Session Startup
5. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen.
In the Select your platform list, select ADSP-BF538F EZ-KIT
Lite via Debug Agent. In Session name, highlight or specify the
session name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and to open a
new session.
Click Next.
7. The Finish page of the wizard appears on the screen. The page displays your selections. If you are satisfied, click Finish. If not, click
Back to make changes.
disconnect from a session, click the disconnect button
L Toor select
Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the session name from the list and click Delete. Click OK.
1-6
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite
Evaluation License Restrictions
The ADSP-BF538F EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
• VisualDSP++ allows a connection to the ADSP-BF538F EZ-KIT
Lite via the USB debug agent interface only. Connections to simulators and emulation products are no longer allowed.
• The linker restricts a users program to 20 KB of internal memory
for code space with no restrictions for data space.
EZ-KIT Lite hardware must be connected and powered up to
L The
use VisualDSP++ with a valid evaluation or permanent license.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
Memory Map
The ADSP-BF538F processor has internal SRAM that can be used for
instruction or data storage. SRAM configuration details can be found in
the ADSP-BF538/ADSP-BF538F Blackfin Processor Hardware Reference.
The ADSP-BF538F EZ-KIT Lite board includes two types of external
memory: SDRAM and flash.
The size of SDRAM is 64 Mbytes (32M x 16-bit). The processor’s memory select pin, ~SMS0, is configured for SDRAM.
The size of the external flash memory is 4 Mbytes (2M x 16-bits), and the
size of the internal flash memory is 1 Mbyte. The processor’s asynchronous memory select pins (~AMS3–0) are configured for flash memory. Any
of the ~AMS signals can be mapped to internal or external flash memory.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1-7
SDRAM Interface
Table 1-1. EZ-KIT Lite Evaluation Board Memory Map
Start Address
External
Memory
End Address
Content
0x0000 0000
0x03FF FFFF
SDRAM bank 0 (SDRAM). See “SDRAM Interface” on page 1-8.
0x2000 0000
0x200F FFFF
ASYNC memory bank 0. See “Flash Memory” on
page 1-10.
0x2010 0000
0x201F FFFF
ASYNC memory bank 1. See “Flash Memory” on
page 1-10.
0x2020 0000
0x202F FFFF
ASYNC memory bank 2. See “Flash Memory” on
page 1-10.
0x2030 0000
0x203F FFFF
ASYNC memory bank 3. See “Flash Memory” on
page 1-10.
All other locations
Internal
Memory
Not used
0xFF80 0000
0xFF80 3FFF
Data bank A SRAM 16 KB
0xFF80 4000
0xFF80 7FFF
Data bank A SRAM/CACHE 16 KB
0xFF90 0000
0xFF90 7FFF
Data bank B SRAM 16 KB
0xFF90 4000
0xFF90 7FFF
Data bank B SRAM/CACHE 16 KB
0xFFA0 0000
0xFFA0 7FFF
Instruction bank A SRAM 32 KB
0xFFA1 0000
0xFFA1 3FFF
Instruction bank B SRAM 16 KB
0xFFA0 8000
0xFFA0 BFFF
Instruction SRAM/CACHE 16 KB
0xFFB0 0000
0xFFB0 0FFF
Scratch pad SRAM 4 KB
0xFFC0 0000
0xFFDF FFFF
System MMRs 2 MB
0xFFE0 0000
0xFFFF FFFF
Core MMRs 2 MB
All other locations
Reserved
SDRAM Interface
The three SDRAM control registers must be initialized in order to use the
MT48LC32M8A2 32M x 16 bits (64 MB) SDRAM memory. When you
are in a VisualDSP++ session and connect to the EZ-KIT Lite board, the
1-8
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite
SDRAM registers are configured automatically through the debugger each
time the processor is reset. The values in Table 1-2 are used whenever
SDRAM bank 0 is accessed through the debugger (for example, when
viewing memory windows or loading a program). The numbers were
derived for maximum flexibility and work for a system clock frequency
between 54 MHz and 133 MHz.
Table 1-2. EZ-KIT Lite Session SDRAM Default Settings1
Register
Value
Function
EBIU_SDGCTL
0x0091998D
Calculated with SCLK = 133 MHz
16-bit data path
External buffering timing disabled
tWR = 2 SCLK cycles
tRCD = 3 SCLK cycles
tRP = 3 SCLK cycles
tRAS = 6 SCLK cycles
pre-fetch disabled
CAS latency = 3 SCLK cycles
SCLK1 disabled
EBIU_SDBCTL
0x00000025
Bank 0 enabled
Bank 0 size = 64 MB
Bank 0 column address width = 10 bits
EBIU_SDRRC
0x000003A0
Calculated with SCLK = 54 MHz
RDIV = 416 clock cycles
1
54 MHz <=SCLK <= 133 MHz.
To re-write the EBIU_SDGCTL register within the user code, first, place the
chip in self-refresh (see the ADSP-BF538/ADSP-BF538F Blackfin Processor
Hardware Reference). Clearing the appropriate checkbox on the Target
Options dialog box, which is accessible through the Settings pull-down
menu, disables the automatic and allows manual configuration. For more
information, see online Help.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1-9
Flash Memory
Automatic configuration of SDRAM is not optimized for any SCLK frequency. Table 1-3 shows optimized configuration for the SDRAM
registers using a 125 MHz and 133 MHz SCLK. Only the EBIU_SDRRC register needs to be modified in the user code to achieve maximum
performance.
Table 1-3. SDRAM Optimum Settings
Register
SCLK = 133 MHz
(CCLK = 400 MHz)
SCLK = 125 MHz
(CCLK = 500 MHz)
EBIU_SDGCTL
0x0091 998D
0x0091 998D
EBIU_SDBCTL
0x0000 0025
0x0000 0025
EBIU_SDRRC
0x0000 0408
0x0000 03A0
An example program is included in the EZ-KIT Lite installation directory
to demonstrate the SDRAM memory setup.
Flash Memory
The flash memory interface of the ADSP-BF538F EZ-KIT Lite can connect to an external 4 MB (2M x 16-bits) ST Micro M29W320EB device
or the 1 MB internal flash memory. The size and connections of flash
memory are controlled by the flash address range switch (SW6) and the flash
chip enable (FCE) switch (SW14). See “Flash Enable Switch (SW6)” on
page 2-11 and “FCE Enable Switch (SW14)” on page 2-12.
The default for the SW6 switch is all positions ON, which allows the user to
have access to the full 4 MB of the external flash memory. The default for
the SW14 switch is all positions OFF, which allows the user to have access to
the full 4 MB of the external flash memory. Each ~AMS signal accounts for
1 MB of flash memory. The amount of available flash memory decreases
as ~AMS signals are turned OFF.
1-10
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite
Example code is provided in the EZ-KIT Lite installation directory to
demonstrate how to program flash memory.
Table 1-4 shows a sample value for the asynchronous memory configuration register, EBIU_AMBCTL0.
Table 1-4. Asynchronous Memory Control Register Setting Example
Register
Value
Function
EBIU_AMBCTL0
0x7BB07BB0
Timing control for banks 1 and 0
CAN Interface
The Controller Area Network interface contains a Philips TJA1041
high-speed CAN transceiver. The PD9 programmable flag connects to the
error and power-on indication output (ERR). The PC1 of the processor connects to the receive data output (RXD), and PCO connects to the transmit
data input (TXD).
The CAN interface can be disconnected from the processor by turning
positions 1 though 4 of the SW2 switch OFF. When in the OFF position, the
signals can be used elsewhere on the board. See “CAN Enable Switch
(SW2)” on page 2-10 for more information.
The CAN interface contains two 4-position modular connectors (see
“CAN Connectors (J5 and J11)” on page 2-21).
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate CAN circuit operation.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1-11
ELVIS Interface
ELVIS Interface
This EZ-KIT Lite board contains the National Instruments ELVIS interface. The interface features the DC voltage and current measurement
modules, oscilloscope and bode analyzer modules, function generator,
arbitrary waveform generator, and digital IO.
The ELVIS interface is a NI LabVIEW-based design and prototype environment for university science and engineering laboratories. The ELVIS
interface consists of the LabVIEW-based virtual instruments, a multifunction data acquisition (DAQ) device, and a custom-designed bench-top
workstation and prototype board. This combination provides a
ready-to-use suite of instruments found in most educational laboratories.
Because the interface is based on the LabVIEW and provides complete
data acquisition and prototyping capabilities, the system is ideal for academic coursework that range from lower-division classes to advanced
project-based curriculums.
For more information on ELVIS and example demonstration programs,
visit National Instruments Web site at www.ni.com.
Audio Interface
The audio circuit of the EZ-KIT Lite consists of an AD1871 analog-to-digital converter (ADC) and an AD1854 digital-to-analog
converter (DAC). The audio circuit provides one channel of stereo input
and one channel of stereo output via 3.5 mm stereo jacks. The SPORT0
interface of the processor is linked with the stereo audio data input and
output pins of the audio circuit.
1-12
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite
The frame sync and bit clocks are generated from the ADC and feed to the
processor because the ADC is operating in master mode. The audio interface samples data at a 48 kHz sample rate. The serial data interface
operates in 2-wire interface (TWI) mode and connects to SPORT0 of the
processor.
The audio interface can be disconnected from the SPORT0 by turning
positions 1 and 5 of the SW7 switch OFF. When in the OFF position, the
SPORT0 signals can be used on the SPORT0 connector (P6) or on the expansion interface (see “SPORT0 and SPORT1 Connectors (P6 and P7)” on
page 2-23 and “Audio Enable Switch (SW7)” on page 2-12 for more
information).
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate audio circuit operation.
LEDs and Push Buttons
The EZ-KIT Lite provides four push buttons and five LEDs for general-purpose IO.
The five LEDs, labeled LED2 through LED6, are accessed via the PC5–9 processor pins. For information on how to program the pins, refer to the
ADSP-BF538/ADSP-BF538F Blackfin Processor Hardware Reference.
The four general-purpose push button are labeled SW10 through SW13. A
status of each individual button can be read through the processor’s programmable flag inputs, PF0–3. The signal reads 1 when a corresponding
switch is being pressed-on. When the switch is released, the signal reads 0.
A connection between the push button and programmable flag input is
established through the DIP switch, SW5. See “LEDs and Push Buttons”
on page 2-17 for details.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate functionality of the LEDs and push buttons.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1-13
Example Programs
Example Programs
Example programs are provided with the ADSP-BF538F EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software and can be found in the
<install_path>\Blackfin\Examples\ADSP-BF538F EZ-KIT Lite VisualDSP++ directory. Please refer to the readme file provided with each
example for more information.
Background Telemetry Channel
The ADSP-BF538F USB debug agent supports the background telemetry
channel (BTC), which facilitates data exchange between VisualDSP++ and
the processor without interrupting processor execution.
The BTC allows you to view a variable as it is updated or changed, all
while the processor continues to execute. For increased performance of the
BTC, including faster reading and writing, please check our latest line of
Blackfin processor emulators at:
http://www.analog.com/processors/blackfin/evaluationDevelopment/crosscore/.
For more information about the background telemetry
channel, see the VisualDSP++ User’s Guide or online Help.
1-14
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2 ADSP-BF538F EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-BF538F EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 2-2
Describes the ADSP-BF538F EZ-KIT Lite board configuration
and explains how the board components interface with the
processor.
• “Jumper and Switch Settings” on page 2-9
Shows the locations and describes the configuration jumpers and
switches.
• “LEDs and Push Buttons” on page 2-17
Shows the locations and describes the LEDs and push buttons.
• “Connectors” on page 2-20
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board.
RS-232
Female
RS-232
Interface
UARTs
64 MB
SDRAM
4 MB
Flash
(32M x 16)
(2M x 16 )
RTC
EBUI
ADSP-BF538F
DSP
SPORTs
Expansion
Connectors
(3)
SPIs
PPI
GPIO
Timer
Conn
TWI
JTAG
Port
Debug
Agent
CAN
Transceiver
CAN
(2)
RJ10
(2)
TWI
Conn
USB
Conn
32.768 KHz
Oscillator
Timers
25 MHz
Oscillator
JTAG
Conn
PBs (4)
LEDs (6)
ADC/
DAC
+7.0V
Connector
ELVIS
Power
Regulation
(3)
UART
Conns
(4)
SPORT
Conns
(3)
SPI
Conns
PPI
Conn
Stereo
In/Out
Figure 2-1. System Architecture
This EZ-KIT Lite is designed to demonstrate capabilities of the
ADSP-BF538F Blackfin processor. The processor has an IO voltage of
3.3V. The core voltage of the processor is supplied by the internal voltage
regulator.
2-2
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
The core voltage and the core clock rate can be set on the fly by the processor. The input clock is 25 MHz. A 32.768 kHz crystal supplies the
real-time clock (RTC) inputs of the processor. The default boot mode for
the processor is flash boot. See “Boot Mode Select Switch (SW3)” on
page 2-13 for information about changing the default boot mode.
External Bus Interface Unit
The external bus interface unit (EBIU) connects external memory to the
ADSP-BF538F processor. The unit includes a 16-bit wide data bus, an
address bus, and a control bus. On the EZ-KIT Lite, the EBIU connects
to the SDRAM, flash memory, and expansion interfaces.
The 64 Mbytes (32M x 16 bits) of SDRAM connect to the synchronous
memory select 0 pin (~SMS0). Refer to “SDRAM Interface” on page 1-8
for information about SDRAM configuration. Note that SDRAM clock is
the processor’s clock out (CLK OUT), which must not exceed 133 MHz.
The flash memory device connects to the asynchronous memory select signals, ~AMS3 through ~AMS0. The device provides a total of 4 MB of
external flash memory or 1 MB of internal flash memory. The processor
can use flash memory for both booting and storing information during a
standard mode of operation. Refer to “Flash Memory” on page 1-10 for
details.
All of the address, data, and control signals are available externally via the
expansion interface (J1–3). The pinout of these connectors can be found
in “ADSP-BF538F EZ-KIT Lite Schematic” on page B-1.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-3
System Architecture
SPORT0 Interface
connects to the audio circuit, SPORT0 connector (P6), and expansion interface. The audio circuit uses the primary data transmit and
receive pins to input and output data from the audio input and outputs.
SPORT0
and SPORT2 of the processor connect to the SPORT connectors (P3
and P4) and expansion interface.
SPORT1
The pinout of the SPORT interface and expansion interface connectors
can be found in “ADSP-BF538F EZ-KIT Lite Schematic” on page B-1.
SPI Interface
The serial peripheral interface (SPI) of the processor connects to the SPI
connectors (P1, P2, and P9) and expansion interface.
UART Interface
The UART interface of the processor connects to the UART connectors
(P12, P14, and P15) and expansion interface.
Programmable Flags
The processor has 53 general-purpose input/output (GPIO) signals spread
across four ports (PC, PD, PE, and PF). The pins are multi-functional and
depend on the processor setup. Table 2-1 shows how the programmable
flag pins are used on the EZ-KIT Lite.
Table 2-1. Programmable Flag Connections
2-4
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PC0
CANTX
UART0 CTS/CAN transmit
PC1
CANRX
UART0 CTS/CAN receive
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
Table 2-1. Programmable Flag Connections (Cont’d)
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PC5
LED (LED2) or ELVIS_PF1. See “LED and
Push Button Locations” on page 2-17 and
“Push Button Enable Switch (SW5)” on
page 2-11 for information on how to disable
the push button.
PC6
LED (LED3) or ELVIS_PF2. See “LED and
Push Button Locations” on page 2-17 and
“Push Button Enable Switch (SW5)” on
page 2-11 for information on how to disable
the push button.
PC7
LED (LED4) or ELVIS_PF5. See “LED and
Push Button Locations” on page 2-17 and
“Push Button Enable Switch (SW5)” on
page 2-11 for information on how to disable
the push button.
PC8
LED (LED5) or ELVIS_PF6. See “LED and
Push Button Locations” on page 2-17 and
“Push Button Enable Switch (SW5)” on
page 2-11 for information on how to disable
the push button.
PC9
LED (LED6) or ELVIS_PF7. See “LEDs and
Push Buttons” on page 1-13 and “Push Button Enable Switch (SW5)” on page 2-11 for
information on how to disable the push button.
PD0
MOSI1
Not used
PD1
MISO1
Not used
PD2
SCK1
Not used
PD3
SPI1SS
Not used
PD4
SPI1SEL
AUDIO_RESET
PD5
MOSI2
Not used
PD6
MISO2
Not used
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-5
System Architecture
Table 2-1. Programmable Flag Connections (Cont’d)
2-6
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PD7
SCK2
PPI_DIR_CTL
(for AV-Extender®)
PD8
SPI2SS
PPI_CLK_SEL
(for AV-Extender)
PD9
SPI2SEL
CAN_ERR
PD10
RX1
Not used
PD11
TX1
Not used
PD12
RX2
Not used
PD13
TX2
Not used
PE0
RSCLK2
Not used
PE1
RFS2
Not used
PE2
DR2PRI
Not used
PE3
DR2SEC
Not used
PE4
TSCLK2
Not used
PE5
TFS2
Not used
PE6
DT2PRI
Not used
PE7
DT2SEC
Not used
PE8
RSCLK3
Not used
PE9
RFS3
Not used
PE10
DR3PRI
Not used
PE11
DR3SEC
Not used
PE12
TSCLK3
Not used
PE13
TFS3
Not used
PE14
DT3PRI
Not used
PE15
DT3SEC
Not used
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
Table 2-1. Programmable Flag Connections (Cont’d)
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PF0
SPISS
Push button (SW13). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-18.
PF1
SPI0SEL1/TMRCLK
Push button (SW12). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-18.
PF2
SPI0SEL2
Push button (SW11). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-18.
PF3
PPI_FS3/SPI0SEL3
Push button (SW10). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-18.
PF4
PPI_D15/SPI0SEL4
Not used
PF5
PPI_D14/SPI0SEL5
Not used
PF6
PPI_D13/SPI0SEL6
Not used
PF7
PPI_D12/SPI0SEL7
Not used
PF8
PPI_D11
Not used
PF9
PPI_D10
Not used
PF10
PPI_D9
Not used
PF11
PPI_D8
Not used
PF12
PPI_D7
Not used
PF13
PPI_D6
Not used
PF14
PPI_D5
No used
PF15
PPI_D4
Not used
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-7
System Architecture
UART Port
The universal asynchronous receiver/transmitter (UART) port of the processor connects to the ADM3202 RS-232 line driver as well as to the
expansion interface. The RS-232 line driver connects to the DB9 female
connector, providing an interface to a PC and other serial devices.
Expansion Interface
The expansion interface consists of three 90-pin connectors. Table 2-2
shows the interfaces each connector provides. For the exact pinout of the
connectors, refer to “ADSP-BF538F EZ-KIT Lite Schematic” on
page B-1. The mechanical dimensions of the connectors can be obtained
from Technical or Customer Support.
Analog Devices offers many EZ-Extender products that plug on to the
expansion interface. For more information on these products, visit the
Analog Devices Web site at www.analog.com.
Table 2-2. Expansion Interface Connectors
Connector
Interfaces
J1
5V, GND, address, data, PPI
J2
3.3V, GND, SPI, NMI, TMR2–0, SPORT0, SPORT1, PF15–0, EBUI control signals
J3
5V, 3.3V, GND, UART, flash IO, reset, audio control signals
Limits to the current and to the interface speed must be taken into consideration when using the expansion interface. The maximum current limit is
dependent on the capabilities of the used regulator. Additional circuitry
also can add extra loading to signals, decreasing their maximum effective
speed.
Devices does not support and is not responsible for the
[ Analog
effects of additional circuitry.
2-8
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory through a 6-pin interface. The JTAG emulation port of the processor connects also to the USB debugging interface.
When an emulator connects to the board at ZP4, the USB debugging
interface is disabled. See “JTAG Connector (ZP4)” on page 2-23 for more
information about the connector.
To learn more about available emulators, contact Analog Devices (see
“Processor Product Information”).
Jumper and Switch Settings
The jumper and switch locations are shown in Figure 2-2.
Figure 2-2. Jumper and Switch Locations
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-9
Jumper and Switch Settings
CAN Enable Switch (SW2)
The Controller Area Network (CAN) enable switch (SW2) disconnects
CAN signals from the GPIO pins of the processor. When the SW2 switch is
in the OFF position, the associated GPIO signals (see Table 2-3) can be
used on the expansion interface.
Table 2-3. CAN Enable Switch (SW2)
CAN Signal
SW2 Switch Position (Default)
Processor Signal
ENABLE
1 (ON)
NU
STANDBY
2 (ON)
NU
ERROR
3 (ON)
PD9
RECEIVE DATA
4 (ON)
PC1
UART Enable Switch (SW4)
The UART enable switch (SW4) disconnects UART signals from the GPIO
pins of the processor. When the switch is in the OFF position, the associated GPIO signals (see Table 2-4) can be used on the expansion interface.
Table 2-4. UART Enable Switch (SW4)
EZ-KIT Lite Signal
SW4 Switch Position (Default)
Processor Signal
CTS
1 (ON)
PC0
RX0
2 (ON)
NU
RTS
3 (ON)
PC1
LOOPBACK
4 (OFF)
NU
2-10
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
Push Button Enable Switch (SW5)
The push button enable switch (SW5) disconnects the associated signal and
the push button circuit drivers from the GPIO pins of the processor.
When the SW5 switch is in the OFF position, the GPIO signal
(see Table 2-5) can be used on the expansion interface.
Table 2-5. Push Button Enable Switch (SW5)
Push Button
SW5 Switch Position (Default)
Processor Signal
PB1 (SW13)
1 (ON)
PF0
PB2 (SW12)
2 (ON)
PF1
PB3 (SW11)
3 (ON)
PF2
PB4 (SW10)
4 (ON)
PF3
Flash Enable Switch (SW6)
The flash enable switch (SW6) disconnects the ~AMS signals from the external flash memory, allowing other devices to utilize the signals via the
expansion interface. For each switch listed in Table 2-6 that is turned OFF,
the size of available flash memory is reduced by 1 MB.
Table 2-6. Flash Enable Switch (SW6)
Processor Signal
SW6 Switch Position (Default)
~AMS0
1 (ON)
~AMS1
2 (ON)
~AMS2
3 (ON)
~AMS3
4 (ON)
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-11
Jumper and Switch Settings
FCE Enable Switch (SW14)
The flash chip enable (FCE) switch (SW14) selects which ~AMS signals connect to the internal flash memory. Since the internal memory is 1 MB,
only one ~AMS signal must be connected at a time. For each switch listed in
Table 2-7 that is turned ON, the size of available flash memory is reduced
by 1 MB.
Table 2-7. FCE Enable Switch (SW14)
Processor Signal
SW14 Switch Position (Default)
~AMS0
1 (OFF)
~AMS1
2 (OFF)
~AMS2
3 (OFF)
~AMS3
4 (OFF)
Audio Enable Switch (SW7)
The audio enable switch (SW7) disconnects the audio signals from the processor (positions 1–5) and determines how the clock for the audio circuit
generates and connects (positions 6–8). Position 8 determines if the ADC
is in master or slave mode. When in master mode (position 8 is ON), the
ADC generates the clock. When in slave mode (position 8 is OFF), the processor generates the clock. Positions 6 and 7 connect together the transmit
and receive clocks (see Table 2-8).
Table 2-8. Audio Enable Switch (SW7)
EZ-KIT Lite Signal
SW7 Switch Position (Default)
Processor Signal
DR0PRI
1 (ON)
DR0PRI
RSCLK0
2 (ON)
RSCLK0
RFS0
3 (ON)
RFS0
2-12
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
Table 2-8. Audio Enable Switch (SW7) (Cont’d)
EZ-KIT Lite Signal
SW7 Switch Position (Default)
Processor Signal
TSCLK0
4 (ON)
TSCLK0
TFS0
5 (ON)
TFS0
Clock loopback
6 (ON)
NU
FS loopback
7 (ON)
NU
ADC master/slave
8 (ON)
NU
Boot Mode Select Switch (SW3)
The rotary switch (SW3) determines the boot mode of the processor.
Table 2-9 shows the available boot mode settings. By default, the
ADSP-BF538F processor boots from the on-board flash memory.
Table 2-9. Boot Mode Select Switch (SW3)
SW3 Position 1
SW3 Position 2
Processor Boot Mode
ON
ON
Execute from 16-bit external memory
ON
OFF
Boot from 16-bit flash memory (default)
OFF
ON
Boot from SPI serial master
OFF
OFF
Boot from SPI serial slave
PPI Direction Control (JP1)
The PPI direction control jumper (JP1) is used when the board connects
to a Blackfin AV EZ-Extender. JP1 allows the GPIO signal PD7 to control
the direction of the PPI bus via a software flag. The default is positions 1
and 2. When connected to the extender, JP1 must be placed in positions 2
and 3.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-13
Jumper and Switch Settings
UART Loop Jumper (JP9)
The UART loop jumper (JP9) is for looping the transmit and receive signals. The default is OFF.
ELVIS Oscilloscope Configuration Switch (SW1)
The oscilloscope configuration switch (SW1) determines which audio circuit signals connect to channels A and B of the oscilloscope. The switch is
used when the board connects to the Educational Laboratory Virtual
Instrumentation Suite (ELVIS) station (see “ELVIS Interface” on
page 1-12). Each channel must have only one signal selected at a time (see
Table 2-10).
Table 2-10. Oscilloscope Configuration Switch (SW1)
Channel
SW1 Switch Position (Default)
Audio Circuit Signal
A
1 (OFF)
AMP_LEFT_IN
A
2 (OFF)
AMP_RIGHT_IN
A
3 (OFF)
LEFT_OUT
A
4 (OFF)
RIGHT_OUT
B
5 (OFF
AMP_LEFT_IN
B
6 (OFF)
AMP_RIGHT_IN
B
7 (OFF)
LEFT_OUT
B
8 (OFF)
RIGHT_OUT
2-14
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
ELVIS Function Generator Configuration Switch
(SW8)
The function generator configuration switch (SW8) controls signals connecting to the left and right input signals of the audio interface. The SW8
switch is used when the board connects to the ELVIS station (see “ELVIS
Interface” on page 1-12). Each channel must have only one signal selected
at a time, as described in Table 2-11.
Table 2-11. Function Generator Configuration Switch (SW8)
Channel
SW8 Switch Position (Default)
Audio Circuit Signal
AMP_LEFT_IN
1 (ON)
LEFT_IN
AMP_RIGHT_IN
2 (ON)
RIGHT_IN
AMP_LEFT_IN
3 (OFF)
DAC0
AMP_RIGHT_IN
4 (OFF)
DAC1
AMP_LEFT_IN
5 (OFF)
FUNCT_OUT
AMP_RIGHT_IN
6 (OFF)
FUNCT_OUT
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-15
Jumper and Switch Settings
ELVIS Voltage Selection Jumper (JP6)
The ELVIS voltage selection jumper (JP6) is used to select the power
source for the EZ-KIT Lite. In a standard mode of operation, the board
receives its power from an external power supply. When JP6 is installed,
the board is powered from an ELVIS station, and no external power supply is required. The jumper setting is shown in Table 2-12.
Table 2-12. ELVIS Voltage Selection Jumper (JP6)
JP6 Setting
Mode
OFF
Powered from an external power supply (default)
ON
Powered from an ELVIS station
external power supply must be disconnected from the board
[ The
when
is installed. Otherwise, the power supply can cause damJP6
age to the EZ-KIT Lite board and ELVIS unit.
ELVIS Select Jumper (JP8)
The ELVIS select jumper (JP8) configures the EZ-KIT Lite’s connection
to an ELVIS station (see “ELVIS Interface” on page 1-12). When JP8 is
installed, the connections to the push buttons and LED are re-directed to
the ELVIS station, instead of the processor. The jumper setting is shown
in Table 2-13.
Table 2-13. ELVIS Select Jumper (JP8)
JP8 Setting
Mode
OFF
Not connected to an ELVIS station (default)
ON
Connected to an ELVIS station
2-16
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
LEDs and Push Buttons
This section describes functionality of the LEDs and push buttons.
Figure 2-3 shows the locations of the LEDs and push buttons.
MONITOR
Figure 2-3. LED and Push Button Locations
Reset Push Button (SW9)
The RESET push button resets all of the ICs on the board. One exception is
the USB interface chip. The chip is not being reset when the push button
is pressed after the USB cable has been plugged in and communication
with the PC has been initialized correctly. After USB communication has
been initialized, the only way to reset the USB chip is by powering down
the board.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-17
LEDs and Push Buttons
Programmable Flag Push Buttons (SW10–13)
Four push buttons, SW10–13, are provided for general-purpose user input.
The buttons connect to the PF0-3 programmable flag pins of the processor. The push buttons are active high and, when pressed, send a high (1)
to the processor. Refer to “LEDs and Push Buttons” on page 1-13 for
more information on how to use the flags to program the processor. The
push button enable switch (SW5) is capable of disconnecting the push buttons from its corresponding PF signal (refer to “Push Button Enable
Switch (SW5)” on page 2-11). The programmable flag signals and associated switches are shown in Table 2-14.
Table 2-14. Programmable Flag Switches
Processor Programmable Flag Pin
Push Button Reference Designator
PF0
SW13
PF1
SW12
PF2
SW11
PF3
SW10
Power LED (LED7)
When LED7 is lit (green), it indicates that power is being properly supplied
to the board.
Reset LED (LED8)
When LED8 is lit, it indicates that the master reset of all the major ICs is
active.
2-18
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
User LEDs (LED2–6)
Five LEDs connect to five general-purpose IO pins of the processor (see
Table 2-15). The LEDs are active high and are lit by writing a 1 to the
correct PC signal. Refer to “LEDs and Push Buttons” on page 1-13 for
more information about how to use flash memory when programming the
LEDs.
Table 2-15. User LEDs
LED Reference Designator
Processor Programmable Flag Pin
LED2
PC5
LED3
PC6
LED4
PC7
LED5
PC8
LED6
PC9
USB Monitor LED (ZLED3)
The USB monitor LED (ZLED3) indicates that USB communication has
been initialized successfully, and you can connect to the processor using a
VisualDSP++ EZ-KIT Lite session. This takes approximately 15 seconds.
If the LED does not light, try cycling power on the board and/or
re-installing the USB driver (see the VisualDSP++ Installation Quick Reference Card).
VisualDSP++ is actively communicating with the EZ-KIT
L When
Lite target board, the LED can flicker, indicating communications
handshake.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-19
Connectors
Connectors
This section describes the connector functionality and provides information about mating connectors. The connector locations are shown in
Figure 2-4.
Figure 2-4. Connector Locations
2-20
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
Audio Connectors (J9 and J10)
Part Description
Manufacturer
Part Number
3.5 mm stereo jack
A/D ELECTRONICS
ST323-5
Mating Cable (shipped with EZ-KIT Lite)
3.5 mm stereo interconnect
cable
RANDOM
10A3-01106
3.5 mm headphones
KOSS
UR5
CAN Connectors (J5 and J11)
Part Description
Manufacturer
Part Number
Modular jack
AMP
5558872-1
Mating Cable
4-conductor modular jack cable
L-COM
TSP3044
RS-232 Connector (J6)
Part Description
Manufacturer
Part Number
DB9, female, vertical mount
NORCOMP
191-009-213-L-571
Mating Cable
2m female-to-female cable
DIGI-KEY
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
AE1020-ND
2-21
Connectors
Power Connector (J7)
The power connector provides all of the power necessary to operate the
EZ-KIT Lite board.
Part Description
Manufacturer
Part Number
2.5 mm power jack
SWITCHCRAFT
RAPC712X
Mating Power Supply (shipped with EZ-KIT Lite)
7V power supply
CUI INC.
DMS070214-P6P-SZ
Expansion Interface Connectors (J1–3)
Three board-to-board connector footprints provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information about the interface, see “Expansion
Interface” on page 2-8. For the availability and pricing of the J1, J12, and
J3 connectors, contact Samtec.
Part Description
Manufacturer
Part Number
90-position 0.05” spacing, SMT
SAMTEC
SFC-145-T2-F-D-A
Mating Connector
90-position 0.05” spacing
(through hole)
SAMTEC
TFM-145-x1 series
90-position 0.05” spacing
(surface mount)
SAMTEC
TFM-145-x2 series
90-position 0.05” spacing
(low cost)
SAMTEC
TFC-145 series
2-22
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
JTAG Connector (ZP4)
The JTAG header is the connecting point for a JTAG in-circuit emulator
pod. When an emulator connects to the JTAG header, the USB debug
interface is disabled.
3 is missing to provide keying. Pin 3 in the mating connector
L Pin
should have a plug.
using an emulator with the EZ-KIT Lite board, follow the
L When
connection instructions provided with the emulator.
SPORT0 and SPORT1 Connectors (P6 and P7)
The pinout of the P6 and P7 connectors can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-434HLF
Mating Connector
IDC socket
DIGI-KEY
S4217-ND
PPI Connector (P8)
The pinout of the P8 connector can be found in “ADSP-BF538F EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-440HLF
Mating Connector
IDC socket
DIGI-KEY
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
S4220-ND
2-23
Connectors
SPI Connector (P9)
The pinout of the P9 connector can be found in “ADSP-BF538F EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-420HLF
Mating Connector
IDC socket
DIGI-KEY
S4210-ND
2-Wire Interface Connector (P10)
The pinout of the P10 connector can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-420HLF
Mating Connector
IDC socket
DIGI-KEY
S4210-ND
TIMERS Connector (P11)
The pinout of the P11 connector can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-410HLF
Mating Connector
IDC socket
2-24
DIGI-KEY
S4205-ND
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
UART1 Connector (P12)
The pinout of the P12 connector can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-410HLF
Mating Connector
IDC socket
DIGI-KEY
S4205-ND
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2-25
Connectors
2-26
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A ADSP-BF538F EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-BF538F EZ-KIT Lite Schematic” on page B-1.
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
1
1
74LVC14A SOIC14
U37
TI
74LVC14AD
2
1
IDT74FCT3244AP
Y SSOP20
U36
IDT
IDT74FCT3244APYG
3
1
SN74AHC1G00
SOT23-5
U39
TI
SN74AHC1G00DBVR
4
1
12.288MHZ
OSC003
U4
DIGI-KEY
SG-8002CA-PCC-ND
(12.288M)
5
1
32.768KHZ
OSC008
Y2
EPSON
MC-156-32.7680KAA0:ROHS
6
1
25MHZ OSC003
U51
DIGI-KEY
SG-8002CA-PCC-ND
(25.00M)
7
5
SN74LVC1G08
SOT23-5
U22,U47-50
TI
SN74LVC1G08DBVR
8
2
MT48LC32M8A2
TSOP54
U15-16
MICRON
MT48LC32M8A2P-75
9
1
TJA1041 SOIC14
U21
PHILIPS
TJA1041T
10
1
FDS9431A SOIC8
U28
FAIRCHILD
FDS9431A
11
3
LMV722M SOIC8
U29-31
NATIONAL
SEMI
LMV722MNOPB
12
1
LTC3727EUH-1
VQFN32
U20
LINEAR
TECH
LTC3727EUH-1PBF
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A-1
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
13
2
FDS6990AS SOIC8
U12-13
FAIRCHILD
FDS6990AS
14
1
BF538
M29W320EB
“U24”
U24
ST MICRO
M29W320EB70ZE6E
15
1
ADM708SARZ
SOIC8
U27
ANALOG
DEVICES
ADM708SARZ
16
1
AD1854JRSZ
SSOP28
U38
ANALOG
DEVICES
AD1854JRSZ
17
1
AD1871YRSZ
SSOP28
U33
ANALOG
DEVICES
AD1871YRSZ
18
1
ADG752BRTZ
SOT23-6
U6
ANALOG
DEVICES
ADG752BRTZ-REEL
19
1
ADM3202ARNZ
SOIC16
U32
ANALOG
DEVICES
ADM3202ARNZ
20
2
AD623ARMZ
USOIC8
U2-3
ANALOG
DEVICES
AD623ARMZ
21
2
AD820ARZ SOIC8
U11,U23
ANALOG
DEVICES
AD820ARZ
22
4
ADG774ABRQZ
QSOP16
U54-57
ANALOG
DEVICES
ADG774ABRQZ
23
1
ADSP-BF538F
MBGA316
U1
ANALOG
DEVICES
ADSP-BF538BBCZ-5F8
24
5
RUBBER FOOT
M1-5
MOUSER
517-SJ-5018BK
25
1
PWR 2.5MM_JACK
CON005
J7
SWITCHCRAFT
RAPC712X
26
5
MOMENTARY
SWT013
SW9-13
PANASONIC
EVQ-PAD04M
27
3
.05 45X2 CON019
J1-3
SAMTEC
SFC-145-T2-F-D-A
28
2
DIP8 SWT016
SW1,SW7
C&K
TDA08H0SB1
29
1
DIP6 SWT017
SW8
CTS
218-6LPST
A-2
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
30
5
DIP4 SWT018
SW2,SW4-6,
SW14
ITT
TDA04HOSB1
31
1
DB9 9PIN
CON038
J6
NORCOMP
191-009-213-L-571
32
2
RJ11 4PIN
CON039
J5,J11
TYCO
5558872-1
33
1
DIP2 SWT020
SW3
C&K
TDA02H0SB1
34
3
IDC 2X1 IDC2X1
JP6,JP8-9
FCI
90726-402HLF
35
1
IDC 3X1 IDC3X1
JP1
FCI
90726-403HLF
36
2
IDC 5X2 IDC5X2
P11-12
FCI
68737-410HLF
37
1
IDC 7X2 IDC7X2
ZP4
FCI
68737-414HLF
38
4
IDC 10X2
IDC10X2
P3-4,P9-10
FCI
68737-420HLF
39
2
IDC 17X2
IDC17X2
P6-7
FCI
68737-434HLF
40
1
IDC 20X2
IDC20X2
P8
FCI
68737-440HLF
41
1
2.5A RESETABLE
FUS001
F1
RAYCHEM
SMD250F-2
42
3
IDC
SJ5-7
2PIN_JUMPER_SH
ORT
DIGI-KEY
S9001-ND
43
2
3.5MM
STEREO_JACK
CON001
J9-10
A/D ELECTRONICS
ST-323-5
44
3
IDC 3X2 IDC3X2
P13-15
SULLINS
GEC03DAAN
45
2
IDC 6X2 IDC6X2
P1-2
FCI
68737-412HLF
46
5
YELLOW LED001
LED2-6
PANASONIC
LN1461C
47
1
0.1UF 50V 10%
0805
C116
AVX
08055C104KAT
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A-3
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
48
1
10UF 16V 10% C
CT7
AVX
TAJC106K016R
49
6
10K 1/10W 5%
0805
R69-74
VISHAY
CRCW080510K0JNEA
50
4
100 1/10W 5%
0805
R82,R100-101,
R103
VISHAY
CRCW0805100RJNEA
51
4
600 100MHZ
200MA 0603
FER1-4
DIGI-KEY
490-1014-2-ND
52
1
2A S2A DO-214AA
D4
MICRO
COMM
S2A-TP
53
2
68UF 25V 20%
CAP003
CT1-2
PANASONIC
EEE-FC1E680P
54
1
10UH 20% IND001 L1
TDK
445-2014-1-ND
55
1
190 100MHZ 5A
FER002
FER7
MURATA
DLW5BSN191SQ2
56
1
1A ZHCS1000
SOT23-312
D5
ZETEX
ZHCS1000TA pb-free
57
5
1UF 10V 10% 0805
C131,C210,C220
-222
AVX
0805ZC105KAT2A
58
11
10UF 6.3V 10%
0805
C206-209,
C212-218
AVX
080560106KAT2A
59
2
1000PF 10V 20%
0805
C119,C123
DIGI-KEY
311-1136-1-ND
60
13
0.1UF 10V 10%
0402
C55-57,C59-60,
C111-115,C120,
C126,C136
AVX
0402ZD104KAT2A
A-4
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
61
71
0.01UF 16V 10%
0402
C1-27,C30-46,
C91-93,C95-97,
C103-104,
C107-109,C132,
C137,C141,
C143-147,
C202-205,C211,
C225-227
AVX
0402YC103KAT2A
62
28
10K 1/16W 5%
0402
R2-3,R5,R7,R9,
R12-16,R24-25,
R77,R79-80,
R84-85,R87-90,
R162,R169,
R171-172,R176,
R179,R182,R216
VISHAY
CRCW040210K0FKED
63
1
4.7K 1/16W 5%
0402
R4
VISHAY
CRCW04024K70JNED
64
5
0 1/16W 5% 0402
R120-121,R163,
R207,R215
PANASONIC
ERJ-2GE0R00X
65
4
1.2K 1/16W 5%
0402
R10,R67-68,R175 PANASONIC
ERJ-2GEJ122X
66
6
33 1/16W 5% 0402
R1,R8,R54,
R75-76,R119
PANASONIC
ERJ-2GEJ330X
67
2
18PF 50V 5% 0805
C28-29
AVX
08055A180JAT2A
68
2
100MA CMDSH-3
SOD-323
D1-2
CENTRAL
SEMI
CMDSH-3-E3
69
2
100UF 10V 10% C
CT3,CT5
KOA
TMC1ACTTE107K
70
2
1000PF 50V 5%
0402
C127-128
AVX
04025C102JAT2A
71
9
0.1UF 16V 10%
0603
C64,C72-74,
C87-89,C125,
C130
AVX
0603YC104KAT2A
72
2
33PF 50V 5% 0603
C118,C122
PANASONIC
ECJ-1VC1H330J
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A-5
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
73
4
0.01UF 16V 10%
0603
C50-51,C62-63
AVX
0603YC103KAT2A
74
1
4.7UF 25V 20%
0805
C110
AVX
0805ZD475KAT2A
75
2
330PF 50V 5%
0603
C79,C84
AVX
06035A331JAT2A
76
4
10K 1/10W 5%
0603
R37,R53,R81,
R99
VISHAY
CRCW060310K0JNEA
77
1
10M 1/10W 5%
0603
R11
VISHAY
CRCW060310M0FNEA
78
2
100K 1/10W 5%
0603
R20,R26
VISHAY
CRCW0603100KJNEA
79
8
330 1/10W 5%
0603
R83,R91-96,R98
VISHAY
CRCW0603330RJNEA
80
5
0 1/10W 5% 0603
R27,R113,R115,
R118,R168
PHYCOMP
232270296001L
81
7
10 1/10W 5% 0603
R6,R55-57,R59,
R62,R112
VISHAY
CRCW060310R0JNEA
82
2
10.0K 1/16W 1%
0603
R64,R102
DALE
CRCW060310K0FKEA
83
1
25.5K 1/16W 1%
0603
R104
DIGI-KEY
311-25.5KHRTR-ND
84
1
4700PF 16V 10%
0603
C90
DIGI-KEY
311-1083-2-ND
85
4
237.0 1/10W 1%
0603
R23,R29,R31,
R33
DIGI-KEY
311-237HRTR-ND
86
2
750.0K 1/10W 1%
0603
R30,R32
DIGI-KEY
311-750KHRTR-ND
87
3
11.0K 1/10W 1%
0603
R39-40,R60
DIGI-KEY
311-11.0KHRTR-ND
A-6
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
88
4
5.49K 1/10W 1%
0603
R42-43,R46-47
DIGI-KEY
311-5.49KHRTR-ND
89
2
3.32K 1/10W 1%
0603
R44,R48
DIGI-KEY
311-3.32KHRTR-ND
90
2
1.65K 1/10W 1%
0603
R45,R49
DIGI-KEY
311-1.65KHRTR-ND
91
2
49.9K 1/10W 1%
0603
R38,R41
DIGI-KEY
311-49.9KHRTR-ND
92
2
604.0 1/10W 1%
0603
R50-51
DIGI-KEY
311-604HRTR-ND
93
2
90.9K 1/10W 1%
0603
R58,R63
DIGI-KEY
311-90.9KHRTR-ND
94
2
0.1 1/10W 1% 0603
R61,R148
PANASONIC
ERJ-3RSFR10V
95
2
10.0K 1/10W 1%
0603
R159-160
DIGI-KEY
311-10.0KHRTR-ND
96
8
5.76K 1/10W 1%
0603
R17-19,R21-22,
R28,R34-35
DIGI-KEY
311-5.76KHRTR-ND
97
4
120PF 50V 5%
0603
C47-49,C71
AVX
06035A121JAT2A
98
12
100PF 50V 5%
0603
C52-54,C61,C65,
C68,C75,C77,
C81,C85,C94,
C106
AVX
06035A101JAT2A
99
4
1000PF 50V 5%
0603
C66-67,C69-70
PANASONIC
ECJ-1VC1H102J
100
2
62.0 1/10W 1%
0603
R65-66
DIGI-KEY
311-62.0HRTR-ND
101
4
220PF 50V 5%
0603
C82,C86,C117,
C124
PANASONIC
ECJ-1VC1H221J
102
2
680PF 50V 5%
0603
C80,C83
PANASONIC
ECJ-1VC1H681J
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A-7
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
103
2
2200PF 50V 5%
0603
C76,C78
PANASONIC
ECJ-1VB1H222K
104
2
2.74K 1/10W 1%
0603
R36,R52
DIGI-KEY
311-2.74KHRTR-ND
105
2
15.0K 1/16W 1%
0603
R106-107
DIGI-KEY
311-15.0KHRTR-ND
106
2
27PF 50V 5% 0402
C121,C129
AVX
04025A270JAT2A
107
1
10UF 10V 10%
0805
C98
PANASONIC
ECJ-2FB1A106K
108
1
61.9K 1/16W 1%
0603
R111
PANASONIC
ERJ-3EKF6192V
109
1
105.0K 1/16W 1%
0603
R108
PANASONIC
ERJ-3EKF1053V
110
2
20.0K 1/16W 1%
0603
R109-110
PANASONIC
ERJ-3EKF2002V
111
2
8UH 20% IND008
L2-3
WURTH
ELECTRON.
744392820
112
2
0.015 1W 1% 0815
R114,R116
SUSUMU
RL3720WT-015-F
113
2
10UF 16V 10%
1210
C58,C135
AVX
1210YD106KAT2A
114
1
GREEN LED001
LED7
PANASONIC
LN1361CTR
115
1
RED LED001
LED8
PANASONIC
LN1261CTR
116
2
150UF 6.3V 10% D
CT4,CT6
PANASONIC
EEFUE0J151R
A-8
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
1
2
2
ADSP-BF538F EZ-KIT LITE
SCHEMATIC
3
3
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
TITLE
Title
Size
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
4-29-2008_15:54
D
1
of
13
A
B
C
D
U1
U1
A[1:19]
1
A1
N19
A2
N20
A3
P19
A4
P20
A5
R19
A6
R20
A7
T19
A8
T20
A9
U19
A10
U20
A11
V19
A12
V20
A13
W18
A14
W20
A15
W17
A16
Y19
A17
Y18
A18
W16
A19
Y17
U1
A1
Y10
D0
W10
D1
Y9
D2
W9
D3
Y8
D4
W8
D5
Y7
D6
W7
D7
Y6
D8
W6
D9
Y5
D10
W5
D11
Y4
D12
W4
D13
Y3
D14
W3
D15
D0
A2
D1
A3
D2
A4
D3
A5
D4
A6
D5
A7
D6
A8
D7
A9
D8
A10
D9
A11
D10
A12
D11
A13
D12
A14
D13
A15
D14
A16
D15
RFS0
DR0PRI
DR0SEC
TSCLK0
TFS0
DT0PRI
DT0SEC
RSCLK1
RFS1
DR1PRI
DR1SEC
TSCLK1
TFS1
DT1PRI
AMS1
J19
AMS2
K18
AMS3
SDA0
AMS3
SCL1
ARDY
SDA1
K20
AOE
AOE
ARE
ARE
SWE
ABE0~/SDQM0
M20
ABE1
ABE1~/SDQM1
G18
SA10
BG
BG
BGH
PC7
F20
PC8
B17
PC9
NMI
FCE
B14
RESET
FRESET
PC4_LED1
DR2SEC/PE3
PC5_LED2
TSCLK2/PE4
PC6_LED3
TFS2/PE5
PC7_LED4
DT2PRI/PE6
PC8_LED5
DT2SEC/PE7
PC9_LED6
RSCLK3/PE8
MOSI1/PD0
MISO1/PD1
SCK1/PD2
SA10
MISO0
SMS
SCK0
C14
C17
C15
SPI1SS/PD3
C13
SPI1SEL/PD4
C9
MOSI2/PD5
C10
MISO2/PD6
C11
SCK2/PD7
C8
SPI2SS/PD8
C7
SPI2SEL/PD9
C5
RX1/PD10
C6
TX1/PD11
W14
RX2/PD12
W15
TX2/PD13
EMU
MOSI0
F2
MISO0
G1
SCK0
MOSI1/PD0
DR3PRI/PE10
MISO1/PD1
DR3SEC/PE11
SCK1/PD2
TSCLK3/PE12
SPI1SS/PD3
TFS3/PE13
SPI1SEL/PD4_AUDIO_RESET
DT3PRI/PE14
MOSI2/PD5
DT3SEC/PE15
PPI_FS3/SPI0SEL3/PF3_PB4
PPI15/SPI0SEL4/PF4
PPI14/SPI0SEL5/PF5
PPI13/SPI0SEL6/PF6
PPI12/SPI0SEL7/PF7
1
PPI11/PF8
PPI10/PF9
PPI9/PF10
PPI8/PF11
PPI7/PF12
PPI6/PF13
PPI5/PF14
PPI4/P15
SCK2/PD7_PPI_DIR_CTL
M2
TMR0
SPI2SS/PD8_PPI_CLK_SELECT
TMR1/PPI_FS1
SPI2SEL/PD9_CAN_ERR
TMR2/PPI_FS2
A5
TMR0
L2
TMR1/PPI_FS1
K2
TMR2/PPI_FS2
PPI0
PPI0
B5
PPI1
PPI1
A6
PPI2
PPI2
B6
RX1/PD10
PPI3
PPI3
A4
PPI_CLK
TX1/PD11
PPI_CLK
RX2/PD12
TX2/PD13
T2
EMU
TMS
TCK
TRST
2
TDI
TDO
RTXO
H18
FCE
Y14
R75
33
0402
3.3V
R77
10K
0402
3.3V
3
SPI0SEL2/PF2_PB3
MISO2/PD6
U2
TMS
W1
TCK
U1
TRST
V1
TDI
Y2
TDO
G2
MOSI0
C16
SPI0SEL1/TMRCLK/PF1_PB2
RTXI
RTXO
B13
DR2PRI/PE2
R4
4.7K
0402
A10
BMODE1
RFS2/PE1
CANRX/PC1_RTS
SPISS/PF0_PB1
CLKIN
RTXI
V4
RESET
D19
CANTX/PC0_CTS
F1
SPISS/PF0
E1
SPI0SEL1/TMRCLK/PF1
E2
SPI0SEL2/PF2
B4
PPI_FS3/SPI0SEL3/PF3
D1
PPI15/SPI0SEL4/PF4
D2
PPI14/SPI0SEL5/PF5
C1
PPI13/SPI0SEL6/PF6
C2
PPI12/SPI0SEL7/PF7
B1
PPI11/PF8
B3
PPI10/PF9
A2
PPI9/PF10
A3
PPI8/PF11
B8
PPI7/PF12
A8
PPI6/PF13
B7
PPI5/PF14
A7
PPI4/PF15
A14
A11
BMODE0
NMI
A13
XTAL
V5
BMODE1
SCLK
D20
CLKIN
V15
BMODE0
PC6
BR
V14
BGH
SCKE
J20
SMS
BR
TX0
R8
33
0402
G19
CLKOUT
C19
T1
RX0
R1
TX0
RX0
SWE
C20
SCKE
M19
ABE0
SCAS
H20
AWE
E19
PC5
SRAS
H19
SCAS
L20
AWE
G20
SRAS
L19
PC4
B9
SCL0
B10
SDA0
Y15
SCL1
Y16
SDA1
SCL0
E20
ARDY
B11
F19
AMS0
K19
AMS1
CANTX/PC0
CANRX/PC1
RFS3/PE9
J18
AMS0
A19
B12
L1
RSCLK1
K1
RFS1
J2
DR1PRI
H3
DR1SEC
H2
TSCLK1
J1
TFS1
H1
DT1PRI
D3
DT1SEC
DT1SEC
A18
W11
RSCLK2/PE0
Y11
RFS2/PE1
W12
DR2PRI/PE2
V13
DR2SEC/PE3
Y12
TSCLK2/PE4
Y13
TFS2/PE5
W13
DT2PRI/PE6
V16
DT2SEC/PE7
U18
RSCLK3/PE8
T18
RFS3/PE9
R18
DR3PRI/PE10
P18
DR3SEC/PE11
L18
TSCLK3/PE12
M18
TFS3/PE13
F18
DT3PRI/PE14
N18
DT3SEC/PE15
RSCLK2/PE0
R2
RSCLK0
P2
RFS0
N2
DR0PRI
J3
DR0SEC
P1
TSCLK0
N1
TFS0
M1
DT0PRI
G3
DT0SEC
RSCLK0
A17
AMS2
2
D[0:15]
U6
U5
R76
33
0402
4
VDD
1
OE
EXPANSION_PPI_CLK
3
1
3
OUT
3
PPI_CLK
6
GND
27MHZ 2
OSC003
SPI2SS/PD8_PPI_CLK_SELECT
4
ADG752BRTZ
SOT23-6
R2
10K
0402
U51
1
OE
RTXI
R1
33
0402
4
VDD
OUT
3
CLKIN
3.3V
GND
25MHZ 2
OSC003
RTXO
R11
10M
0603
Y2
R171
10K
0402
3.3V
1
R172
10K
0402
R176
10K
0402
R175
1.2K
0402
R10
1.2K
0402
R67
1.2K
0402
R68
1.2K
0402
4
TERM1 TERM2
2
NC1
3
NC2
ANALOG
DEVICES
NMI
4
C28
18PF
0805
32.768KHZ
OSC008
C29
18PF
0805
BR
C141
0.01UF
0402
ARDY
SDA0
SCL0
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
DSP
Title
SDA1
SCL1
U51
Size
RTC
Board No.
C
Date
A
B
C
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
2
of
13
A
B
C
D
VDDEXT
VDDEXT
1
U1
A1
GND1
A12
GND2
A15
GND3/
A17
GND4
A20
GND5
B2
GND6
B16
GND7
B18
GND8
B19
GND9
C3
GND10
C4
GND11
C18
GND12
D7
GND13
D8
GND14
D9
GND15
D10
GND16
D11
GND17
D12
GND18
D13
GND19
D14
GND20
D18
GND21
E3
GND22
E7
GND23
E8
GND24
E9
GND25
E10
GND26
E11
GND27
E12
GND28
E13
GND29
E14
GND30
E18
GND31
F3
GND32
F7
GND33
F8
GND34
F9
GND35
F10
GND36
F11
GND37
F12
GND38
F13
GND39
F14
GND40
1
B15
VDDEXT1
GND41
VDDEXT2
GND42
K3
M7
VDDEXT3
GND43
N7
VDDEXT4
GND44
VDDEXT5
GND45
P7
R7
VDDEXT6
GND46
VDDEXT7
GND47
VDDEXT8
GND48
VDDEXT9
GND49
T7
T8
T9
T10
VDDEXT10
GND50
VDDEXT11
GND51
T11
U7
VDDEXT12
GND52
U8
VDDEXT13
GND53
U9
VDDEXT14
GND54
U10
VDDEXT15
GND55
U11
VDDEXT16
V7
2
VDDEXT17
GND57
VDDEXT18
GND58
VDDEXT19
GND59
V8
VDDINT
VROUT
GND56
V9
V10
VDDEXT20
GND60
V11
VDDEXT21
GND61
GND62
A9
R3
10K
0402
VDDRTC
GND63
B20
GND64
A19
GND65
A18
GND66
VROUT0
VROUT1
GPW
GND67
C12
GND68
M14
GND69
N14
GND70
P14
GND71
R14
GND72
T12
GND73
VDDINT1
VDDINT2
VDDINT3
VDDINT4
VDDINT5
VDDINT6
GND74
T13
VDDINT7
GND75
T14
VDDINT8
U12
GND76
U13
GND77
U14
GND78
V12
GND79
VDDINT9
3
VDDINT10
VDDINT11
VDDINT12
GND80
C206
10UF
0805
C1
0.01UF
0402
C6
0.01UF
0402
C5
0.01UF
0402
C7
0.01UF
0402
C4
0.01UF
0402
C3
0.01UF
0402
C2
0.01UF
0402
C209
10UF
0805
C15
0.01UF
0402
C10
0.01UF
0402
C11
0.01UF
0402
C9
0.01UF
0402
C12
0.01UF
0402
C8
0.01UF
0402
C91
0.01UF
0402
G7
G8
G9
G10
VDDEXT
G11
G12
G13
G14
H7
H8
H9
H10
H11
H12
H13
H14
VDDEXT
J7
2
J8
J9
J10
C92
0.01UF
0402
J11
C13
0.01UF
0402
C14
0.01UF
0402
C16
0.01UF
0402
C27
0.01UF
0402
C26
0.01UF
0402
C25
0.01UF
0402
C18
0.01UF
0402
C23
0.01UF
0402
C22
0.01UF
0402
C24
0.01UF
0402
C21
0.01UF
0402
J12
J13
J14
K7
K8
K9
K10
VDDINT
K11
K12
K13
K14
L3
C208
10UF
0805
L7
C207
10UF
0805
C20
0.01UF
0402
L8
L9
L10
3
L11
L12
L13
Y20
GND120
Y1
GND119
W19
GND118
W2
GND117
V18
GND116
V17
GND115
V6
GND114
V3
GND113
V2
GND112
U3
GND111
T3
GND110
R13
GND109
R12
GND108
R11
GND107
R10
GND106
R9
GND105
R8
GND104
R3
GND103
P13
GND102
P12
GND101
P11
GND100
P10
GND99
P9
GND98
P8
GND97
P3
GND96
N13
GND95
N12
GND94
N11
GND93
N10
GND92
N9
GND91
N8
GND90
N3
GND89
M13
GND88
M12
GND87
M11
GND86
M10
GND85
M9
GND84
M8
GND83
M3
GND82
L14
GND81
VDDINT
C19
0.01UF
0402
C17
0.01UF
0402
C95
0.01UF
0402
C96
0.01UF
0402
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
C93
0.01UF
0402
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
DSP POWER
Title
Size
C97
0.01UF
0402
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
3
of
13
A
B
C
D
3.3V
A[1:19]
D[0:15]
U24
A1
1
G2
A0
F2
A1
E2
A2
C2
A3
D2
A4
F3
A5
E3
A6
C3
A7
D6
A8
C6
A9
E6
A10
F6
A11
D7
A12
C7
A13
E7
A14
F7
A15
G7
A16
D3
A17
E4
A18
F5
A19
F4
A20
A2
U15
A1
23
A2
24
A3
25
A4
26
A5
29
A6
30
A7
31
A8
32
A0
U16
DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
2
D0
A1
23
5
D1
A2
24
8
D2
A3
25
11
D3
A4
26
44
D4
A5
29
47
D5
A6
30
50
D6
A7
31
53
D7
A8
32
1
VDD13
VDD29
VDD314
VDD427
VDD543
VDD649
VDD7
1
VDD13
VDD29
VDD314
VDD427
VDD543
VDD649
VDD7
A3
A0
A1
A2
A3
A4
A5
A6
A7
A4
2
DQ0
5
DQ1
8
DQ2
11
DQ3
44
DQ4
47
DQ5
50
DQ6
53
DQ7
D8
A5
D9
A6
D10
A7
D11
A8
D12
A9
D13
A10
D14
A11
D15
A12
3.3V
A9
33
A9
33
A13
A10
34
A10
34
A14
22
A15
A8
A9
22
SA10
A10
SA10
A8
A9
A10
A12
35
A12
35
A16
A13
36
A13
36
A17
A18
20
A18
20
A19
21
A19
21
A11
A12
A11
A12
A18
2
BA0
BA1
16
SWE
WE
CS
17
SCAS
CAS
CKE
18
SRAS
RAS
CLK
19
37
38
SMS
SWE
SCKE
SCAS
SCLK
R216
10K
0402
BA0
R13
10K
0402
R14
10K
0402
R15
10K
0402
R16
10K
0402
A19
BA1
16
CS
17
RAS
CKE
SCKE
38
CLK
SCLK
6
12GND1
28GND2
41GND3
46GND4
52GND5
54GND6
GND7
6
12GND1
28GND2
41GND3
46GND4
52GND5
54GND6
GND7
AMS2
D3
K5
D4
G5
D5
K6
D6
G6
D7
H3
D8
J3
D9
H4
D10
J4
D11
H5
D12
J6
D13
H6
D14
J7
D15
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15/A-1
2
BYTE
AMS3
SN74LVC1G08
SOT23-5
8
C4
U49
1
RY/BY~
4
H2
CE
J2
OE
C5
WE
D4
VPP/WP~
2
3
6
1
4
5
2
SN74LVC1G08
SOT23-5
U39
4
4
MT48LC32M8A2
TSOP54
D2
K4
D2
H7
7
3
MT48LC32M8A2
TSOP54
2
AMS1
2
ABE1
DQM
ON
SW6
1
1
39
DQM
G4
D1
1
RESET
4
AMS0
39
D1
D5
U22
1
2
ABE0
D0
K3
SMS
37
CAS
18
G3
D0
FCE
19
WE
SRAS
R12
10K
0402
J5
VDD
3.3V
SN74AHC1G00
SOT23-5
DIP4
SWT018
M29W320EB
TFBGA63_80
U48
1
K2
K7GND1
GND2
3.3V
4
SW6: FLASH Enable Switch
2
SN74LVC1G08
SOT23-5
1
64 MB SDRAM
(8M x 8 x 4 banks) x 2 chips
ON
SW14
1
8
7
3
6
4
5
2
2
FCE
RESET
ARE
3
4
4 MB FLASH
(2M x 16)
AWE
DIP4
SWT018
3
3
SW14: FCE Enable Switch
Memory Map
START
3.3V
3.3V
0x0000 0000
0x2000 0000
0x2010 0000
0x2020 0000
0x2030 0000
3.3V
C35
0.01UF
0402
C30
0.01UF
0402
C31
0.01UF
0402
C32
0.01UF
0402
U15
C33
0.01UF
0402
C34
0.01UF
0402
C143
0.01UF
0402
C42
0.01UF
0402
C43
0.01UF
0402
C41
0.01UF
0402
C44
0.01UF
0402
C45
0.01UF
0402
C46
0.01UF
0402
C144
0.01UF
0402
C37
0.01UF
0402
C38
0.01UF
0402
C39
0.01UF
0402
C40
0.01UF
0402
END
BANK
0x03FF FFFF
0x200F FFFF
0x201F FFFF
0x202F FFFF
0x203F FFFF
SDRAM Bank 0
ASYNC Memory Bank 0
ASYNC Memory Bank 1
ASYNC Memory Bank 2
ASYNC Memory Bank 3
64MB SDRAM
1 MB FLASH
1 MB FLASH
1 MB FLASH
1 MB FLASH
C36
0.01UF
0402
U16
U22
U39
U48
U49
ANALOG
DEVICES
U24
4
Size
Board No.
C
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
SDRAM AND FLASH
Title
A
DEVICE
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
4
of
13
A
B
C
D
3.3V
R169
10K
0402
C216
10UF
0805
FER3
600
0603
1
R20
100K
0603
R21
5.76K
0603
1
SPI1SEL/PD4_AUDIO_RESET
R28
5.76K
0603
U47
4
AUDIO_RESET
2
RESET
1
SN74LVC1G08
SOT23-5
C71
120PF
0603
C53
100PF
0603
3.3V
R23
237.0
0603
U29
2
1
AGND
3
LMV722M
SOIC8
R17
5.76K
0603
C70
1000PF
0603
R35
5.76K
0603
C68
100PF
0603
LABEL "LINE IN"
J9
ADC LEFT
ADC
C47
120PF
0603
1
5
LEFT_IN
AGND
AMP_LEFT_IN
4
R32
750.0K
0603
LOOPBACK_LEFT
3
RIGHT_IN
C67
1000PF
0603
13
12
7
AMP_RIGHT_IN
CON001
11
5
10
LMV722M
SOIC8
2
18
AGND
19
16
C215
10UF
0805
FER4
600
0603
R34
5.76K
0603
R22
5.76K
0603
17
AGND
C49
120PF
0603
C52
100PF
0603
CAPLN
CAPLP
VINLP
VINLN
VINRP
24
AUDIO_RESET
21
CASC
8
XCTRL
2
CCLK/{256~/512}
3
COUT/{DF0}
4
CIN/{DF1}
5
CLATCH/{M~/S}
2
ADC_M~/S
VINRN
CAPRN
CAPRP
1
MCLK
MCLK
R26
100K
0603
R25
10K
0402
U33
R33
237.0
0603
U29
6
LOOPBACK_RIGHT
2
R24
10K
0402
RESET
28
LRCLK
27
BCLK
26
DOUT
25
DIN
RFS0_S
RSCLK0_S
DR0PRI_S
14
VREF
VREF_AUDIO
AD1871YRSZ
SSOP28
2
C64
0.1UF
0603
R31
237.0
0603
U30
C54
100PF
0603
1
AGND
C214
10UF
0805
C61
100PF
0603
3
LMV722M
SOIC8
R19
5.76K
0603
C69
1000PF
0603
R18
5.76K
0603
C51
0.01UF
0603
C65
100PF
0603
C50
0.01UF
0603
C63
0.01UF
0603
C62
0.01UF
0603
AGND
ADC RIGHT
C48
120PF
0603
AGND
R30
750.0K
0603
3
SW7
1
5
15
3
14
4
13
5
12
6
11
7
10
8
9
3
RFS0
LMV722M
SOIC8
4
TSCLK0
5
TFS0
6
AGND
7
8
ADC_M~/S
16
2
2
RSCLK0
ON
1
DR0PRI
7
VREF_AUDIO
3
AGND
R29
237.0
0603
U30
6
C66
1000PF
0603
DR0PRI_S
RSCLK0_S
RFS0_S
TSCLK0_S
TFS0_S
R119
33
0402
DIP8
SWT016
A5V
A5V
5V
3.3V
5V
3.3V
FER2
600
0603
R27
0
0603
SW7: Audio Selection Switch
C55
0.1UF
0402
C56
0.1UF
0402
C57
0.1UF
0402
C212
10UF
0805
C213
10UF
0805
C59
0.1UF
0402
C60
0.1UF
0402
C145
0.01UF
0402
AGND
4
AGND
ANALOG
DEVICES
AGND
U33
U29
U30
U47
U33
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
ADC AND AUDIO IN
Title
Size
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
5
of
13
A
B
C
D
1
1
C81
100PF
0603
R43
5.49K
0603
R40
11.0K
0603
R44
3.32K
0603
3.3V
DAC LEFT
DAC
R54
33
0402
U4
1
OE
OUT
96/48~
3
6
384/256~
12.288MHZ
OSC003
CT2
68UF
CAP003
U31
R50
604.0
0603
1
3
U38
10
2
C77
100PF
0603
MCLK
R53
10K
0603
C79
330PF
0603
R42
5.49K
0603
16
OUTL17
OUTL+
C80
680PF
0603
LMV722M
SOIC8
R45
1.65K
0603
R41
49.9K
0603
C78
2200PF
0603
7
X2MCLK
2
MCLK
TSCLK0_S
TFS0_S
DT0PRI
2
3.3V
26
BCLK
13
OUTR12
OUTR+
R52
2.74K
0603
25
LRCLK
27
SDATA
C82
220PF
0603
14
FILTR
19
FILTB
LABEL "LINE OUT"
AGND
1
4
CCLK
3
CLATCH
5
CDATA
22
C218
10UF
0805
ZEROL
8
ZEROR
C87
0.1UF
0603
C217
10UF
0805
R47
5.49K
0603
5
LEFT_OUT
C85
100PF
0603
4
LOOPBACK_LEFT
3
LOOPBACK_RIGHT
AUDIO_RESET
R37
10K
0603
2
J10
24
R39
11.0K
0603
RESET
R48
3.32K
0603
2
RIGHT_OUT
CON001
9
DEEMP
23
MUTE
C84
330PF
0603
AGND
21
IDPM0
20
IDPM1
6
CT1
68UF
CAP003
U31
C75
100PF
0603
R51
604.0
0603
7
5
AD1854JRSZ
SSOP28
R46
5.49K
0603
DAC RIGHT
C83
680PF
0603
LMV722M
SOIC8
R49
1.65K
0603
R36
2.74K
0603
C76
2200PF
0603
R38
49.9K
0603
C86
220PF
0603
AGND
3
3
VREF_AUDIO
5V
A5V
C72
0.1UF
0603
3.3V
C73
0.1UF
0603
C74
0.1UF
0603
C146
0.01UF
0402
AGND
U38
U38
U31
ANALOG
DEVICES
U4
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
DAC AND AUDIO OUT
Title
Size
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
6
of
13
A
B
C
D
1
1
3.3V
5V
R79
10K
0402
2
1
ON
1
2
7
3
6
4
5
2
3
SPI2SEL/PD9_CAN_ERR
4
CANRX/PC1_RTS
8
6
EN
14
STB
8
ERR
R65
62.0
0603
R55
10
0603
R81
10K
0603
DNP
J11
2
1
2
13
CANH
11
SPLIT
12
CANL
CANTX/PC0_CTS
SW2: CAN Enable Switch
C106
100PF
0603
9
WAKE
1
TXD
4
RXD
DIP4
SWT018
7
INH
TJA1041
SOIC14
2
GND
U21
SW2
5
VIO
3
VDD
10
VBAT
R80
10K
0402
3.3V
3
4
CON039
C90
4700PF
0603
R66
62.0
0603
R62
10
0603
LABEL "CAN"
J5
1
2
3
C94
100PF
0603
4
CON039
3.3V
5V
CAN
C103
0.01UF
0402
C104
0.01UF
0402
3
3
U21
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
CAN
Title
Size
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
7
of
13
A
B
C
D
3.3V
R87
10K
0402
U54
LABEL "PB1"
R100
100
0805
U37
3
1
R6
10
0603
SW13
MOMENTARY
SWT013
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
WS_P0_1
4
3.3V
RS_P0
PC4_LED1
74LVC14A
SOIC14
WS_P1_1
PC5_LED2
C222
1UF
0805
WS_P2_1
PC6_LED3
R179
10K
0402
WS_P3_1
PC7_LED4
R88
10K
0402
R101
100
0805
SW12
MOMENTARY
SWT013
RS_P1
PC8_LED5
WS_P5_1
PC9_LED6
SW5
1
ON
1
8
7
3
6
4
5
2
2
SPISS/PF0_PB1
SPI0SEL1/TMRCLK/PF1_PB2
3
SPI0SEL2/PF2_PB3
4
PPI_FS3/SPI0SEL3/PF3_PB4
DIP4
SWT018
R89
10K
0402
SW11
MOMENTARY
SWT013
12
YA
YB
YC
YD
4
2
1A1
4
1A2
6
1A3
8
1A4
18
1Y1
16
1Y2
14
1Y3
12
1Y4
11
2A1
13
2A2
15
2A3
17
2A4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
1
OE1
19
OE2
3.3V
LED6
YELLOW
LED001
7
LED5
YELLOW
LED001
LED4
YELLOW
LED001
LED3
YELLOW
LED001
LED2
YELLOW
LED001
POWER
LED7
GREEN
LED001
LED1
YELLOW
LED001
DNP
IDT74FCT3244APY
SSOP20
9
R83
330
0603
12
R91
330
0603
R92
330
0603
R93
330
0603
R94
330
0603
R95
330
0603
R96
330
0603
1
S
2
E
R57
10
0603
U37
9
YD
9
15
SW5: Push Button Enable Switch
R103
100
0805
YC
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
WS_P4_1
C221
1UF
0805
LABEL "PB3"
1
U36
U55
6
74LVC14A
SOIC14
2
7
ADG774ABRQZ
QSOP16
R56
10
0603
U37
5
YB
4
1
S
15
E
ELVIS_SELECT
LABEL "PB2"
YA
ADG774ABRQZ
QSOP16
8
RS_P2
74LVC14A
SOIC14
C220
1UF
0805
3.3V
R84
10K
0402
3.3V
U37
1
SW10
MOMENTARY
SWT013
SW3
1
BMODE0
R59
10
0603
2
BMODE1
2
2
R82
100
0805
1
LABEL "PB4"
ON
R90
10K
0402
R85
10K
0402
4
3
SWT020
DIP2
RS_P3
74LVC14A
SOIC14
RESET
LED8
RED
LED001
C210
1UF
0805
R182
10K
0402
SW3: Boot Mode Select Switch
3
R9
10K
0402
RESET
1
BMODE0
R98
330
0603
R7
10K
0402
U27
3.3V
1
MR
SW9
MOMENTARY
SWT013
1
DA_SOFT_RESET
R162
10K
0402
U37
13
PFI
RESET
RESET
7
RESET
3
BOOT MODE
ON
ON
EXECUTE FROM 16-BIT EXTERNAL MEMORY
ON
OFF
BOOT FROM 16-BIT FLASH MEMORY
OFF
ON
BOOT FROM SPI SERIAL MASTER
OFF
OFF
BOOT FROM SPI SERIAL SLAVE
DEFAULT
5
PFO
U50
4
2
AS_P3_1
R5
10K
0402
4
8
2
BMODE1
ADM708SARZ
SOIC8
SN74LVC1G08
SOT23-5
U37
12
11
74LVC14A
SOIC14
10
74LVC14A
SOIC14
3.3V
C109
0.01UF
0402
4
C107
0.01UF
0402
C108
0.01UF
0402
C211
0.01UF
0402
C225
0.01UF
0402
ANALOG
DEVICES
C147
0.01UF
0402
Title
Size
U37
U36
U27
U54
U55
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
PUSH BUTTONS, LEDS AND BOOT MODE
Board No.
C
U50
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
4-29-2008_15:55
D
8
of
13
A
B
C
D
R163
0
0402
LEFT_IN
A5V
3
14
6
7
4
13
5
12
6
11
V+
7
10
8
6
9
ACH4+
ACH0+
SW8: Function Generator Switch
3
7
6
AD623ARMZ
USOIC8
16
AMP_LEFT_IN
AMP_RIGHT_IN
1
LEFT_OUT
RIGHT_OUT
DIP8
SWT016
R102
10.0K
0603
C205
0.01UF
0402
8
AD820ARZ
SOIC8
5
REF
DIP6
SWT017
R160
10.0K
0603
4
VOUT
U11
2
ON
7
6
RG-
8
5
RG+
1
5
4
8
15
SW1
1
ACH3+
3
R61
0.1
0603
2
AMP_RIGHT_IN
2
IN-
9
6
IN+
4
5
FUNC_OUT
U2
2
10
4
DAC1
3
3
1
1
AMP_LEFT_IN
11
3
DAC0
12
2
2
RIGHT_IN
R58
90.9K
0603
ON
SW8
1
ACH2+
VDDINT
1
VDDINT_SHUNT
A5V
SW1: Oscilloscope Select Switch
R60
11.0K
0603
C88
0.1UF
0603
C202
0.01UF
0402
P16
AGND
ELVIS_5V
1
2
3
4
U56
V_UNREG
ELVIS_TRIGGER_S
IDC2X2
DNP
2
DSP CORE VOLTAGE & CURRENT
U11
2
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
IDC2X1
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
2
RS_P2
RS_P0
ELVIS Voltage Selection Jumper
WS_P4_1
WS_P2_1
WS_P0_1
ELVIS_5V
A5V
R63
90.9K
0603
VDDEXT_SHUNT
ELVIS_PF5_S
ELVIS_PF2_S
ELVIS_TRIGGER_S
VDDEXT
U3
3
IN+
2
IN-
8
RG+
1
RG-
3
AD623ARMZ
USOIC8
R148
0.1
0603
7
2
V+
R159
10.0K
0603
4
VOUT
REF
U23
VDDINT
6
6
ACH1+
3
AD820ARZ
SOIC8
5
C204
0.01UF
0402
ACH4+
ACH3+
ACH2+
ACH1+
ACH0+
R64
10.0K
0603
A5V
R104
25.5K
0603
FUNC_OUT
C89
0.1UF
0603
C203
0.01UF
0402
AGND
VDDINT
VDDINT_SHUNT
DAC0
+15_P_1
+15_P_2
+5_P_1
+5_P_2
+5_P_3
GND5
RS_P[6]
RS_P[4]
RS_P[2]
RS_P[0]
GND7
KEY2
KEY4
WS_P[6]_1
WS_P[4]_1
WS_P[2]_1
WS_P[0]_1
GND9
ID6
ID4
ID2
ID0
GND11
NC1
AS_P[6]_1
AS_P[4]_1
AS_P[2]_1
AS_P[0]_1
PB_PRES_1
UPDATE
CONVERT
SCANCLK
TRIG1_2
GATE1_1
GPCTR0_SOURCE
GPCTR0_OUT_1
GND13
VH_1
AIGND2
ACH7_1
ACH6_1
ACH5_1
ACH4
AIGND4
ACH3
ACH2
ACH1
ACH0
AISENSE_1
KEY6
KEY8
NC4
FG_SYNC_1
FG_SIG_1
GND14
NC5
ZL_1
ZH_1
NC8
DAC0_2
GND17
VDCA_1
PC4_LED1
I1A
JP6
1
YA
3
P5
AGND
4
I0A
-15_P_1
-15_P_2
GND1
GND2
GND3
GND4
RS_P[7]
RS_P[5]
RS_P[3]
RS_P[1]
GND6
KEY1
KEY3
WS_P[7]_1
WS_P[5]_1
WS_P[3]_1
WS_P[1]_1
GND8
ID7
ID5
ID3
ID1
GND10
AS_P[7]_1
AS_P[5]_1
AS_P[3]_1
AS_P[1]_1
+5V2
WFTRIG
STARTSCAN
EXTSRTOBE
TRIG2
SOURCE1_1
GPCRT1_OUT
GPCTR0_GATE
FREQ_OUT
GND12
VL_1
AIGND1
ACH15_1
ACH14_1
ACH13_1
ACH12
AIGND3
ACH11
ACH10
ACH9
ACH8
NC2
KEY5
KEY7
NC3
FM_1
AM_1
+5V3
GND15
NC6
ZM_1
NC7
DAC1_2
GND16
VDCB_1
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
ELVIS_PF1_S
5
7
I0B
YB
PC5_LED2
9
YC
PC6_LED3
6
I1B
ELVIS_PF2_S
11
I0C
10
RS_P3
RS_P1
2
I1C
14
12
YD
13
I0D
I1D
1
S
WS_P5_1
WS_P3_1
WS_P1_1
ELVIS_SELECT
15
E
ADG774ABRQZ
QSOP16
ELVIS_5V
U57
PC7_LED4
2
4
I0A
YA
ELVIS_PF5_S
3
I1A
AS_P3_1
PC8_LED5
5
7
I0B
YB
ELVIS_PF6_S
9
YC
ELVIS_PF7_S
6
ELVIS_PF6_S
ELVIS_PF7_S
I1B
PC9_LED6
ELVIS_PF1_S
11
10
I0C
14
I1C
12
YD
I0D
13
I1D
1
S
15
E
ADG774ABRQZ
QSOP16
3
PFI
3.3V
DAC1
PCI32B
C227
0.01UF
0402
AGND
DSP IO CURRENT
C226
0.01UF
0402
U21
JP8
1
2
ELVIS_SELECT
AGND
IDC2X1
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
ELVIS CONNECTOR
U56
NI ELVIS ID 33 (0010 0001)
U57
ELVIS Select Jumper
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
ELVIS INTERFACE
Title
Size
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
9
of
13
A
B
C
D
EXPANSION INTERFACE (TYPE B)
5V
3.3V
5V
3.3V
1
1
D[0:15]
SCK0
A[1:19]
6
5
A3
8
7
10
9
A4
MISO1/PD1
A7
12
11
A6
A9
14
13
A8
MISO0
16
A13
15
18
A15
17
20
A17
19
22
A19
21
24
23
2
D3
CANTX/PC0_CTS
A12
28
27
30
29
DT1SEC
32
31
DT1PRI
34
33
TFS1
35
TSCLK1
38
37
DT0SEC
40
39
41
DT0PRI
D0
TFS0
D2
D5
44
43
D4
D7
46
45
D6
PPI5/PF14
D9
48
47
D8
PPI7/PF12
D11
50
49
D10
PPI9/PF10
D13
52
51
D12
PPI11/PF8
D15
54
53
D14
PPI13/SPI0SEL6/PF6
56
55
PPI15/SPI0SEL4/PF4
58
57
PC6_LED3
60
59
62
61
64
63
66
68
70
72
SPI0SEL1/TMRCLK/PF1_PB2
SPI0SEL2/PF2_PB3
PPI_FS3/SPI0SEL3/PF3_PB4
R168
0
0603
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
46
45
48
47
50
49
52
51
54
53
56
55
58
57
60
59
62
61
64
63
65
ABE1
67
ABE0
69
AOE
71
AWE
74
73
76
75
78
77
80
79
82
81
84
83
86
85
88
87
90
SCK1/PD2
TX0
SPI1SS/PD3
SCK0
TX1/PD11
PPI_FS3/SPI0SEL3/PF3_PB4
SPISS/PF0_PB1
EXPANSION_PPI_CLK
PPI1
SMS
PPI3
66
65
68
67
70
69
72
74
RFS2/PE1
DR2SEC/PE3
CANRX/PC1_RTS
NMI
TFS2/PE5
DT2SEC/PE7
RFS3/PE9
DR3SEC/PE11
A18
TSCLK0
PPI2
6
A16
TMR0
42
PPI0
3
A14
TMR2/PPI_FS2
36
D1
4
SPI0SEL1/TMRCLK/PF1_PB2
A10
25
26
3
MOSI1/PD0
A2
MOSI0
A11
1
3
A1
A5
J2
2
TMR1/PPI_FS1
DR1SEC
DR1PRI
RFS1
RESET
RESET
TFS3/PE13
RSCLK1
DT3SEC/PE15
DR0SEC
PC9_LED6
DR0PRI
MOSI2/PD5
RFS0
SCK2/PD7_PPI_DIR_CTL
RSCLK0
PPI4/P15
PPI6/PF13
PPI8/PF11
PPI10/PF9
PPI12/SPI0SEL7/PF7
PPI14/SPI0SEL5/PF5
PC7_LED4
SDA0
AMS3
AMS2
J3
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
46
45
48
47
50
49
52
51
54
53
56
55
58
57
60
59
62
61
64
63
R78
73.5
0402
DNP
SPISS/PF0_PB1
RX0
RX1/PD10
C99
250PF
0402
DNP
SPI0SEL2/PF2_PB3
RSCLK2/PE0
DR2PRI/PE2
TSCLK2/PE4
DT2PRI/PE6
RSCLK3/PE8
DR3PRI/PE10
TSCLK3/PE12
2
SCLK
DT3PRI/PE14
PC8_LED5
All USB interface circuitry is considered proprietary and has
SPI1SEL/PD4_AUDIO_RESET
been omitted from this schematic.
MISO2/PD6
SPI2SS/PD8_PPI_CLK_SELECT
SPI2SEL/PD9_CAN_ERR
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
3.3V
http://www.analog.com
R215
0
0402
3.3V
3V
AMS1
66
65
68
67
70
69
71
72
71
73
74
73
AMS0
ARDY
ARE
ZP4
1
3
4
5
6
7
76
75
76
75
78
77
78
77
2
8
9
10
11
12
13
14
ABE0
SRAS
SPISS/PF0_PB1
SA10
PC5_LED2
SWE
80
79
80
79
82
81
82
81
84
83
84
83
86
85
86
85
88
87
88
87
90
89
90
89
ABE1
SCKE
SCAS
SCLK
RESET
CON019
SDA1
TCK
TRST
TRST
DA_EMULATOR_TMS
TDI
TDI
TDO
TDO
EMU
EMU
DA_EMULATOR_TCK
3
DA_EMULATOR_TRST
DA_EMULATOR_TDI
DA_EMULATOR_TDO
DA_GP0
DA_GP1
RESET
DA_GP2
BR
DA_SOFT_RESET
DA_SOFT_RESET
BG
BGH
DA_GP3
DEBUG_AGENT
89
CON019
TMS
TCK
DA_EMULATOR_EMU
IDC7X2
PC4_LED1
TMS
DA_EMULATOR_SELECT
SHGND
4
1
GND
J1
2
SCL1
DSP JTAG HEADER
CON019
SHGND
JP1
SCL0
1
2
SCK2/PD7_PPI_DIR_CTL
3
IDC3X1
ANALOG
DEVICES
4
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
EXPANSION INTERFACE & JTAG
Board No.
C
Date
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
10
of
13
A
B
5V
C
3.3V
5V
V_UNREG
D
3.3V
V_UNREG
SPORT 0
SPORT 1
P6
2
1
P7
2
1
4
3
4
3
6
5
6
5
8
7
8
7
10
9
10
9
12
11
12
11
14
13
14
13
16
15
16
15
3.3V
TSCLK0
DR0PRI
1
DR0SEC
DT0SEC
DT0PRI
RSCLK0
MOSI0
MISO0
SCK0
SDA0
SCL0
21
24
23
26
25
28
27
30
29
32
31
TFS0
DT1SEC
DT1PRI
MOSI0
CANRX/PC1_RTS
MISO0
PC4_LED1
PC5_LED2
SDA0
SCL0
PC7_LED4
TMR0
PC8_LED5
TMR1/PPI_FS1
PC9_LED6
TMR2/PPI_FS2
33
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
IDC17X2
C114
0.1UF
0402
C1+
C1-
1
V+
4
CANRX/PC1_RTS
PC4_LED1
6
C2+
C113
0.1UF
0402
6
V-
5
2
C2-
7
PC5_LED2
PC6_LED3
11
TX0
PC7_LED4
CANTX/PC0_CTS
PC8_LED5
RX0
PC9_LED6
SW4
1
CANRX/PC1_RTS
33
10
2
7
12
3
6
9
4
5
T1IN
8
T2IN
R1OUT
14
3
T1OUT
7
8
T2OUT
13
4
R1IN
8
9
R2OUT
R2IN
ADM3202ARNZ
SOIC16
R99
10K
0603
JP9
SERIAL PORT
(UART 0)
1
2
IDC2X1
5V 3.3V
SHORTING
JUMPER
DEFAULT=INSTALLED
2
C100
250PF
0402
DNP
PPI
PPI2
PPI4/P15
PPI6/PF13
PPI8/PF11
PPI10/PF9
PPI12/SPI0SEL7/PF7
PPI14/SPI0SEL5/PF5
PPI_FS3/SPI0SEL3/PF3_PB4
SPI0SEL1/TMRCLK/PF1_PB2
RESET
MOSI0
MISO0
SCK0
3
P8
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
SDA0
SCL0
PPI1
PPI3
PPI5/PF14
PPI7/PF12
PPI9/PF10
PPI11/PF8
V_UNREG
V_UNREG
PPI13/SPI0SEL6/PF6
3.3V
37
40
39
5V
PPI15/SPI0SEL4/PF4
3.3V
SPISS/PF0_PB1
SPI
TMR0
P10
2
1
P9
2
1
TMR1/PPI_FS1
4
3
4
3
TMR2/PPI_FS2
6
5
6
5
8
7
8
7
10
9
10
9
12
11
12
11
14
13
14
13
16
15
16
15
18
17
18
17
20
19
20
19
SDA0
CANTX/PC0_CTS
PC4_LED1
PC6_LED3
PC8_LED5
SCL0
MISO0
RESET
SCK0
CANRX/PC1_RTS
CANTX/PC0_CTS
PC5_LED2
PC4_LED1
PC7_LED4
PC6_LED3
PC9_LED6
PC8_LED5
IDC10X2
5V
5V
4
6
TMR0
8
TMR1/PPI_FS1
4
10
TMR2/PPI_FS2
1
3
5
RESET
CANRX/PC1_RTS
PC5_LED2
PC7_LED4
PC9_LED6
IDC10X2
UART
SPISS/PF0_PB1
SPI0SEL1/TMRCLK/PF1_PB2
TX0
SPI0SEL2/PF2_PB3
P12
2
1
4
3
6
5
8
7
10
9
TX1/PD11
RX2/PD12
ANALOG
DEVICES
7
9
RX0
IDC5X2
IDC5X2
Size
Board No.
C
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
STAMP CONNECTORS
Title
A
3
MOSI0
3.3V
TIMERS
P11
2
5V
TWI
SPI0SEL2/PF2_PB3
35
38
2
UART 0 Loop Jumper
IDC20X2
3.3V
CON038
SW4: UART Enable Switch
R86
73.5
0402
DNP
PPI0
5
C111
0.1UF
0402
DIP4
SWT018
SCK0
PPI_CLK
J6
2
CANTX/PC0_CTS
IDC17X2
V_UNREG
U32
3
SCK0
PC6_LED3
TFS1
1
RSCLK1
CANTX/PC0_CTS
1
C112
0.1UF
0402
4
34
DR1SEC
RFS1
ON
19
22
DR1PRI
3
TMR2/PPI_FS2
20
RFS0
RESET
2
TMR1/PPI_FS1
17
TSCLK1
1
TMR0
18
RESET
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
11
of
13
A
B
R69
10K
0805
R70
10K
0805
C
R71
10K
0805
R74
10K
0805
R73
10K
0805
D
R72
10K
0805
1
1
P3
RFS2/PE1
RSCLK2/PE0
DR2PRI/PE2
DR2SEC/PE3
P4
1
2
3
4
5
6
7
8
10
9
10
11
12
11
12
13
14
13
14
15
16
15
16
17
18
17
18
19
20
19
20
1
2
3
4
5
6
7
8
9
TFS2/PE5
RFS3/PE9
TSCLK2/PE4
RSCLK3/PE8
DT2PRI/PE6
DR3PRI/PE10
DT2SEC/PE7
DR3SEC/PE11
TFS3/PE13
TSCLK3/PE12
DT3PRI/PE14
DT3SEC/PE15
IDC10X2
IDC10X2
SPORT2
SPORT3
2
2
P1
MOSI1/PD0
SPI1SS/PD3
SCK1/PD2
SPI1SEL/PD4_AUDIO_RESET
MISO1/PD1
1
2
3
4
5
6
7
8
9
10
11
12
P2
1
2
3
4
5
6
7
8
9
10
11
12
MOSI2/PD5
SPI2SS/PD8_PPI_CLK_SELECT
SCK2/PD7_PPI_DIR_CTL
SPI2SEL/PD9_CAN_ERR
MISO2/PD6
IDC6X2
IDC6X2
SPI 1
SPI 2
3
3
P14
RX1/PD10
TX1/PD11
1
2
3
4
5
RX2/PD12
TX2/PD13
6
P15
1
2
SCL1
3
4
SDA1
5
P13
1
2
3
4
5
6
6
IDC3X2
IDC3X2
IDC3X2
UART 1
TWI1
UART 2
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
MISC CONNECTORS
Title
Size
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
12
of
13
A
B
D4
S2A
2A
DO-214AA
F1
2.5A
FUS001
FER7
190
FER002
4
3
1
2
C
D
V_UNREG
LABEL "5V"
5V@5A
J7
5V
1
C127
1000PF
0402
2
CT7
10UF
C
C130
0.1UF
0603
3
7.5V_POWER
CON005
1
1
C128
1000PF
0402
L3
8UH
IND008
FER1
600
0603
R116
0.015
0815
U12
C132
0.01UF
0402
1
R113
0
0603
DNP
SHGND
CT6
150UF
D
8
2
U20
7
27
PGOOD
C120
0.1UF
0402
28
RUN/SS1
30
SENSE1+
C129
27PF
0402
C119
1000PF
0805
RUBBER FOOT
MSC009
M3
RUBBER FOOT
MSC009
M4
RUBBER FOOT
MSC009
M5
RUBBER FOOT
MSC009
R107
15.0K
0603
3
C124
220PF
0603
R121
0
0402
DNP
RUBBER FOOT
MSC009
5
MH3
MH5
MH6
R106
15.0K
0603
MH7
D1
CMDSH-3
SOD-323
FCB
INTVCC
C110
4.7UF
0805
21
MH10
MH11
MH12
MH13
FDS6990AS
SOIC8
C116
0.1UF
0805
2
C58
10UF
1210
20
V_UNREG
ITH1
C131
1UF
0805
SGND
PGND
19
SOD-323
CMDSH-3
D2
C117
220PF
0603
ITH2
VOSENSE2
R111
61.9K
0603
18
BG2
17
BOOST2
SOIC8
FDS6990AS
3
C126
0.1UF
0402
11
SENSE2MH9
C135
10UF
1210
PLLIN
3VOUT
33
THSGND
9
MH8
R112
10
0603
7
8
R110
20.0K
0603
3
PLLFLTR
EXTVCC
4
6
MH2
6
23
VOSENSE1
R120
0
0402
C122
33PF
0603
MH1
VIN
22
BG1
C118
33PF
0603
M2
5
24
2
M1
U12
C115
0.1UF
0402
BOOST1
31
SENSE1-
1
2
FDS6990AS
SOIC8
4
R108
105.0K
0603
R109
20.0K
0603
26
TG1
25
SW1
U13
MH14
C123
1000PF
0805
C121
27PF
0402
SW2
12
SENSE2+
LTC3727EUH-1
VQFN32
C136
0.1UF
0402
6
15
7
14
TG2
13
RUN/SS2
4
2
5
8
CT4
150UF
D
U13
1
LABEL "3.3V"
FDS6990AS
SOIC8
3
3.3V@3A
L2
8UH
IND008
R114
0.015
0815
3.3V
3
TP7
C137
0.01UF
0402
LABEL "VDDINT"
VDDINT_SHUNT TP10
VROUT
3.3V
R207
0
0402
U28
L1
10UH
IND001
1
5
2
6
3
7
4
8
D5
ZHCS1000
SOT23D
R115
0
0603
CT5
100UF
C
3.3V
LABEL "GND"
TP2
4
ANALOG
DEVICES
VDDEXT_SHUNT
TP3
TP4
TP5
TP6
FDS9431A
SOIC8
CT3
100UF
C
C98
10UF
0805
C125
0.1UF
0603
R118
0
0603
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF538F EZ-KIT LITE
POWER
Title
Size
20 Cotton Road
Rev
A0203-2006
1.2B
Sheet
10-15-2007_13:17
D
13
of
13
INDEX
Numerics
B
2-wire interface (TWI), 1-13, 2-24
background telemetry channel (BTC), 1-14
bill of materials, A-1
board schematic (ADSP-BF538F), B-1
boot mode select switch (SW3), 2-13
A
AD1854 digital-to-analog converter (DAC),
1-12
AD1871 analog-to-digital converter (ADC),
1-12, 2-12
ADC master/slave modes, 2-13
AMP_LEFT_IN signal, 2-14, 2-15
AMP_RIGHT_IN signal, 2-14, 2-15
~AMS3-0 (flash select) pins, 1-7, 2-3, 2-11,
2-12
analog audio, See audio
architecture, of this EZ-KIT Lite, 2-2
ASYNC (asynchronous memory control)
external memory banks 0-3, 1-8
register, 1-11
audio
circuit signals, 2-14, 2-15
codecs, See AD1854, AD1871
connectors (J9-10), 2-21
enable switch (SW7), 2-12
input configuration switch (SW8), 2-15
interface, xii, 1-12
AUDIO_RESET signal, 2-5
C
CAN
connectors (J5 and J11)
enable switch (SW2), 2-10
ERR signal, 1-11, 2-6
interface, xi, 1-11
signals, 2-10
transceiver devices, -xi, 1-11
CANRX signal, 2-4
CANTX signal, 2-4
CCLK register, 1-10
clock
frequency, 1-9
in (CLK IN) signal, 2-3
loopback signal, 2-13
out (CLK OUT) signal, 2-3
codecs, See AD1854, AD1871
configuration, of this EZ-KIT Lite, 1-3
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
I-1
INDEX
connectors
diagram of locations, 2-20
J1-3 (expansion), 2-3, 2-8, 2-22
J5 and J11 (CAN), 2-21
J6 (RS-232), 2-21
J7 (power), 2-22
J9-10 (audio), 2-21
P10 (TWI), 2-24
P11 (timers), 2-24
P12 (UART1), 2-25
P3 (SPORT1), 2-4
P4 (SPORT2), 2-4
P6 (SPORT0), 1-13, 2-4, 2-23
P8 (PPI), 2-23
P9 (SPI), 2-4, 2-24
SPORT0-1 (P6-7), 2-23
ZP4 (JTAG), 2-9, 2-23
contents, of this EZ-KIT Lite package, 1-3
Controller Area Network, See CAN
core voltage, 2-2
CTS signals, 2-10
customer support, xv
EBIU_SDBCTL register, 1-9, 1-10
EBIU_SDGCTL register, 1-9, 1-10
EBIU_SDRRC register, 1-9, 1-10
EBUI control signals, 2-8
Educational Laboratory Virtual
Instrumentation Suite interface, See ELVIS
ELVIS
interface, xi, 1-12, 2-14
select jumper (JP8), 2-16
voltage select jumper (JP6), 2-16
ELVIS_PF1-2 signals, 2-5
ELVIS_PF5-7 signals, 2-5
EN (enable control input) signals, 2-10
ERR signals, 1-11, 2-6, 2-10
example programs, 1-14
expansion interface
connections, 1-13, 2-3, 2-4, 2-11
connectors (J1-3), 2-8, 2-22
external bus interface unit (EBIU), 2-3
external memory, 1-8, 2-3, 2-9
F
D
DAC1-0 signals, 2-15
data acquisition (DAQ) device, 1-12
DB9 (UART) connector, xii, 2-8
default configuration, of this EZ-KIT Lite, 1-3
DIP switch (SW5), 1-4, 1-13
DR0PRI signals, 2-12
DR2PRI signal, 2-6
DR2SEC signal, 2-6
DR3PRI signal, 2-6
DR3SEC signal, 2-6
DT2PRI signal, 2-6
DT2SEC signal, 2-6
DT3PRI signal, 2-6
DT3SEC signal, 2-6
I-2
E
FCE enable switch (SW14), 2-12
features, of this EZ-KIT Lite, xi
flag pins, See programmable flags
flash memory
boot mode, 2-13
connections, 2-3
enable switch (SW6), 1-10, 2-11
frame sync signals, 1-13
frequency, 1-9
FS loopback signal, 2-13
FUNCT_OUT signal, 2-15
G
general-purpose IO pins, 1-13, 2-10, 2-11, 2-19
GND signal, 2-8
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
INDEX
H
Help, online, xix
I
LEFT_IN signal, 2-15
LEFT_OUT signal, 2-14
license restrictions, x, 1-7
LOOPBACK signal, 2-10
installation, of this EZ-KIT Lite, 1-5
interfaces, See audio, CAN, ELVIS, expansion,
SDRAM
internal memory
core/system MMRs, 1-8
data banks A, B SRAM, 1-8
data banks A, B SRAM/CACHE, 1-8
instruction banks A, B SRAM, 1-8
instruction SRAM/CACHE, 1-8
reserved, 1-8
scratch pad SRAM, 1-8
via JTAG, 2-9
internal regulator, 2-2
IO voltage, 2-2
M
J
O
JTAG
connector (ZP4), 2-23
emulation port, 2-9
jumpers
diagram of locations, 2-9
JP1 (PPI dir control), 2-13
JP6 (ELVIS voltage), 2-16
JP8 (ELVIS select), 2-16
JP9 (UART), 2-14
oscilloscope configuration switch (SW1), 2-14
L
LabVIEW virtual instruments, xi, 1-12
LEDs
diagram of locations, 2-17
LED2-6 (PC5-9), 1-13, 2-19
LED7 (power), 2-18
LED8 (reset), 2-18
ZLED3 (USB monitor), 1-5, 2-19
Media Instruction Set Computing (MISC), ix
memory
map, of this EZ-KIT Lite, 1-7
select pins, See ~AMS3-0, ~SMS0
Micro Signal Architecture (MSA), ix
MISO2 signal, 2-5
MOSI0-1 signals, 2-5
MOSI2 signal, 2-5
N
notation conventions, xxi
NU signal, 2-10, 2-13
P
package contents, 1-3
PB1-4 (SW13-10) push buttons, 2-11
PCx signals, See programmable flags
PDx signals, See programmable flags
PEx signals, See programmable flags
PFx signals, See programmable flags
power
connector (J7), 2-22
LED (LED7), 2-18
supply, 1-3
PPI
connector (P8), 2-23
direction control (JP1) jumper, 2-13
PPI_CLK_SEL signal, 2-6
PPI_D4-15 signals, 2-7
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
I-3
INDEX
PPI_DIR_CTL signal, 2-6
PPI_FS3 signal, 2-7
programmable flags
PC0 (UART transmit), 1-11, 2-4, 2-10
PC1 (UART receive), 1-11, 2-4, 2-10
PC5-9 (LED2-6), 1-13, 2-19
PD0-8 signals, 2-5
PD10-13, 2-6
PD7 (JP1), 2-13
PD9 (ERR), 1-11, 2-6, 2-10
PE0-15, 2-6
PF0-3 (SW13-10), 1-13, 2-7, 2-11, 2-18
PF4-15 (PPI), 2-7
push buttons
See also switches by name (SWx)
diagram of locations, 2-17
R
real-time clock (RTC), 2-3
Reduced Instruction Set Computing (RISC), ix
regulators, 2-2
reset
LEDs (LED8), 2-18
processor, 2-8
push button (SW9), 2-17
restriction, of the evaluation license, 1-7
RFS0 signal, 2-12
RFS2-3 signals, 2-6
RIGHT_IN signal, 2-15
RIGHT_OUT signal, 2-14
RS-232 connectors (J6), xii, 2-21
RSCLK0 signal, 2-12
RSCLK2-3 signals, 2-6
RTS signal, 2-10
RX0 signal, 2-10
RX1-2 signals, 2-6
RXDx (receive data output) signals, 1-11, 2-10
I-4
S
schematic, of ADSP-BF538F EZ-KIT Lite, B-1
SCLKx signals, 1-10, 2-5, 2-6
SDRAM
connections, 2-3
default settings, 1-9
interface, 1-8
memory map, 1-8
optimum settings, 1-9, 1-10
serial clock (SCL) signals, 1-9
serial peripheral interface, See SPI, SPI signals
~SMS0 (SDRAM select) pin, 1-7, 2-3
SPI
connector (P9), 2-24
interface, 2-4
SPI0SEL1-7 signals, 2-7
SPI1SEL signal, 2-5
SPI1SS signal, 2-5
SPI2SEL signal, 2-6
SPI2SS signal, 2-6
SPISS signal, 2-7
SPORT0
connector (P6), 2-23
interface, 1-12, 2-4, 2-8
SPORT1
connector (P7), 2-23
interface, 2-4, 2-8
SRAM, 1-7
See also internal memory
startup, of this EZ-KIT Lite, 1-5
STB (standby control input) signals, 2-10
stereo input/output channels, 1-12
SW10-13 (PD13-10) push buttons, 2-7, 2-18
SW14 (FCE enable) switch, 2-12
SW1 (audio/oscilloscope) switch, 2-14
SW2 (CAN enable) switch, 1-11, 2-10
SW3 (boot mode select) switch, 2-13
SW4 (UART) switch, 2-10
SW5 (push button enable) DIP switch, 1-13,
2-11, 2-18
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
INDEX
SW6 (flash enable) switch, 1-10, 2-11
SW7 (audio enable) switch, 1-13, 2-12
SW8 (audio input) switch, 2-15
SW9 (reset) push button, 2-17
switches
See also switches by name (SWx)
diagram of locations, 2-9
synchronous dynamic random access memory,
See SDRAM
system
architecture, of this EZ-KIT Lite, 2-2
clock frequency, 1-9
clock (SCLKx) signals, 1-10, 2-5, 2-6
T
Target Options dialog box, 1-9
TFS0 signal, 2-13
TFS2 signal, 2-6
TFS3 signal, 2-6
timers connector (P11), 2-24
TMRCLK signal, 2-7
TSCLK0 signal, 2-13
TSCLK2 signal, 2-6
TSCLK3 signal, 2-6
TWI connector (P10), 2-24
TXDx (transmit data input) signals, 1-11, 2-6
U
UART
enable switch (SW4), 2-10
interface, 2-4, 2-8
loop jumper (JP9), 2-14
UART0 transmit/receive signals, 2-4
UART1 connector (P12), 2-25
universal asynchronous receiver transmitter, See
UART
USB
cable, 1-3
interface, 2-9, 2-23
monitor LED (ZLED3), 2-19
user LEDs (LED2-6), 2-19
V
very-long instruction word (VLIW), ix
VisualDSP++
environment, 1-5
online Help, xix
voltage regulators, 2-2
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
I-5
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Blackfin® Processors
SHARC® Processors,
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dominate the floating-point
provide the highest
code- and pin-compatible
16/32-bit embedded
Digital Signal Processing
performance density for
families of Digital Signal
processor, ideally suited for
market, delivering exceptional
multiprocessing applications
Processors with
products where a
core and memory
with peak performance well
performance up to 160MHz
convergence of capabilities
performance complemented
above a billion floating-point
and power as low as 184
are necessary – multi-format
by outstanding I/O throughput.
operations per second...
micro-amps. The ADSP-
audio, video, voice and
Starting at 319 MFLOPS per
Go to TigerSHARC
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- LabVIEW Embedded for Blackfin
- Software Development Kit (SDK)
- Phytec
- Blackfin Audio EZ-Extender
Daughter Board
- Converter Evaluation &
Development Platform
- USB-based Emulator
USB 1.1, up to 150 KB/sec
ADSP-BF535
- Green Hills Software
- High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
ADSP-BF538
ADSP-BF538F
1
- VisualDSP++ 5.01
---
- BF538F EZ-KIT Lite
Desktop Evaluation Board
ADSP-BF542
ADSP-BF544
ADSP-BF547
ADSP-BF548
ADSP-BF549
- BF548 EZ-KIT Lite
Desktop Evaluation Board
ADSP-BF561
- BF561 EZ-KIT Lite
Desktop Evaluation Board
Floating license available
Processor Development Tools: Product Overview
Development Tools Support
Tel: 1-800-AnalogD (262-5643)
Contact Support
http://www.analog.com/processors/blackfin/evaluationDevelopment/crosscore/ (2 of 3)3/27/2008 4:09:00 PM
- USB-based Emulator
USB 1.1, up to 150 KB/sec
- Free Upgrade to 5.0
- VisualDSP++ 5.01
- Green Hills Software
- High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
- USB-based Emulator
USB 1.1, up to 150 KB/sec
- Free Upgrade to 5.0
- VisualDSP++ 5.01
- LabVIEW Embedded for Blackfin
- High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
- USB-based Emulator
USB 1.1, up to 150 KB/sec
- High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
- Free Upgrade to 5.0
- VisualDSP++ 5.01
- Green Hills Software
- Free Upgrade to 5.0
- uClinux Kernel + GNU Software
Analog Devices : Embedded Processing & DSP : Blackfin : Evaluation and Development Tools : Blackfin Processor Development Tools
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