Preliminary Data Sheet No. PD60032-M IR2131(J)(S) 3 HIGH SIDE AND 3 LOW SIDE DRIVER Features • Floating channel designed for bootstrap operation • • • • • • • Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Independent 3 high side & 3 low side drivers Matched propagation delay for all channels 2.5V logic compatible Outputs out of phase with inputs Description Product Summary VOFFSET 600V max. IO+/- 160 mA / 360 mA VOUT 10 - 20V ton/off (typ.) 1.3 & 0.6 µs Deadtime (typ.) 700 ns Packages The IR2131(J)(S) is a high voltage, high speed power MOSFET and IGBT driver with three independent high and low side referenced output channels. Proprietary 28-Lead HVIC technology enables ruggedized monolithic conSOIC struction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 2.5V logic. A current trip function which terminates all six outputs can be derived from 28-Lead PDIP an external current sense resistor. A shutdown input is provided for a customized shutdown function. An open 44-Lead PLCC drain FAULT signal is provided to indicate that any of w/o 12 Leads the shutdowns has occurred. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operate up to 600 volts. Typical Connection (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR2131(J)(S) Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional Information is shown in Figures 7 through 10. Symbol VB1,2,3 VS1,2,3 VHO1,2,3 V CC VSS VLO1,2,3 VIN VFLT dVS/dt PD RthJA TJ TS TL Parameter Definition High Side Floating Supply Voltage High Side Floating Offset Voltage High Side Floating Output Voltage Low Side and Logic Fixed Supply Voltage Logic Ground Low Side Output Voltage Logic Input Voltage ( HIN1,2,3 , LIN1,2,3 , FLT - CLR , SD & ITRIP) FAULT Output Voltage Allowable Offset Supply Voltage Transient Package Power Dissipation @ TA ≤ +25°C (28 Lead DIP) (28 Lead SOIC) (44 Lead PLCC) Thermal Resistance, Junction to Ambient (28 Lead DIP) (28 Lead SOIC) (44 Lead PLCC) Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds) Value Min. Max. -0.3 VB1,2,3 - 25 VS1,2,3 - 0.3 -0.3 VCC - 25 -0.3 VSS - 0.3 VSS - 0.3 — — — — — — — — -55 — 625 VB1,2,3 + 0.3 VB1,2,3 + 0.3 25 VCC + 0.3 VCC + 0.3 VSS + 15 VCC + 0.3 50 1.5 1.6 2.0 83 78 63 150 150 300 Units V V/ns W °C/W °C Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. The VS offset rating is tested with all supplies biased at 15V differential. Symbol VB1,2,3 VS1,2,3 VHO1,2,3 VCC VSS VLO1,2,3 VIN VFLT TA Parameter Definition High Side Floating Supply Voltage High Side Floating Offset Voltage High Side Floating Output Voltage Low Side and Logic Fixed Supply Voltage Logic Ground Low Side Output Voltage Logic Input Voltage ( HIN1,2,3 , LIN1,2,3 , FLT - CLR , SD & ITRIP) FAULT Output Voltage Ambient Temperature Value Min. Max. VS1,2,3 + 10 Note 1 VS1,2,3 10 -5 0 VSS VSS -40 VS1,2,3 + 20 600 VB1,2,3 20 5 VCC VSS + 5 VCC 125 Units V °C Note 1: Logic operational for VS of -5V to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode. 2 www.irf.com IR2131(J)(S) Dynamic Electrical Characteristics VBIAS (VCC, VBS1,2,3) = 15V, VS1,2,3 = VSS = COM, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics are defined in Figures 4 through 5. Symbol ton toff tr tf titrip tbl tflt tflt,in tfltclr t sd DT Parameter Definition Turn-On Propagation Delay Turn-Off Propagation Delay Turn-On Rise Time Turn-Off Fall Time ITRIP to Output Shutdown Propagation Delay ITRIP Blanking Time ITRIP to FAULT Indication Delay Input Filter Time (All Six Inputs) FLT - CLR to FAULT Clear Time SD to Output Shutdown Propagation Delay Deadtime Value Min. Typ. Max. Units Test Conditions 0.6 0.2 — — 400 — 400 — 400 400 400 1.3 0.6 80 40 700 400 700 310 800 700 700 2.0 1.0 150 100 1000 — 1000 — 1200 1000 1200 µs ns VIN = 0 & 5V VS1,2,3 = 0 to 600V VIN, VITRIP = 0 & 5V VITRIP = 1V VIN, VITRIP = 0 & 5V VIN = 0 & 5V VIN, VIT, VFC = 0&5V VIN, VSD = 0 & 5V VIN = 0 & 5V NOTE: For high side PWM, HIN pulse width must be ≥ 1.5µsec Static Electrical Characteristics VBIAS (VCC, VBS1,2,3) = 15V, VS1,2,3 = VSS = COM and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3 . The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3. Symbol VIH VIL VFCLR,IH VFCLR,IL VSD,TH+ VSD,THVIT,TH+ VIT,THVOH VOL ILK IQBS IQCC IIN+ IINIITRIP+ IITRIPIFCLR+ IFCLRISD+ ISD- www.irf.com Parameter Definition Logic “0” Input Voltage (OUT = LO) Logic “1” Input Voltage (OUT = HI) Logic “0” Fault Clear Input Voltage Logic “1” Fault Clear Input Voltage Shutdown Input Positive Going Threshold Shutdown Input Negative Going Threshold ITRIP Input Positive Going Threshold ITRIP Input Negative Going Threshold High Level Output Voltage, VBIAS - VO Low Level Output Voltage, VO Offset Supply Leakage Current Quiescent VBS Supply Current Quiescent VCC Supply Current Logic “1” Input Bias Current (OUT = HI) Logic “0” Input Bias Current (OUT = LO) “High” ITRIP Bias Current “Low” ITRIP Bias Current Logic “1” Fault Clear Bias Current Logic “0” Fault Clear Bias Current Logic “1” Shutdown Bias Current Logic “0” Shutdown Bias Current Value Min. Typ. Max. Units Test Conditions 2.2 — 2.2 — 1.2 0.9 250 200 — — — — — — — — — — — — — — — — — 1.8 1.5 485 400 — — — 30 3.0 190 50 75 — 125 75 75 — — 0.8 — 0.8 2.1 1.8 600 550 100 100 50 100 4.5 300 100 150 100 250 150 150 100 V mV µA mA µA nA µA nA VIN = 0V, IO = 0A VIN = 5V, IO = 0A VB = VS = 600V VIN = 0V or 5V VIN = 0V or 5V VIN = 0V VIN = 5V ITRIP = 5V ITRIP = 0V FLT - CLR = 0V FLT - CLR = 5V SD = 5V SD = 0V 3 IR2131(J)(S) Static Electrical Characteristics -- Continued VBIAS (VCC, VBS1,2,3) = 15V, VS1,2,3 = VSS = COM and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3 . The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3. Symbol VBSUV+ VBSUVVCCUV+ VCCUVRon,FLT IO+ I O- Parameter Definition VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold FAULT Low On-Resistance Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current Min. Value Typ. Max. Units Test Conditions 8.2 8.7 9.2 7.8 8.3 8.8 8.2 8.7 9.2 7.8 8.3 8.8 — 160 55 250 75 — 360 500 — V Ω mA VO = 0V, VIN = 0V PW ≤ 10 µs VO = 15V, VIN = 5V PW ≤ 10 µs Functional Block Diagram 4 www.irf.com IR2131(J)(S) Lead Definitions Lead Symbol Description HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), out of phase LIN1,2,3 Logic inputs for low side gate driver output (LO1,2,3), out of phase FLT - CLR Logic input for fault clear SD Logic input for shutdown FAULT VCC Indicates over-current or undervoltage lockout (low side) has occurred, negative logic ITRIP Input for over-current shutdown VSS Logic ground VB1,2,3 High side floating supplies HO1,2,3 High side gate drive outputs VS1,2,3 High side floating supply returns LO1,2,3 Low side gate drive outputs COM Low side return Low side and logic fixed supply Lead Assignments 28 Lead DIP 44 Lead PLCC w/o 12 Leads 28 Lead SOIC (Wide Body) IR2131 IR2131J Part Number IR2131S www.irf.com 5 IR2131(J)(S) HIN1,2,3 LIN1,2,3 ITRIP SD FLT - CLR FAULT LO1,2,3 HO1,2,3 Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit HIN1,2,3 LIN1,2,3 50% FLT-CLR SD FLT-CLR SD ton 50% tr toff 90% C0M HO1,2,3 LO1,2,3 Figure 3. Switching Time Test Circuit tf 90% 10% 10% Figure 4. Switching Time Waveform Definitions LIN1,2,3 HIN1,2,3 50% ITRIP 50% 50% 50% SD FLT - CLR LIN1,2,3 50% FAULT LO1,2,3 50% 50% 50% LO1,2,3 HO1,2,3 t flt DT DT Figure 5. Deadtime Waveform Definitions 6 50% 50% 50% tfltclr t sd t itrip Figure 6. Shutdown Waveform Definitions www.irf.com IR2131(J)(S) 50 50 480V 480V 45 40 320V 35 160V 30 0V Junction Temperature (°C) Junction Temperature (°C) 45 25 40 320V 35 160V 30 0V 25 20 1E+2 1E+3 1E+4 20 1E+2 1E+5 1E+3 Frequency (Hz) 1E+4 1E+5 Frequency (Hz) Figure 7. IR2131 TJ vs. Frequency (IRF820) Ω , VCC = 15V RGATE = 33Ω Figure 8. IR2131 TJ vs. Frequency (IRF830) Ω, VCC = 15V RGATE = 20Ω 100 140 480V 120 320V 60 480V 320V 40 Junction Temperature (°C) Junction Temperature (°C) 80 100 80 160V 60 0V 160V 40 0V 20 1E+2 1E+3 1E+4 Frequency (Hz) Figure 9. IR2131 TJ vs. Frequency (IRF840) Ω , VCC = 15V RGATE = 15Ω www.irf.com 1E+5 20 1E+2 1E+3 1E+4 1E+5 Frequency (Hz) Figure 10. IR2131 TJ vs. Frequency (IRF450) Ω, VCC = 15V RGATE = 10Ω 7 IR2131(J)(S) Case outlines 28-Lead PDIP (wide body) 28-Lead SOIC (wide body) 8 01-6011 01-3024 02 (MS-011AB) 01-6013 01-3040 02 (MS-013AE) www.irf.com IR2131(J)(S) NOTES 44-Lead PLCC w/o 12 leads 01-6009 00 01-3004 02(mod.) (MS-018AC) WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 5/18/2001 www.irf.com 9