Chap. 6 Programming the Basic Computer 6-1 6-1 Introduction Translate user-oriented symbolic program(alphanumeric character set) into binary programs recognized by the hardware 25 Instruction Set of the basic computer z z z Memory Reference Instruction Register Reference Instruction Input-output Instruction 6-2 Machine Language Program Categories z 1) Binary Code(Machine Language) » Program Memory의 내용 : Tab. 6-2 z 2) Octal or Hexadecimal Code » Binary Code와 동일 : Tab. 6-3 z 3) Symbolic Code : Tab. 6-4 » Assembly Language : Tab. 6-5 z 4) High Level Language » C, Fortran,.. : Tab 6-6 Computer System Architecture * Tab. 6-4와 차이점 Pseudoinstruction, Label 사용 가능 Symbol AND ADD LDA STA BUN BSA ISZ CLA CLE CMA CME e CIR CIL INC SPA SNA SZA SZE HLT INP OUT SKI SKO ION IOF Hex Code 0xxx 8xxx 1xxx 9xxx 2xxx Axxx 3xxx Bxxx 4xxx Cxxx 5xxx Dxxx 6xxx Exxx 7800 7400 7200 7100 7080 7040 7020 7010 7008 7004 7002 7001 F800 F400 F200 F100 F080 F040 Chap. 6 Programming the Basic Computer Description And memory word to AC Add memory word to AC Load memory word to AC Store content of AC in memory Branch unconditionally Branch and Save return address Increment and skip if zero Clear AC Clear E Complement AC Comp Circulate right AC and E Circulate left AC and E Increment AC Skip next instruction if AC positive Skip next instruction if AC negative Skip next instruction if AC zero Skip next instruction if E is 0 Halt computer Input character to AC Output character from AC Skip on input flag Skip on output flag Interrup Inter © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-2 6-3 Assembly Language The rules for writing assembly language program z Documented and published in manuals(from the computer manufacturer) Rules of the Assembly Language z Each line of an assembly language program is arranged in three columns » 1) Label field : empty or symbolic address » 2) Instruction field : machine instruction or pseudoinstruction » 3) Comment field : empty or comment z Label Instruction Field Comment Symbolic Address(Label field) » One, two, or three, but not more than three alphanumeric characters » The first character must be a letter; the next two may be letters or numerals » A symbolic address is terminated by a comma(recognized as a label by the assembler) z Instruction Field » 1) A memory-reference instruction(MRI) Ex) ADD OPR(direct address MRI), ADD PTR I(indirect address MRI) » 2) A register-reference or input-output instruction(non-MRI) Ex) CLA(register-reference), INP(input-output) » 3) A pseudoinstruction with(ORG N) or without(END) an operand : Tab. 6-7 Computer System Architecture Pseudoinstruction 은 Machine Instruction이 아니고 Assembler에게 필요한 정보만 제공 Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-3 z Comment field » Comment filed must be preceded by a slash(recognized by assembler as comment) An Example Program : Tab. 6-8 z 83 - ( - 23 ) = 83 + ( 2’s Complement of -23) = 83 + 23 교과서에서는 같은 의미로 사용됨 Translation to Binary : Tab. 6-9 z Assembler = the translation of the symbolic(= assembly) program into binary z Address Symbol Table = Hexadecimal address of symbolic address » MIN = 106, SUB = 107, DIF = 108 Two Pass Assembler : in next Sec. 6-4 z 1) 1st scan pass : generate user defined address symbol table z 2) 2nd scan pass : binary translation Ex) LDA SUB 1) SUB = 107 2) 2107 6-4 The Assembler Source Program asm a96 a51 c(cpp) for pas Computer System Architecture Object Code Assembler (Compiler) obj Binary Code Linker bin exe com hex Chap. 6 Programming the Basic Computer Library 또는 외부 함수를 사용하여 Relocation © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-4 Representation of Symbolic Program in Memory : Tab. 6-11 z Line of Code : PL3, LDA SUB I (Carriage return) » The assembler recognizes a CR code as the end of a line of code First pass Two Pass Assembler z 1) 1st pass : Generate userdefined address symbol table LC 0 Scan next line of code Set LC » Flowchart of first pass : Fig. 6-1 yes » Address Symbol Table for Program in Tab. 6-8 : no Label no ORG yes yes Tab. 6-12 yes END no Store symbol in addresssymbol table together with value of LC Fig. 6-1 Flowchart for first pass of assembler Computer System Architecture Go to second pass Increment LC Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-5 Second pass LC z 2) 2nd pass : Binary translation Check for possible errors in the symbolic program Ex) Invalid Machine Code Error 1 2 3 4 I Opcode 5 6 …. Yes Pseudoinstruction Yes No ORG Yes END No No Yes No MRI Get operation code and set bits 2-4 Search addresssymbol table for binary equivalent of symbolic address and set bits 5-16 » Error Diagnostics Pseudoinstruction, MRI, non-MRI 에 속하지 않음 Set LC DEC or HEX Valid No non-MRI instruction Convert operand to binary and store in location given by LC Yes Tab. 6-9 의 Content Done Scan next line of code » 다음의 4 개의 Table을 참고하여 Instruction Format에 의한 Binary Tab. 6-9 에서의 Code 형성 (Pseudoinstruction Table, Contents를 결정 MRI Table, Non-MRI Table, Address Symbol Table) » Flowchart of second pass : 이 경우는 Fig. 6-2 Hand Assemble » Binary Code translation 예제 : 0 … Yes No I 15 16 Set first bit to 1 Store binary equivalent of instruction in location given by LC Error in line of code Error Set first bit to 0 Address Assembley all parts of binary instruction and store in location given by LC Increment LC Fig. 6-2 Flowchart for second pass of assembler Computer System Architecture Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-6 6-5 Program Loops Tab. 6-13 Symbolic Program to Add 100 numbers Program Loops z A sequence of instructions that are executed many times Example of program loop z Sum of 100 integer numbers » Fortran DIMENSION A(100) INTEGER SUM, A SUM = 0 DO 3 J = 1, 100 3 SUM = SUM + A(J) z Symbolic Program : Tab 6-13 » Address 150 부터 100 개의 Data를 더하기 Computer System Architecture Line 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 , , 118 119 LOP, ADS, PTR, NBR, CTR, SUM, ORG LDA STA LDA STA CLA ADD ISZ ISZ BUN STA HLT HEX HEX DEC HEX HEX ORG DEC , , DEC END 100 ADS PTR NBR CTR PTR I PTR CTR LOP SUM 150 0 -100 0 0 150 75 , . 23 Chap. 6 Programming the Basic Computer / / / / / / / / / / A = 150 PTR = 150 A = -100 CTR = -100 A=0 A + 75 (150 번지의 내용) 150 + 1 = 151 -100 + 1 = -99 Loop until CTR = 0 Store A to SUM / 150 / -100 / Result of Sum Data © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-7 6-6 Programming Arithmetic & Logic Operations Hardware implementation z Operations are implemented in a computer with one machine instruction z Ex) ADD, SUB : 그러나 자리수가 늘어나면 Software subroutine 처리 Software implementation z Operations are implemented by a set of instruction(Subroutine) z Ex) MUL, DIV : 그러나 이와 같은 명령어를 갖는 CPU도 있음 Multiplication Program z Positive Number Multiplication » X = multiplicand Y = multiplier P = Partial Product Sum » Y 를 AC 에 저장한 후 E 로 Algorithm Fig. 6-3 Computer System Architecture Circular Right E = 1 : P에 1111을 더함 E = 0 : 더하지 않음 X=1111 Y=1011 1111 1111 0000 1111 10100101 Chap. 6 Programming the Basic Computer P=00000000 +00001111 P=00001111 +00011110 P=00101101 +00000000 P=00101101 +01111000 P=10100101 © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-8 Fig. 6-3 flowchart for Multiplication Program CTR P -8 0 E 0 AC Y cir EAC Y AC =0 =1 E P P+X E AC 0 X cil EAC X CTR AC CTR + 1 ≠0 =0 CTR Computer System Architecture Stop Tab. 6-14 Program to Multiply Two Positive numbers Line 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 LOP, ONE, ZRO, CTR, X, Y, P, ORG CLE LDA CIR STA SZE BUN BUN LDA ADD STA CLE LDA CIL STA ISZ BUN HLT DEC HEX HEX HEX END 100 Y Y ONE ZRO X P P X X CTR LOP /A=0 / A = Y (000B) / Circular Right to E / Store shifted Y / Check if E = 0 /E=1 /E=0 A = X (000F) /X=X+P / St o r / Clear E /A=X / A = 00011110 (00001111) / St o r / CTR = - 7 = -8 + 1 / Repeat until CTR = 0 -8 000F 000B 0 Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-9 Double Precision Addition : 32 bits z 하위 AL + BL 먼저 수행하여 Line E 를 상위에 반영(AH + BH + E) 1 31 + 16 15 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 AH AL BH BL CH CL AL, AH, BL, BH, CL, CH, LDA ADD STA CLA CIL ADD ADD STA HLT DEC DEC DEC DEC HEX HEX AL BL CL AH BH CH ? ? ? ? 0 0 / / / / / / / / A = AL A = AL + BL Store A to CL A=0 0000 0000 0000 000?(?=E) A = 00(E=0) or 01(E=1) A = A + AH + BH Store A to CH / Operand Logic Operations z Logic Operation 중에서 OR 명령이 없다(Tab. 6-1) » 추가 하려면 더 길은 Instruction Format 필요 z 해결 방법 : DeMorgan’s theorem » A+ B = A+ B = A⋅B Computer System Architecture LDA CMA STA LDA CMA AND CMA A TMP B TMP Chap. 6 Programming the Basic Computer / / P / / / / / Load A Complement A St o r Load B Complement AND Complement © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-10 Shift Operations z Logical Shift : Zero must added to the extreme position » Shift Right » Shift Left z E CLE CIR 0 E CLE CIL Arithmetic Shift Right » Positive ( + = 0 ) » Negative ( - = 1 ) 0 0 E 0 0 E 1 0 1 CLE SPA CME CIR / / / / E= 0 Skip if A= +, E= 0 Toggle E(=1) if A= Circulate A with E 6-7 Subroutines Subroutine z A set of common instruction that can be used in a program many times z In basic computer, the link between the main program and a subroutine is the BSA instruction(Branch and Save return Address) z Subroutine example : Tab. 6-16 Computer System Architecture Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-11 Location 100 101 102 103 104 105 106 107 108 109 10A 10B 10C 10D 10E 10F 110 110 X, Y, SH4, MSK, ORG LDA BSA STA LDA BSA STA HLT HEX HEX HEX CIL CIL CIL CIL AND BUN HEX END 100 X SH4 X Y SH4 Y / / / / / / / Main Program Load X Call SH4 with X Store result X Load Y Call SH4 with Y Store result Y 1234 4321 0 / / / / Result = 2340 Result = 3210 Subr Save Return Address MSK SH4 I FFF0 / Mask lower 4 bit / Indirect Return to main / Mask pattern Subroutine CALL hear Ex) 1234 - CIL 4 회 = 2340 - Mask : AND FFF0 - 결과 = 2340 X = 102 Y = 105 Tab. 6-16 Program to Demonstrate the use of Subroutines Computer System Architecture Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-12 Subroutine Parameters & Data Linkage z Parameter(or Argument) Passing » When a subroutine is called, the main program must transfer the data z 2 가지 Parameter Passing 방법 » 1) Data transfer through the Accumulator Used for only single input and single output parameter » 2) Data transfer through the Memory Call 후에 Return Address를 이용 z 여러 개의 Operand 전달 가능 Operand are often placed in memory locations following the CALL 2 개의 Parameter Passing 예 : Tab. 6-17 » First Operand and Result : Accumulator » Second Operand : Inserted in location following the BSA z Tab. 6-17 Program to Demonstrate Parameter Linkage Location 200 201 202 203 204 205 206 207 208 209 20A 20B 20C 20D 20E 20F 210 X, Y, OR, TMP, ORG LDA BSA HEX STA HLT HEX HEX HEX CMA STA LDA CMA AND CMA ISZ BUN HEX END 200 X OR 3AF6 Y 7B95 0 0 TMP OR I TMP OR OR I 0 / / / / Load first operand X Call OR with X Second operand Subroutine return here(Y=result) / / / / / / / / / / / First operand Result store here Return address = 202 Complement X TMP = X A = 3AF6 (202 번지의 내용) Complement Second operand AND 전체 Complement Return Address = 202 + 1 = 203 Return to main BSA후에 2개 Operand 예 : Tab. 6-18 » BSA 후에 2개의 Operand 사용 » Block 전송 Source 와 Destination Address로 사용 Computer System Architecture * OR Subroutine First Operand : X = 7B95 Second Operand : BSA후 = 3AF6 Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-13 Tab. 6-18 Subroutine to Move a Block of Data 100 101 102 103 104 105 106 107 108 109 10A 10B 10C 10D 10E 10F 110 111 112 113 114 115 116 117 118 MVE, LOP, PT1, PT2, CTR, Computer System Architecture ORG BSA HEX HEX DEC HLT HEX LDA STA ISZ LDA STA ISZ LDA STA ISZ LDA STA ISZ ISZ ISZ BUN BUN HEX HEX DEC 100 MVE 200 300 -16 / / / / Subroutine Call Source Address Destin Addressa Number of data to move 0 MVE PT1 MVE MVE PT2 MVE MVE CTR MVE PT1 PT2 PT1 PT2 CTR LOP MVE ? ? ? / / / / / / / / / / / / / / / / / / / / Return address= 101 A= 200 PT1= 200 Return address= 102 A= 300 PT2= 300 Return address= 103 A= -16 CTR= -16 Return address= 104 A= Address 200의 내용 Address 300에 저장 PT1= 201 PT2= 301 CTR= -15 if 0 skip Loop until CTR= 0 104 로 Retur = HLT Source Destination Counter I I I I I I 2 개의 Operand * Block Move Subroutine 메모리 200 번지 부터 16개의 데이터를 메모리 300 번지로 이동 Chap. 6 Programming the Basic Computer © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-14 6-8 Input-Output Programming Two-character I/O z Two character Packing One-character I/O z Programmed I/O 방식 Tab. 6-19 Program to input and output One character Tab. 6-20 Subroutine to input and pack Two character (a) Input a character CIF, SKI BUN CIF INP OUT STA CHR HLT CHR, ? IN2, FST, (b) Output a character LDA CHR COF, SKO BUN COF OUT HLT CHR, HEX 0057 / / / / / Check FGI = 1 ? Go to CIF if FGI= 0 Input character (FGI = 1) Echo Back Store character / Store character here / / / / Load output character Check FGO = 1 ? Go to COF if FGO= 0 Output character (FGO = 1) SCD, HEX SKI BUN INP OUT BSA BSA SKI BUN INP OUT BUN ? / / / / / / / FST SH4 SH4 Save return address Check if FGI= 1 ? Loop (FGI = 0) Input first character Echo back Shift left 4 bit Again(total 8 bit shift) SCD / Input second character / Echo back / Return IN2 I 15 8 7 0 1st Char / Output character = "W" 1st Char 1st Char Computer System Architecture Chap. 6 Programming the Basic Computer 2nd Char © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-15 Compare Two Word Store Input Character in Buffer Tab. 6-21 Program to store input character in buffer LOP, ADS, PTR, LDA STA BSA STA ISZ BUN HLT HEX HEX ADS PTR IN2 PTR I PTR LOP / / / / / / 500 0 / Buffer address / Pointer Computer System Architecture Tab. 6-22 Program to compare Two word Load buffer address A= 500 PTR= 500 Get a character (Tab. 6-20) 500 번지에 character 저장 PTR= 501 Endless Loop WD1, WD2, LDA CMA INC ADD SZA BUN BUN HEX HEX WD1 / Load first word A= WD1 / Make 2's complement WD2 / / / / / / UEQ EQL ? ? Chap. 6 Programming the Basic Computer WD2 - WD1 Skip if A=0 (Equal) Unequal Equal first word second wor © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. 6-16 Interrupt Program z Interrupt Condition Location 0 1 » Interrupt F/F R = 1 when IEN = 1 and [FGI or FGO = 1] » Save return address at 0000 Interrupt » Jump to 0001 (Interrupt Start) Here z ZRO, 100 101 102 103 104 ORG HEX BUN 0 ? SRV / Save Interrupt Return Address / Jump to ISR ORG CLA ION LDA ADD STA 100 / Main program / Turn on Interrupt(IEN= 1) X Y Z / Interrupt occurs here / Return Address(104 ) Interrupt Service Routine(ISR) » » » » » » 1) Save Register (AC, E) 2) Check Input or Output Flag 3) Input or Output Service Routine 4) Restore Register (AC, E) 5) Interrupt Enable (ION) 6) Return to the running program Modified Fetch Cycle 과 Reset 시에 IEN = 0 이 된다 (p. 158, Fig. 5-15) 200 201 202 203 204 205 206 207 208 SRV, NXT, EXT, SAC, SE, PT1, PT2, Computer System Architecture ORG STA CIR STA SKI BUN INP OUT STA ISZ SKO BUN LDA OUT ISZ LDA CIL LDA ION BUN HEX HEX HEX HEX Chap. 6 Programming the Basic Computer 200 SAC SE NXT PT1 I PT1 EXT PT2 I PT2 SE SAC ZRO I ? ? 300 400 / / / / / / / / / / / / / / Save A to SAC Move A into A(15) Sav e Check if FGI= 1? No, FGI= 0, Check FGO Yes, FGI= 1, Character Input Echo back Store in input buffer(PT1) PT1 + 1 Check if FGO= 1? No, FGO= 0, Exit Yes, FGO= 1, Get output character Character output PT2 + 1 / / / / Restore E Restore A Int e Return to running program(104 ) / Input Buffer Address / Output Buffer Address © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm.