UNIVERSITY OF TEHRAN
Electrical and Computer Engineering Department
ECE 517-3586 Logic Design, Test # 2
Fall Semester 1377
Week of Lecture 32
Computer Account #___________________
First Name :_________________________
Last Name :__________________________
Number :_____________________________
Signature :__________________________
Grade:
Problem 1. ______/20
Problem 2. ______/20
Problem 3. ______/20
Problem 4. ______/20
Problem 5. ______/20
Total: ______/100
DO NOT USE LAPTOPS
EXTRA SHEETS WILL NOT BE ACCEPTED
THIS IS A CLOSED BOOK CLOSED NOTE EXAM
YOU HAVE TWO HOURS FOR WORKING ON THIS TEST
YOU MUST SHOW COMPLETE WORK ON ALL PROBLEMS
NOT ALL FREE MAPS AND DRAWINGS ARE NECESSARILY NEEDED
1
1. A Moore machine with two inputs a and b and output z is to be designed. The a input
is treated as the enable input and the b input is the data input. While a is 0, all data on
b will be ignored. When a is 1 and while it remains 1, the machine searches for a
sequence of 110 on the b input. When this sequence is detected, the output becomes
1 for exactly one clock pulse. The search for the 110 sequence continues while a is
still 1. When input a becomes 0 (after a sequence has been detected or while a
sequence is being searched for) the search stops and the machine returns to its starting
state. Show state diagram and complete gate level implementation of this machine
using D-type flip-flops. Instead of showing gates, a box with appropriate Boolean
expression written in it is sufficient.
Q
1D
C1
Q
1D
C1
Q
1D
C1
ab
cd
00
01
11
10
00
01
11
10
ab
cd
00
01
11
10
00
01
11
10
ab
cd
00
01
11
10
00
01
11
10
2
2. A) Use 74LS163 and two rising-edge triggered D-type flip-flops to design a
waveform generator circuit. The circuit has a periodic clock input and a waveform
output. The frequency of the output is the input frequency divided by n, where n
periodically changes between 3, 5, and 7. That is, for every 3 pulses on the input one
pulse in generated on the output, next, for every 5 input pulses one pulse is generated
on the output, and next, for every 7 input pulses one pulse is generated on the output.
Then again for every 3 pulses on the input one output pulse is generated and this
process repeats again. Use a minimum number of extra gates. B) Add extra circuitry
that resets this waveform generator such that after a reset it starts with dividing the
input frequency by 3. C) Assuming the circuit is reset, show the output waveform for
the input clocks shown below.
3
3. Show one-hot implementation of a Moore state machine that continuously searches
on its x input for 10111 or 11011 sequences. If either sequence is found the circuit
output, z, becomes 1. Also, while the search is being done for these sequences if in
the last 3 clocks a 101 sequence has appeared on the x input the output becomes 1.
Show the complete design of this circuit using D-type flip-flops and AND, OR and
NOT gates. Show the state diagram for this machine as well as its one-hot
implementation. Hint: Detecting 101 in the last 3 clocks does not require and extra
flip-flops.
4
4. Given the following Primitive Flow Table you are to implement this Fundamental
Mode Asynchronous circuit using basic gates. A) From this table generate a flow
table by minimizing it. You can use a formal method such as the implication table or
you can minimize it by inspection. B) For the flow table obtained in Part A make a
race-free state assignment. C) Assign unknown state output values. D) Show the
complete gate-level implementation of this circuit. Instead of using gates in your
diagram, you can draw boxes with appropriate Boolean expressions written in them.
xy:
00
1
1
01
11
3
10
--
2
,0
2
3
1
1
-c
3
4
2
5
,0
--
,0
4
5
--
6
4
7
--
2
,0
5
2
,1
6
6
1
,1
8
---
7
1
7 ,1
5
8
--
6
8
,1
2
5
5. Given the following register with the feedback shown, show the outputs of the
register for the next 10 clock pulses. Assume that the starting value of the register is
00001 and the values on Xin appear as shown in the table below. What is the
maximum number of states of this machine? Instead of the initial state shown in the
table below, find an initial state (i.e., Q4, Q3, Q2, Q1, Q0 = ?????) from which the
machine will never move out. Place your answers in the boxes shown below.
D
DFF
Q4
D
Q3
DFF
D
DFF
Q2
D
DFF
Q1
D
Q0
DFF
Xin
clock
Clock#
0
1
2
3
4
5
6
7
8
9
10
Xin
1
1
1
1
0
0
0
0
1
1
1
Q4
0
Q3
0
Q2
0
Q1
0
Q0
1
Maximim number of states:
Q4, Q3, Q2, Q1, Q0 =
6