Performance Limits In DS-CDMA Timing Acquisition
Landolsi, MA
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, IEEE TRANSACTIONS
ON WIRELESS COMMUNICATIONS; pp: 3248-3255; Vol: 6
King Fahd University of Petroleum & Minerals
http://www.kfupm.edu.sa
Summary
This paper addresses timing acquisition aspects in direct-sequence code division
multiple access (DS-CDMA) systems. Various chip waveform shaping schemes are
considered, including both one-chip long full-response pulses, and partial-response
ones occupying several chip periods. Different figures of merits are considered in a
comparative analysis that seeks to establish performance limits in terms of correct
timing detection capability, false alarm rate, bandwidth occupancy, multiple-access
interference (MAI), and inter-chip interference (ICI). A waveform design algorithm is
formulated to optimize system performance in terms of signal-to-interference-ratio
(SIR) subject to other signalling constraints, and a solution based on the use of prolate
spheroidal wave functions (PSWF) is derived. Numerous waveform design examples
are then constructed to illustrate acquisition detection capability versus system load
for both faded and unfaded cases. A comparative assessment of the performance of
conventional signalling waveforms against the optimized ones is also presented. In
particular, the numerical results show that the half-sine pulse used in Minimum Shift
Keying (MSK) is quasi-optimal within the full-response category, while Root-Raised
Cosine (RRC) Nyquist filtering with 22% rolloff (used in third generation CDMA
standards) is also close to optimal when considering many-chip-long pulses.
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Copyright: King Fahd University of Petroleum & Minerals; http://www.kfupm.edu.sa
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©
Copyright: King Fahd University of Petroleum & Minerals; http://www.kfupm.edu.sa