ECE 525: Hardware-Oriented Security and Trust
Course:
ECE 525: Hardware-Oriented Security and Trust, Spring 2012. 3 credits.
Course Instructor:
Prof. Jim Plusquellic
Office: ECE 236C, Telephone: 7-0785
Email: jimp@ece.unm.edu, Home Page: http://www.ece.unm.edu/~jimp/
Office Hours: by appointment
Course Description
This course will investigate recent technology developments for the design and evaluation
of secure and trustworthy hardware. Technology is required to ensure that a trustworthy
circuit module remains secure during its entire lifecycle from design to manufacturing to
deployment and operation. First, there is need for a design flow that can produce trustworthy circuits, and that will protect the hardware platform against tampering and the unauthorized extraction of information. Second, the manufacturing, integration and
deployment of a trustworthy integrated circuit needs protection against malicious design
modifications, or Trojans. Techniques are needed to detect the presence of Trojans in fabricated devices, and to locate them in the design. Third, there is need to implement support
for trust at the hardware circuit level. Secret-key generation on the basis of a single device
is a must for chip anti-counterfeiting, to handle hardware licensing and metering, and to
build a base of trust for secure applications. Physically Unclonable Functions (PUFs) are a
challenging and promising solution to this problem. These and other topics related to the
security and trust of hardware systems will be covered in this course.
Learning Objectives:
Students completing this course will be exposed to a wide range of topics in the new field
of HOST, and will be able to undertake tasks related to HOST, in industry, government or
academic jobs, including:
• Will be knowledgeable of emerging security and trust issues associated with hardware systems
• Will be able to assess vulnerabilities of a hardware device or system
• Will be able to describe attack scenarios that threaten such systems
• Will be able to recommend countermeasures for security and trust vulnerabilities
• Will have experience in the design and implementation of security and trust primitives on both
ASIC and FPGA integrated circuits
• Will be able to evaluate the security and trust of hardware systems using different types of system testing
• Will be able to work in groups to devise security and trust design and evaluation processes
Text:
No Text is available. We will read papers from the Symposium on Hardware-Oriented
Security and Trust (I am a co-founder: http://www.hostsymposium.org/), Transactions on
Information Forensics and Security (TIFS), and will draw material from cryptography
(http://cseweb.ucsd.edu/users/mihir/cse207/classnotes.html) and other sources, e.g., http://
www.trust-hub.org/ where appropriate.
ECE 525: Hardware-Oriented Security and Trust
Supplementary Text:
To be announced
Grading:
The distribution of weights for the exams, homeworks and projects is as follows:
Component
PCT
Midterm
25%
Final
35%
Homework/Labs/Project
35%
Class Participation
5%
No incompletes will be given, except as required by university policy for truly exceptional
circumstances.
Students are encouraged to participate in class.
Cheating at any time in this course will cause you to fail the course.
For a complete description of academic dishonesty, refer to the UNM Student Handbook.
ECE 525: Hardware-Oriented Security and Trust
Tentative Course Outline:
Date
Lecture
Week 1
Week 2
Week 3
Week 4
Week 5
Overview of Hardware Security Areas/Hardware Trojan Problem: News Articles
Hardware Trojan Problem: Taxonomy and Proposed Solutions
Hardware & Software (IP) Trojans: Proposed Solutions
Cryptography Principles and Applications
Cryptographic Hardware Engines & Vulnerabilities, e.g., Differential Power Analysis
Cryptographic Hardware Counter-Measures
OS Hardware Security & Midterm Exam
Fall Break
Physical Unclonable Functions: Principles and Quality Criteria
Physical Unclonable Functions: Implementation Strategies
IC Piracy and Hardware Metering Strategies
IP Piracy and Counter-Measures
FPGA Security Issues
Thanksgiving
Trusted Companion ICs and Board Level Security
Miscellaneous HOST Issues: CAD Tool Security, Scan-Chain Security, etc.
Final exam
Week 6
Week 7
Week 8
Week 9
Week 10
Week 11
Week 12
Week 13
Week 14
Week 15
Week 16
(Note: Changes/Additions to this schedule will be posted on my web site
http://www.ece.unm.edu/~jimp)