Synario Instructions
Using Synario to compile an ABEL file for programming the GALs:
1) Start Synario. You will be in the Project Navigator window.
2) Choose 'New Project' from the File Menu
Choose Project Type: 'IC Design'.
**Note which directory in which you are saving your files.**
3) Double-Click on 'Virtual Device'.
Select Device Kit: 'Standard PLDs'
Select Device" 'P16V8'.
Confirm the change
4) Select 'New' from the Source Menu.
Select a New ABEL-HDL Module.
5) Give whatever Module names, titles, etc. that you want.
Keep these names less than eight characters.
Enter your ABEL source code in the text file editor.
Save the ABEl file.
6) Go back to the Project Navigator window.
Select your ABEL source file from the Sources in Project list(left side of window)
Click on the 'Properties' button (bottom of screen).
Select ABEL compatibility.
Use the pull down menu to change this setting from 'none' to
'Full Implied Logic & ABEL 3.XX/4.XX'.
Close the window.
7) Select your device ('P16V8').
8) In the processes for current source list double-click on the 'link design' process.
(This will compile your source file)
**If there are any errors (syntax or settings), it will not compile properly. You will
have to go back into the source file and fix it then recompile.**
9) Double-click on 'Fit Design'.
(This will make sure that your design can fit in your design)
10) Double-Click on 'Create Fuse Map''.
(This will create the fuse map of your equations for your particular chip and the jedec
file which is read by the DATA IO programmer.)
11) Double-click on the 'Chip Report' report.
(This will create a report (a text file) that describes the final configuration of your
device.)
Check this file if it is what you want.
12) Find the .Jed file in your working directory and copy it into a disk.
Bring this to the DataIO programmer to program your file.
Good Luck!!!!