Document Number: TR-41.1/01-05-034
STANDARDS PROJECT:
TR41.1 - Draft 6 of ANSI/TIA/EIA-464-C updates
TITLE:
Proposal to correct mistakes in existing 464-B, Figures 29 and
32 (Draft 6 464-C, Figures 27 and 30).
ISSUES ADDRESSED:
Correct draft 6 of 464-C, Figures 27 and 30 and rearrange the
sections relating to these 2 figures.
SOURCE:
Siemens
CONTACT:
Tailey Tung
Phone: (408)492-5049
Fax: (408)492-2329
e-mail: tailey.tung@icn.siemens.com
DATE:
May 10, 2001.
DISTRIBUTION TO:
TIA TR-41.1 (MLTS)
KEYWORDS:
T1 Figures
NOTICE: The proposals in this submission have been formulated to assist Subcommittee
TIA TR-41.1. This document is offered to the subcommittee as a basis for discussion and is
not binding on Siemens. The requirements are subject to change in form and numerical
value after more study. Siemens specifically reserves the right to add to, or amend, the
quantitative statements made herein. Nothing contained herein shall be construed as
conferring by implication, estoppel, or otherwise any license or right under any patent,
whether or not the use of information herein necessarily employs an invention of any existing
or later issued patent.
The contributor grants a free, irrevocable license to the Telecommunications Industry
Association (TIA) to incorporate text contained in this contribution and any modifications
thereof in the creation of a TIA standards publication; to copyright in TIA’s name any
standards publication even though it may include portions of this contribution; and, at TIA’s
sole discretion, to permit others to reproduce in whole or in part the resulting TIA standards
publication.
Page 1
1. Introduction
The purpose of this contribution is to correct the mistakes in the existing ANSI/TIA/EIA-464-B,
Figure 29 and 32 (Draft 6 464-C Figures 27 and 30) and to rearrange the sections relating to
these 2 Figures.
2. Proposed changes to ANSI/TIA/EIA-464-B, Section 5.2.2.1.1 through 5.2.2.3.2
The following are the purposed changes to Draft 6 464-C, Figures 27 and 30 and the relating
sections, starting from section 5.2.2.1.1.
5.2.2.1.1
Frame Structure
The frame consists of 24 eight bit words (octets) and one frame bit for a total of 193 bits per frame, as
shown in Figure 27. The nominal bit rate of the outgoing DSX-1 or DS1 signal is 1.544 Mb/s, and the
frame repetition rate is 8 kHz.
1 Frame
125 µs, 193 Bits
1
F
1
2
3
4
Time
Slot #
2
5
Sampling Frequency:
Output Bit Rate:
Bits/Frame:
Time Slots/Frame:
6
7
8
1
2
3
4
5
6
7
8
Bit #
1
2
3
4
24
5
6
8000 Hz
1.544 Mb/s
193
24 (Sequential Assignment)
Figure 27 - 1.544 Mb/s Signal Format
5.2.2.1.1
Channel Numbering
Channels are numbered sequentially from 1 to 24 in the order that they are presented to a receiver.
5.2.2.2
Superframe Format
In the Superframe Framing format, the frame bit is time shared to identify both channel framing and
signaling channel framing as shown in Figure 28. Both channel framing and signaling framing identify
the location of time slot one and signaling framing identifies those frames in which signaling channels A
and B are normally transmitted when using robbed bit signaling.
Page 2
7
8
Frame
Number
Bit
Number
F Bit
FS
FT
Information
Coding Bits
Signaling
Bit
1
0
-
1
1-8
-
2
193
0
-
1-8
-
3
386
-
0
1-8
-
4
579
0
-
1-8
-
5
772
-
1
1-8
-
6
965
1
-
1-7
8
7
1158
-
0
1-8
-
8
1351
1
-
1-8
-
9
1544
-
1
1-8
-
10
1737
1
-
1-8
-
11
1930
-
0
1-8
-
12
2123
0
-
1-7
8
Signaling
Channel
A
B
FS - Signaling Channel Framing (Sequence ...001110...)
FT - Terminal Framing (Sequence ...101010...)
Figure 28 - Superframe Framing Format
5.2.2.3
Extended Superframe Framing Format
As an option to the use of the Superframe Framing format, the Extended Superframe Framing format
(ESF) may be used. ESF will replace the earlier SF format as the standard for DS1 level framing in
North America. The ESF format is described in Ref 12. It is planned for implementation in all new
designs of DS1 level equipment that frame on a pattern contained within the framing bit position of the
DS1 1.544 Mb/s signal. ESF framing is not compatible with SF framing.
The ESF framing format "extends" the DS1 superframe structure from 12 frames (2316 bits) to 24
frames (4632 bits) and redefines the 8 kb/s framing bit position. The 8 kb/s ESF channel is divided into 2
kb/s for channel framing and signaling channel framing, 2 kb/s for a Cyclic Redundancy Check code
(CRC-6), and 4 kb/s for a data link. The ESF also supports multiple state signaling.
Page 3
5.2.2.3.1
2 kb/s Framing Pattern
As shown in Figure 29, beginning with frame 4 (Extended Superframe bit 579), the framing bit of every
fourth frame forms the pattern 001011. . .001011. This pattern is used to determine channel and
signaling channel synchronization. Frame synchronization is used to locate the 24 DS0 channels in each
frame. Superframe synchronization is used to identify where each particular frame is located within the
superframe to perform the CRC-6 checks and identify the relationship of signaling information to DS0
channels.
5.2.2.3.2
2 kb/s Cyclic Redundancy Check, CRC-6
The cyclic redundancy check code, CRC-6 is a method of performance monitoring that is contained
within the F-bit position of frames 2, 6, 10, 14, 18, and 22 of every superframe (see Figure 29). The
CRC-6 code has the ability to detect most errors that occur on the DS1 signal and can be used in various
applications such as false framing protection, protection switching, performance monitoring, and line
verification before, during, and after maintenance. The CRC-6 is capable of detecting 63/64 (98.4%) of
all CRC Message Blocks (CMBs) containing transmission errors. It does not give an indication of the
number of errors in a CMB, only that there was at least one.
The CRC-6 message block check bits CB1, CB2, CB3, CB4, CB5, and CB6 are contained within the
Extended Superframe (ESF) format bits 193, 965, 1737, 2509, 3281, and 4053 respectively, as shown in
Figure 29. The CRC-6 Message Block (CMB), shown in Figure 30, is a sequence of 4632 serial bits that
is coincident with an ESF. By definition, CMB N begins at bit position 0 of ESF N and ends with bit
4631 of ESF N. The first transmitted bit of a CMB is the most significant bit of the CMB polynomial.
For the purpose of generating the CRC-6 sequence, each F-bit position in the CMB should be set to a
binary one. That is, the information in the F-bit position will have the value "1" in the calculation of the
CRC-6 bits. All information in the other bit positions will be identical to the information in the
corresponding ESF bit positions.
The Check-Bit sequence CB1 through CB6 transmitted in ESF N+1 is the remainder after multiplication
by the polynomial X6 and then division (Modulo-2) by the generator polynomial X6 + X + 1 of the
polynomial corresponding to CMB N. The first check bit (CB1) is the most significant bit of the
remainder; the last check bit (CB6) is the least significant bit of the remainder. Each ESF contains the
CRC-6 check bits generated for the preceding CMB.
At the transmitter, the initial remainder of the division for each CMB is preset to all zeros and is then
modified by division by the generator polynomial (as described above). The division is performed on
CMBs after the F-bits are set to a binary "1". The remainder bits should then be inserted into the check
bit positions of the subsequent ESF.
At the receiver, the initial remainder of the division for each received CMB is preset to all zeros and is
then modified by division by the generator polynomial. The resulting remainder is compared on a bit-bybit basis with the CRC-6 check bits contained in the subsequently received ESF. The compared check
bits will be identical in the absence of transmission errors.
A mathematical example of the generation of check bits is shown in Figure 31. For simplicity, a CMB
length of 10 bits has been used instead of the actual length of 4632 bits.
Page 4
ESF
Frame
Number
ESF Bit
Number
F-Bit Assignment
Bit use in each 8-bit
Time Slot
FPS
{F}DL
CRC
Traffic
Robbedbit
Signaling
1
0
-
m
-
1-8
-
2
193
-
-
CB1
1-8
-
3
386
-
m
-
1-8
-
4
579
0
-
-
1-8
-
5
772
-
m
-
1-8
-
6
965
-
-
CB2
1-7
8
7
1158
-
m
-
1-8
-
8
1351
0
-
-
1-8
-
9
1544
-
m
-
1-8
-
10
1737
-
-
CB3
1-8
-
11
1930
-
m
-
1-8
-
12
2123
1
-
-
1-7
8
13
2316
-
m
-
1-8
-
14
2509
-
-
CB4
1-8
-
15
2702
-
m
-
1-8
-
16
2895
0
-
-
1-8
-
17
3088
-
m
-
1-8
-
18
3281
-
-
CB5
1-7
8
19
3474
-
m
-
1-8
-
20
3667
1
-
-
1-8
-
21
3860
-
m
-
1-8
-
22
4053
-
-
CB6
1-8
-
23
4246
-
m
-
1-8
-
24
4439
1
-
-
1-7
8
FPS:
{F}DL:
CRC:
Option T:
Signaling Bit
Use Options
T
Signaling
Channel
-
A
A
A
-
A
B
B
-
A
A
C
-
A
B
D
Framing Pattern Sequence (...001011...)
4 kb/s {Facility} Data Link (message bits m)
CRC-6 Cyclic Redundancy Check (check bits CB1-CB6)
Traffic (Bit 8 not used for robbed-bit signaling)
Figure 29 - Extended Superframe Framing (ESF) F-Bit Assignments
Page 5
F-Bit use
F-Bit
Frame
CB6
4053
m
4246
22
1
4439
23
m
0
24
CB1
193
1
CB6
4053
m
4246
22
2 - 21
ESF N-1
ESF N
CMB N-1
CMB N
Figure 30 - ESF/CMB Relationship
Page 6
1
4439
23
m
0
24