430 Day 2006
Fully accessible pins
LED
MSP430F2013
USB Emulator
Removable
Target Board
MSP430 Ultra-Low-Power MCUs
© 2006 Texas Instruments Inc, Slide 1
Thank you for attending the forth annual world-wide 430 Day!
You are part of audience of over 5000 engineers worldwide that will learn the MSP430. Thank you for
attending.
Agenda MSP430 Day 2006
• MSP430 Overview
• MSP430x1xx / 4xx
• New MSP430F2xx
• New eZ430 Emulator
• Support / Future Products
© 2006 Texas Instruments Inc, Slide 2
This section will provide a general overview of the MSP430 architecture and the ultra-low power
concept.
TI Microcontroller Portfolio
C2000TM
DSC
16/32-bit
150 MIPS
TMS470
ARM7TDMI
MSP430
8-bit
Ultra-low Power
High Performance
• Motor Control
• Digital Power Supply
Industry Standard
• Automotive
• Industrial
Measurement
• Utility Metering
• Portable Instrumentation
Performance
© 2006 Texas Instruments Inc, Slide 3
TI offers three distinct MCU product families optimized for different application segments.
The C2000 family addresses the high end of the 32-bit MCU and low-end of the DSP market – often
called digital signal controller (DSC) – combining DSP and microcontroller features on a single chip. The
primary applications areas targeted are motor control and digital power supply. Up to 150 32-bit highquality DSP MIPS are offered.
The TMS470 is based on an industry standard ARM7TDMI architecture and was developed originally for
32/16-bit automotive applications. A focused subset of the product line is offered as general purpose
devices for a wide range of industrial applications that include medical instrumentation, point of sale
terminals and communication gateways.
The MSP430 family targets ultra-low power metering and measurement applications in the 8 and 16-bit
market space. The product line offers a wide range of catalog devices as well as application specific
standard products (ASSP) solutions in the metering and portable instrumentation. The product family is
noted specifically for lower power with devices starting as low as $0.49.
Ultra-low Power + High-Performance
• 0.1µA power down
• 0.8µA standby mode
• Modern 16-bit RISC CPU
• 250µA / 1MIPS
• 1K to 128KB+ ISP Flash
• <1µs clock start-up
• 14- to 100-pin options
• Zero-power BOR
• Intelligent peripherals
boost performance
• <50nA port leakage
• Embedded emulation
© 2006 Texas Instruments Inc, Slide 4
MSP430 - Mixed Signal Processor. The features of the MSP430 make it ideal for battery-powered
measurement applications.
Ultra-low Power; The MSP430 architecture is designed specifically for ultra-low power applications.
Specific operating modes are implemented to reduce power consumption and extend battery life. The
real-time clock mode uses as little as 0.8µA and can transition to industry leading 250mA / MIPS fullspeed active mode in less than 1µs.
Other important low-power feature such as zero-power brown-out reset (BOR) and extremely low pin
leakage have enabled MSP430 customers to develop battery-based products that will last for over 10years from the original battery!
Over 100+ MSP430 devices are available integrating from 1KB to 128KB of Flash with 14 to 100 pins
that allow a perfect fit for many applications.
The MSP430 modern 16-bit RISC architecture reduces code size and allows advanced signal processing
features not possible using conventional 8-bit MCUs.
Intelligent mixed-signal peripherals including 10-16-bit ADC’s, comparators, DAC’s, LCD drivers and
supply voltage supervisors support precision measurement. This allows applications to get implemented
faster, using less code and power at lower cost.
Applications operating at lower power, with smaller packaging and higher-precision analog benefit
greatly from the MSP430’s embedded emulation. No external emulator is required as the device emulates
itself. JTAG is used to communicate unobtrusively with the MSP430 in application. This means that all
development is done under the same condition that will be seen in the final product. Using embedded
emulation projects are developed faster, with few errors and at a lower cost.
Ultra-low Power Activity Profile
<1µs
• Extended Ultra-low Power standby
• Interrupt-driven burst processing
© 2006 Texas Instruments Inc, Slide 5
The MSP430 is designed specifically for ultra-low power applications. The total system power
consumption is the absolute lowest, without compromise in performance.
The system enters and remains in an ultra-low power standby mode as long as possible and is awoke only
to service interrupts and then returns to standby mode quickly
. This extended standby mode
profile is common for many low-power applications that respond only to events once every few seconds,
such as a thermostat or once every few hours such as a personal medical device.
To service interrupt driven events, the software efficiently uses the 16-bit RISC CPU’s performance in
very short, “burst” intervals. Transition from standby to full active is less than 1us.
The MSP430 delivers a combination of ultra-low power and very high-performance on-demand.
Ultra-low Power Clock System
• Always-on low-frequency ACLK
• On-demand high-speed DCO
• DCO on and stable in <1µs
© 2006 Texas Instruments Inc, Slide 6
Multiple oscillators are utilized to provide both an ultra-low power standby mode and “on-demand” highperformance processing.
The clock system is flexible and allows the MSP430 to operate optimally from a single 32kHz crystal
sourcing an always on low frequency Auxiliary Clock (ACLK) with no additional external components.
The ACLK enables the MSP430’s ultra-low-power standby mode (LPM3) and an embedded real-time
clock function. Optionally, the new embedded 12kHz internal very-low power oscillator (VLO) on the
MSP430F2xx on F5xx families can be used to source the ACLK. In LPM3, the MSP430 typically
consumes less than 1µA.
The integrated high-speed DCO sources the master clock (MCLK) used by the CPU and high-speed
peripherals. By design, the DCO is active and fully stable in less than 1µs with no intermediate steps.
This enables “instant on” high-performance processing – no long start-up for a second crystal or 2-speed
start-up required. Because the DCO is software configurable the clock can be tuned to the application
requirements
The MSP430 can also operate using only the internal DCO and VLO using no external components.
High-speed crystals can also be used for high performance applications.
VIDEO CLIP:
The embedded clip demonstrates LPM3 standby mode of the MSP430. In each case, the CPU wakes up
on a timed interrupt interval base on the ACLK source and the watchdog timer and blinks the LED in
software. The 1st portion is LPM3 via the external 32.768kHz crystal providing a current consumption in
the 0.5uA range. The 2nd portion is again LPM3, but instead of an external watch crystal, the internal
VLO is used. LPM3 current consumption is much lower at ~0.3uA.
Ultra-low Power Clock System video
Click link to view video:
(Windows Media)
LPM3: 32 kHz vs. VLO
After watching the video, advance to next slide.
© 2006 Texas Instruments Inc, Slide 7
Multiple oscillators are utilized to provide both an ultra-low power standby mode and “on-demand” highperformance processing.
The clock system is flexible and allows the MSP430 to operate optimally from a single 32kHz crystal
sourcing an always on low frequency Auxiliary Clock (ACLK) with no additional external components.
The ACLK enables the MSP430’s ultra-low-power standby mode (LPM3) and an embedded real-time
clock function. Optionally, the new embedded 12kHz internal very-low power oscillator (VLO) on the
MSP430F2xx on F5xx families can be used to source the ACLK. In LPM3, the MSP430 typically
consumes less than 1µA.
The integrated high-speed DCO sources the master clock (MCLK) used by the CPU and high-speed
peripherals. By design, the DCO is active and fully stable in less than 1µs with no intermediate steps.
This enables “instant on” high-performance processing – no long start-up for a second crystal or 2-speed
start-up required. Because the DCO is software configurable the clock can be tuned to the application
requirements
The MSP430 can also operate using only the internal DCO and VLO using no external components.
High-speed crystals can also be used for high performance applications.
VIDEO CLIP:
The embedded clip demonstrates LPM3 standby mode of the MSP430. In each case, the CPU wakes up
on a timed interrupt interval base on the ACLK source and the watchdog timer and blinks the LED in
software. The 1st portion is LPM3 via the external 32.768kHz crystal providing a current consumption in
the 0.5uA range. The 2nd portion is again LPM3, but instead of an external watch crystal, the internal
VLO is used. LPM3 current consumption is much lower at ~0.3uA.
Performance on-Demand
Interrupt
DCO
2-Speed
Startup
© 2006 Texas Instruments Inc, Slide 8
The screen capture shows the actual startup of an MSP430 digitally controlled oscillator (DCO).
In this example it can be seen that from an interrupt event, the DCO is active and stable in well under 1µs
– in this example the measured F2131 DCO startup time is actually 204ns.
With the MSP430 clock start up is “instant-on”. With the DCO, no delay or 2-speed clock startup occurs.
The users application has instant access to the high-speed DCO from any operating mode.
A common benefit of an instant-on and stable high-speed oscillator is response to serial communication,
a UART for example. The clock source for the UART must start and be stable instantly to prevent
received characters from being lost. If a slow or 2-speed oscillator is used, the first character in the
received data stream is lost.
Instant-on saves power as the system does not have to waste energy waiting for oscillator startup.
Events are serviced immediately.
Why Ultra-low Power Is Important
• Longer battery life
• Smaller products
• Simpler power supplies
• Less EMI simplifies PCB
• Permanent battery
• Reduced liability
© 2006 Texas Instruments Inc, Slide 9
So why is ultra-low power so important?
The most apparent benefit for low-power is realized in battery powered applications allowing the use of
smaller, lower cost batteries.
Power supplies are simpler and lower cost, and in many applications direct battery supply can be used.
Generated EMI is very low because the MSP430 is so low power and can operate effectively at lowfrequencies.
A benefit in battery powered applications is the idea of permanently installed batteries. By installing
sealed batteries at the factory in an application such as meters, sports equipment of portable medical
devices, the liability of replacement is eliminated.
With the ability to operate <1µA, products can operate from a single lithium battery for over 10-years.
10-year Embedded Real-Time Clock
= LPM3 + RTC_Function
0.80µA + 250µA * 100µs
1000000µs
0.80µA + 0.030µA = 0.83µA
1mA
100µA
10µA
//
// Partial
Partial RTC_Function
RTC_Function
incrementseconds();
incrementseconds();
incrementminutes();
incrementminutes();
incrementhours();
incrementhours();
//
//
1µA
Time
© 2006 Texas Instruments Inc, Slide 10
The MSP430’s <1uA ultra-low power stand-by mode – or LPM3 – capability allows and embedded realtime clock function to be added to any application.
In this example an MSP430F20x1 system normally in LPM3 at ~0.8uA. Operating in LPM3 the watchcrystal oscillator (ACLK), a timer, and all interrupts are active.
Once every second, the timer clocked by ACLK overflows and interrupts the CPU which automatically
starts the DCO. The CPU updates software based clock registers operating from the fast DCO – not the
slower ACLK. The update of the clock registers takes less than 100us.
Because the active duty cycle for the embedded real-time clock function is so low - 100/1000000 - the
incremental current consumption is only 30nA for the function.
No Paging Unified Memory Map
• Absolutely no paging
FFFF
Interrupt Vectors
• Supports code agility
• Flash in-system programming
ƒ
ƒ
ƒ
ƒ
Self programming
JTAG
Bootloader
Data storage
FLASH
Main Segments
(x) 512B
Info Segments
//
// Flash
Flash In
In System
System Programming
Programming
FCTL3
=
FWKEY;
//
FCTL3 = FWKEY;
// Unlock
Unlock
FCTL1
=
FWKEY
|
WRT;
//
Enable
FCTL1 = FWKEY | WRT;
// Enable
*(unsigned
*(unsigned int
int *)0xFC00
*)0xFC00 == 0x1234;
0x1234;
Boot Loader
RAM
0000
Peripherals
© 2006 Texas Instruments Inc, Slide 11
The MSP430 uses a single unified memory address map for code, data and peripherals.
There is absolutely no paging with direct access to program and data anywhere throughout the entire
address space, which includes Flash, ROM RAM and peripherals with no restrictions.
Support for agile unrestricted code including branching, subroutine calls, function calls, and interrupts.
All of the Flash and RAM memory can be addressed as either 8-bit bytes or 16-bit words.
Peripheral module addresses are collected below 0x200. The complete instruction set and all addressing
modes can be used to with peripherals.
Flash is segmented into 512Byte main memory segments. Additional smaller information memory
segments are also available. The only difference between main and information memory is size – code
and data can be located anywhere. The total number of main memory segments depends on the device for example, a 4KB device has eight main memory segments.
Flash memory operates from 1.8V – 3.6V. Programming/erase voltage is 2.7V (reduced to 2.2V on the
‘F2xx). Flash can be erased and reprogrammed 100k times with 100-year data retention. 60kB of Flash
can be programmed in as fast as 2 seconds.
There are three methods of programming Flash; Out or in-system using JTAG, a Bootstrap Loader (BSL),
or in-system using normal software. The bootstrap loader is a section of ROM code that resides on the
device itself and allows communication using a common 9600-baud UART protocol.
The sequence to self-program Flash memory is very easy with timing controlled by hardware, thus
making it well-suited for data storage during application runtime. In most cases this can help eliminating
the need for an external EEPROM. For security reasons, Flash cannot be programmed or erased unless a
password is used when the Flash control registers are accessed. During programming and erase, program
execution out of Flash memory is automatically halted. After the operation software, resumes with the
next instruction and any enabled interrupts that occurred during the programming or erase operation are
automatically serviced.
Modern 16-bit Orthogonal RISC CPU
• No accumulator bottleneck
• RISC architecture
ƒ
ƒ
ƒ
ƒ
27 core instructions
24 emulated instructions
7 addressing modes
Constant generator
• Single-cycle register
operations
• Memory-to-memory
atomic addressing
• Bit, byte and word
processing
© 2006 Texas Instruments Inc, Slide 12
Modern 16-bit RISC CPU is optimized for modern programming techniques.
The MSP430’s architecture provides the flexibility of 16 fully addressable, single-cycle 16-bit CPU
registers. The large CPU register file eliminates what is typically a single working file or accumulator
bottleneck. The CPU registers are fully accessible including the program counter, stack pointer, status
register and 12 working registers.
The modern Reduced Instruction Set (RISC) design of the CPU offers versatility through simplicity using
only 27 easy-to-understand instructions and 7 consistent addressing modes. All memory spaces – Flash,
RAM, peripherals and CPU registers - use the exact same instructions and addressing modes. All
instructions can also be used in a 16-bit word (.w) or 8-bit byte (.b) format. The MSP430 is an orthogonal
design because all instructions and addressing mode are used consistently though all areas of the device.
The CPU also integrates a constant generator to automatically generate the six most used immediate
values. The constant generator has the effect of reducing code size by generator this common constants
(or literals) using hardware, eliminating what would be immediate values embedded in code.
To support real-time programming and save code space, the CPU also supports atomic – uninterruptible –
memory-to-memory operations with the full instruction set. No intermediate register operation is
required.
Up to 16 MIPS of performance is available today on the newest 2xx family, with more planned.
The result is a 16-bit, ultra-low power CPU that has more effective processing throughput, is smaller in
size, and more code-efficient than other 8/16-bit microcontrollers. When using the MSP430, this results
in programmers writing less lines of code. Now it’s possible to develop ultra-low power, highperformance applications at a fraction of the code size previously possible.
Write Less Code
238 Bits / 48 Cycles
Port
;; Other
Other MCU
MCU
movlw
movlw HIGH
HIGH Tab
Tab
movwf
PCLATH
movwf PCLATH
movwf
movwf DispVal,W
DispVal,W
call
call Tab
Tab
movwf
movwf PORTB
PORTB
goto
goto Continue
Continue
Tab
Tab addwf
addwf PCL,F
PCL,F
retlw
retlw B’00111111’
B’00111111’
retlw
retlw B’00000110’
B’00000110’
retlw
retlw B’01011011’
B’01011011’
retlw
retlw B’01001111’
B’01001111’
retlw
retlw B’01100110’
B’01100110’
retlw
retlw B’01101101’
B’01101101’
retlw
retlw B’01111101’
B’01111101’
retlw
retlw B’00000111’
B’00000111’
retlw
retlw B’01111111’
B’01111111’
retlw
retlw B’01101111’
B’01101111’
Continue
Continue
MCU
G
F
E
D
C
B
A
A
F
B
G
E
C
D
;;
MSP430
MSP430
mov.b
mov.b Tab(DispVal),&P1OUT
Tab(DispVal),&P1OUT
Tab
0063Fh
Tab DW
DW
0063Fh
DW
04F5Bh
DW
04F5Bh
DW
06E66h
DW
06E66h
DW
0077Ch
DW
0077Ch
DW
0677Fh
DW
0677Fh
128 Bits / 6 Cycles
© 2006 Texas Instruments Inc, Slide 13
The example shows how powerful a modern instruction set is in a real-world application. A code efficient
architecture like the MSP430 not only reduces code size and execution time but also reduces the lines of
code required for a given function.
Using indirect addressing with the MSP430, in a single line of code, a display character can be written
directly to a port to illuminate a seven segment LED display for example.
In the example, the variable DispVal holds the value to be displayed. A look-up table decodes the
character map directly which is written directly to the port in a single instruction. Because the MSP430 is
a Von Neuman architecture, the data table can be located anywhere in the memory map.
Comparing the MSP430 to another common 8-bit MCU, the power of a modern instruction set is seen.
The MSP430 requires only 128 bits of total program and lookup table memory for the function in the
example. The other MCU requires 238 bits for the same function.
Do You Use A 10-bit ADC?
Memory
10-bit
ADC
;; Other
Other MCU
MCU
movf
movf
movwf
movwf
bsf
bsf
movf
movf
bcf
bcf
movwf
movwf
ADCRESH,W
ADCRESH,W
RAMH
RAMH
STATUS,0x20
STATUS,0x20
ADCRESL,W
ADCRESL,W
STATUS,0x20
STATUS,0x20
RAML
RAML
84 Bits / 24 Cycles
10-bits
;; MSP430
MSP430
mov.w
mov.w
&ADCRES,&RAM
&ADCRES,&RAM
48 Bits / 6 Cycles
© 2006 Texas Instruments Inc, Slide 14
The example shows the effectiveness of the MSP430’s 16-bit architecture in a common function servicing an integrated 10-bit ADC and saving the conversion code to RAM.
The MSP430 can move any 8 or 16-bit value from any memory location to any memory location in the
entire address space in one fully atomic (uninterruptible) instruction.
The 8-bit MCU requires numerous instructions, and is forced to break the 10-bit ADC output into two
bytes. The limitation of an accumulator based architecture is also shown with data always passing
through the accumulator. The need to always pass data through the accumulator and being forced to
change memory pages with the 8-bit MCU increases code size, reduces performance and increases power
consumption.
Compiler Friendly
• Instruction set and register orthogonality
• Direct stack addressing for passing parameters
• Application report SLAA205
© 2006 Texas Instruments Inc, Slide 15
Many applications today are developed in high-level C code. To achieve the highest C code efficiency,
first consider what a compiler wants. Compilers prefer instruction set orthogonality and many registers
that operate identically to be free to allocate resources without restrictions. Compilers also use the stack
for passing parameters and for storing temporary variables.
With these facts and guidelines, the MSP430 architecture was developed as follows:
Orthogonal instruction set – although the MSP430 architecture implements only 27 instructions, every
instruction is usable with every addressing mode throughout the entire memory map. This enables a very
compact instruction set to implement a very large feature set with a strongly simplified, lower cost and
lower power CPU.
High register count – In addition to the program counter and stack pointer, twelve identical generalpurpose 16-bit CPU registers are available.
Page free – The 16-bit architecture of the MSP430 allows the direct addressing of the entire 64kB
memory address space.
Stack processing – The stack pointer has the full addressing capabilities of a general purpose register
which allows any needed manipulation of data on the RAM-based stack.
Usability of jumps – eight single word conditional jumps with a large +512 reach are implemented.
Three addressing modes (symbolic, absolute and immediate) allow fully atomic memory-to-memory
operations with the complete instruction set. These addressing modes drive significant code savings and
superior performance.
Byte and word processing – Any instruction can be used with 16-bit word or 8-bit byte data type. This
feature is especially useful for table processing allowing the use of the most code efficient data type.
Constant generator – The constant generator automatically generates the six most used immediate
constants in hardware.
Always-on Zero-Power BOR
Battery
Insertion
VCC
MCU
VSS
Brown-out
Brown-out
MSP430 BOR is always-on and zero-power
© 2006 Texas Instruments Inc, Slide 16
The MSP430 introduced the industry’s first zero-power Brown-Out Reset (BOR) protection. The screen
shot shows a typical battery insertion and real example of brownout.
The BOR forces a MCU into reset both on power-up when VCC rises and when VCC falls below normal
operating range, but not fully to ground. Because MSP430 BOR is zero-power and fully active in all
operating modes, the most reliable operation is ensured under all conditions.
Competitor’s BOR protection is in the 10-50µA range and proposed to be deactivated in low-power
modes to save power – this is not practical as a BOR condition cannot be predicated and can easily occur
even in a low-power mode.
BOR must always be on for maximum reliably.
All F2xx devices, all F4xx devices, the F16x, F15x, F1xx2 and all future MSP430 devices have zeropower BOR.
Embedded Emulation
• Debug real-time in-system
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
No application resources used
Full speed execution
H/W breakpoints
Single stepping
Complex triggering
Trace capability
• Easy-to-use tools
JTAG
© 2006 Texas Instruments Inc, Slide 17
Embedded Emulation with the MSP430
Development is in-system and subject to the exact same characteristics of the final application
Non-obtrusive especially in portable and high-pin count situations
Common user software and physical interface
Today’s applications operating at lower voltages, with tighter packaging and higher-precision analog,
benefit greatly from the MSP430’s in-system emulation approach. The MSP430’s dedicated embedded
emulation logic resides on the actual device itself and is accessed via industry standard JTAG using no
additional system resources.
From the first day of development, firmware engineers can now unobtrusively develop and debug their
embedded code with full-speed execution, breakpoints, and single steps in an application.
Embedded emulation becomes even more important with high performance mixed-signal systems that
must maintain the integrity of microvolt analog signals. Signal integrity is virtually impossible with
cumbersome in-circuit emulators that are sensitive to cabling crosstalk. And unlike abstract background
debuggers, no time-sharing of system serial communication resources is required with embedded
emulation on the MSP430.
By combining the flexibility of in-system programmable Flash memory, unobtrusive embedded
emulation, and a common user interface, development time is reduced. And, should the situation arise,
last minute code updates as well as remote scheduled and unscheduled upgrades can also be made.
Access to the JTAG port can be permanently disabled using a non-erasable fuse.
VIDEO CLIP (This clip can be substituted with a live demo using the eZ430)
The embedded video clip demonstrates the MSP430 tool set, using the eZ430 as an example. Discussions
detailing the eZ430 should be held until the specific section of the material coming later. This is meant as
a preview. The simple “FET_1” (Flashing the LED) code example is downloaded and run on the
MSP430F2013 target board. Usage of the IAR debugger is also shown, including features such as
hardware breakpoints, memory access and direct control of peripherals.
Embedded Emulation - video
Click link to view video:
(Windows Media)
eZ430-F2013
After watching the video, advance to next slide.
© 2006 Texas Instruments Inc, Slide 18
Embedded Emulation with the MSP430
Development is in-system and subject to the exact same characteristics of the final application
Non-obtrusive especially in portable and high-pin count situations
Common user software and physical interface
Today’s applications operating at lower voltages, with tighter packaging and higher-precision analog,
benefit greatly from the MSP430’s in-system emulation approach. The MSP430’s dedicated embedded
emulation logic resides on the actual device itself and is accessed via industry standard JTAG using no
additional system resources.
From the first day of development, firmware engineers can now unobtrusively develop and debug their
embedded code with full-speed execution, breakpoints, and single steps in an application.
Embedded emulation becomes even more important with high performance mixed-signal systems that
must maintain the integrity of microvolt analog signals. Signal integrity is virtually impossible with
cumbersome in-circuit emulators that are sensitive to cabling crosstalk. And unlike abstract background
debuggers, no time-sharing of system serial communication resources is required with embedded
emulation on the MSP430.
By combining the flexibility of in-system programmable Flash memory, unobtrusive embedded
emulation, and a common user interface, development time is reduced. And, should the situation arise,
last minute code updates as well as remote scheduled and unscheduled upgrades can also be made.
Access to the JTAG port can be permanently disabled using a non-erasable fuse.
VIDEO CLIP (This clip can be substituted with a live demo using the eZ430)
The embedded video clip demonstrates the MSP430 tool set, using the eZ430 as an example. Discussions
detailing the eZ430 should be held until the specific section of the material coming later. This is meant as
a preview. The simple “FET_1” (Flashing the LED) code example is downloaded and run on the
MSP430F2013 target board. Usage of the IAR debugger is also shown, including features such as
hardware breakpoints, memory access and direct control of peripherals.
Ultra-Low Power MCU Checklist
9 Multiple operating modes
ƒ 0.1µA power down
ƒ 0.8µA standby
ƒ 250µA / MIPS
9 Instant-on stable high-speed clock
9 1.8 - 3.6V single-supply operation
9 Zero-power BOR
9 <50nA pin leakage
9 CPU that minimizes cycles per task
9 Low-power intelligent peripherals
9 Performance over required operating conditions
© 2006 Texas Instruments Inc, Slide 19
The MSP430 is designed specifically for battery-power measurement applications.
The clock system allows many low-power modes with no compromise in performance.
Because of a wide operating voltage range, the MSP430 can often be powered directly from a battery.
The MSP430 BOR implementation is truly ultra-low power, in the nA range and practical for all
applications. The MSP430 BOR function is so low power that this functions is always active, even in all
low-power modes. This ensures the most reliable performance possible. Competitor’s BOR protection is
in the µA range and not usable in ultra-low power battery powered applications, which leave the
application vulnerable to BOR conditions.
The port pins have very low leakage when connected to external signals. This is very important as many
MCU’s have several µA of input leakage on each port pin.
The overall MSP430 architecture including a 16-bit CPU with 16 registers and 16-bit data and address
buses minimize power-consuming fetches to memory. A fast vectored-interrupt structure reduces the
need for wasteful CPU software flag polling.
Many intelligent peripheral features are provided that allows tasks to be completed independent of the
CPU and far more efficiently. These include the autoscan feature in the ADC12 and the available DMA.
With the intelligent peripherals, the CPU does not need to be over clocked to deliver the required system
performance.
Always review manufactures worst case or maximum values. Many specifications are dramatically
effected over temperature.
Agenda MSP430 Day 2006
• MSP430 Overview
• MSP430x1xx / 4xx
• New MSP430F2xx
• New eZ430 Emulator
• Support / Future Products
© 2006 Texas Instruments Inc, Slide 20
In this section a brief description of the high-volume MSP430x1xx and MSP430x4xx products will be
presented.
MSP430 Roadmap
2007
128kB
USB
Zigbee
F5xx
80 Pin
F26xx
F22xx
F21x1
128kB FG46xx
F44x
x11x
20 Pin
E-meter
Thermostat
Glucose meter
Water meter
Fx43x
8
AS
SP
F12x
8
M
Hz
F13x-16x 64 Pin
LC
D
D
F20xx
14 Pin
ri
M
Hz ver
g
16
M
Hz
F23x/24x
Ca
ta
lo
Performance
25
M
H
z+
100+ Code Compatible Devices
Fx42x
x41x
© 2006 Texas Instruments Inc, Slide 21
The MSP430 is world’s most popular low-power MCU architecture with 100 compatible devices in
production today.
The MSP430x1xx family was introduced in 2000 to address requirements for catalog low-power MCU
applications. The F1xx family spans from the entry-level C1101 ROM device starting at $0.49, to highly
integrated F16xx devices with up to 60kB of Flash / 10K RAM, 12-bit ADC, 12-bit DAC and a DMA
controller. The F1xx family introduced the world’s ultra-low power Flash and is specified for operation at
up to 8-MIPS from 1.8V to 3.6V. All F1xx family members are in high-volume production. Existing F1xx
devices are encouraged for new designs, though no new F1xx devices are planned. Future catalog
MSP430’s will be developed in the F2xx family.
The MSP430F4xx offers application specific standard products (ASSP) solutions targeted to metering
and measurement equipments. The F4xx complements the F1xx family adding an LCD driver, zero power
BOR on all devices and an enhanced Frequency Locked Loop (FLL) clock system. The F4xx family has
the same operating characteristics as the F1xx including ultra-low power Flash operation at up to 8-MIPS
from 1.8V to 3.6V. The F4xx offers a high-resolution 16-bit sigma-delta A-D converter, operational
amplifiers, and other mixed-signal intelligent peripherals ideal for single-chip metering and measurement
applications. Additional F4xx derivatives are planned and the family is encouraged for new designs.
The MSP430F2xx family provides twice the processing performance at half the stand-by power
consumption compared to MSP430F1xx devices. The F2xx family offers enhancements that reduce
overall system cost and improve reliability making these new devices an ideal roadmap solution for
existing low power F1xx designs or as a launch point for new applications. The F2xx family began
introduction in 2005 and will continue for the next several years.
The MSP430x5xx is planned to be previewed late 2006 with introduction in 2007. The F5xx family will
be fully compatible with existing MSP430’s offering expanded memory, more speed and a variety of new
peripherals. Additional F5xx information will be available fall 2006!
F1xx Multi-Purpose Devices
Device
Pins
Flash/RAM
Timers
F11x1
20
4k/256
A3
Communication
BOR
Features
F11x2
20
8k/256
A3
F12x
28
8k/256
A3
USART
F12x2
28
8k/256
A3
USART
F13x
64
16k/512
A3,B3
USART
F14x
64
60k/2k
A3,B7
(2)USART
F15x
64
32k/1k
A3,B3
USART, I2C
9
ADC12, (2)DAC12, (3)DMA
F16x
64
60k/10k
A3,B7
(2)USART, I2C
9
ADC12, (2)DAC12, (3)DMA
Comp_A
9
ADC10
9
ADC10
Comp_A
ADC12
ADC12, MPY
All devices include watchdog timer (WDT) and basic clock system (BCS)
• World’s most popular low-power MCU family
• More than 75 million F1xx devices will ship this year
© 2006 Texas Instruments Inc, Slide 22
The MSP430x1xx family was introduced in 2000 to address requirements across a wide range of lowpower applications. The F1xx family introduced the MSP430’s ultra-low power Flash and is specified for
operation at up to 8-MIPS.
The specified operating range is 1.8V to 3.6V. The F1xx family spans a wide variety of devices from the
entry level MSP430C1101 ROM device starting at $0.49, to highly integrated F16xx devices with up to
60kB of Flash, 12-bit ADC, 12-bit DAC, DMA controller, and up to 10K RAM.
MSP430x1xx family members are the most popular MSP430 family, in high-volume production with no
plans for obsolescence. No new MSP430x1xx family members are planned, though existing devices are
encouraged for new designs if they meet the application requirements.
F16x System-on-Chip
• Most complete and flexible MSP430F1xx device
• Popular MSP430 64-pin footprint
© 2006 Texas Instruments Inc, Slide 23
The MSP430F16x/15x are 100% pin compatible and are functional extensions of the popular ‘F14x/13x
series. The 64-pin footprint these device share is the most popular throughout the entire MSP430
portfolio. A complete peripheral mix provides maximum flexibility.
The F16x introduces a Direct Memory Access controller (DMA) controller that allows programmable and
automatic data handling from any memory location to any memory location. The DMA frees the CPU
from basic data handling improving performance in many applications by up to 10X. When combined
with the integrated 12-bit ADC and two independent 12-bit DACs, a complete, very-high performance,
signal chain on-chip can be implemented.
The zero-power brown out reset (BOR) provides protection against supply voltage disruptions. A
programmable supply voltage supervisor is also added for very accurate supply voltage monitoring. If
the supply falls below a programmed level, the device can be configured to completely reset, preventing
errant operation.
The USART0 is enhanced to support full master/slave I2C operation in addition to the UART and SPI
modes.
Intelligent Peripherals Performance+
Memory
DMA
Data
>>
//
// Interrupt
Interrupt
#pragma
#pragma vector=TA_VECTOR
vector=TA_VECTOR
__interrupt
__interrupt void
void
Timer_A(void){
Timer_A(void){
P3OUT
P3OUT |=
|= 0x1;
0x1;
P3OUT
&=
P3OUT &= ~0x1;
~0x1;
TXBUF0
TXBUF0 == tab[ptr]
tab[ptr] >>
>> 8;
8;
TXBUF0
TXBUF0 == tab[ptr++];
tab[ptr++];
pointer
pointer &=
&= 0x1F;
0x1F; }}
16MIPS
10kHz
DAC
//
// DMA
DMA
_BIS_SR(CPUOFF);
_BIS_SR(CPUOFF);
Fully Automatic
© 2006 Texas Instruments Inc, Slide 24
The benefits of using DMA for repetitive data handling are very significant in real world applications
The example shows an instrument that must generate a 32-step 10kHz sine wave into a sensor. This
means that 320k DAC transfers are required. Without DMA, the typical interrupt driven software solution
quickly becomes overloaded just managing the serial transfers to the DAC.
The DAC Load ISR requires 53 CPU cycles to fetch the required data from a look-up table, increment an
pointed, increment a pointer, check pointed for out of range and load the fetched data – which is
equivalent to > 16MIPS.
With DMA the total system clock requirements are 0.64MIPS – DMA reduces system overhead in this
example by over 25X.
With DMA and signal-chain-on-chip the performance of a system is dramatically increased and the MCU
resources are available for more advanced signal processing. This means that MSP430 applications can
operate at lower clock speeds - reducing power consumption and EMI – and deliver higher performance.
F4xx Application Specific Devices
Device
Pins
Flash/RAM
Timers
F41x
64
32KB / 1KB
BT,A3
FW42x
64
32KB / 1KB
F42x0
48
32KB / 512B
F42x
64
32KB / 1KB
BT,A3
FE42x
64
32KB / 1KB
F43x
80
FG43x
80
FE44x2*
100
F44x
FG46xx
Communication
LCD
Features
96
Comp_A
BT,A3,A5
96
Scan I/F, Flow Meter
BT,A3
56A
SD16, DAC12
USART
128
SD16
BT,A3
USART
128
ESP430, E-meter
32KB / 1KB
BT,A3,B3
USART
128
ADC12
60KB / 2KB
BT,A3,B3
USART
128
ADC12, DAC12, DMA, (3)OA
60KB / 2.5KB
BT,A3,B7
(2) USCI
160A
100
60KB / 2KB
BT,A3,B7
USART
100
120KB / 8KB
BT,A3,B7
USART, USCI
160
160A
(4)SD16, MPY32
ADC12, MPY
ADC12, (2)DAC12, (3)DMA, (3)OA
All devices include a watchdog timer (WDT/WDT+) and enhanced frequency locked loop (FLL+) clock system
* Planned future device, in development
• Ideal for metering and portable instrumentation
© 2006 Texas Instruments Inc, Slide 25
The F4xx family offers specific devices targeted at low power metering and measurement applications
including heat meters, water meters (MSP430FWxxx), e-meters (MSP430FExxx) and glucose meters
(MSP430FGxxx).
The MSP430F4xx complements the F1xx family adding an LCD driver, zero power BOR on all devices
and an enhanced Frequency Locked Loop (FLL) clock system. The F4xx offers Flash memory, 8-MIPS
and low voltage operation just as with the F1xx family. The F4xx also offers a high-resolution 16-bit
sigma-delta A-D converter, operational amplifiers, and other embedded analog functions ideal for single
chip solutions. Additional F4xx derivatives are planned with new peripherals and the family is
encouraged for new designs.
New MSP430FG461x
• Complete System on-Chip
• 120KB Flash, 8KB RAM
• <2µA RTC - 10-year battery life
• LCD_A 160 segments with boost
• UART, SPI, I2C, IrDA
• OPAÆADCÆDMAÆDACÆOPA
• New MSP430X CPU
© 2006 Texas Instruments Inc, Slide 26
The MSP430FG461x is planned for production release mid-2006 targeting high-end portable medical
applications. The integration of the FG461x allows high-performance complete system on-chip solutions.
The FG461x is the first ‘430 family to incorporate the new MSP430X extended architecture that supports
direct linear access to up to 1MB of memory, 16 times more memory compared to the 64kB available
today with the MSP430. The MSP430X is 100% compatible with the existing MSP430 allowing existing
code libraries to be reused. Extended addressing modes are incorporated that allow the existing MSP430
instruction set to operate page-free throughout the entire 1MB memory model with improved code
density faster using fewer clock cycles. Extended instructions designed for the large memory allow
optimal high-level code density with full backward compatibility, making it possible to develop very
sophisticated real-time applications completely in modular C libraries.
The FG461x utilizes the F4xx FLL Clock System, Basic Timer, Timer_A and Timer_B. An enhanced
LCD_A driver is included that incorporates a boost converter and contrast control independent of VCC.
The improved watchdog timer (WDT+) offers protection against run away software, invalid address CPU
fetches as well as a protected clock source. These features reduce overall system cost and improve
reliability. A new real-time clock module supports seconds, minutes, hours, days and months. An
ADC12-DMA-DAC12 and 3X OPAMPS support a complete high-performance signal chain on-chip.
The FG461x integrates up to 120kB of embedded Flash and 8kB of RAM.
A dual-channel Universal Serial Communication Interface (USCI) is also included. The USCI supports
asynchronous and synchronous communications modes. The USCI has two independent blocks, USCI_A
and USCI_B.
USCI_A supports UART/IrDA or SPI.
USCI_B supports I2C or SPI.
USCI_A and USCI_B can be used at the same time.
New MSP430X
• Architecture upgrade
F:FFFF
• 1MB unified memory map
• Extended addressing modes
ƒ Page-free 20-bit reach
ƒ Improved code density
ƒ Faster execution
FFFF
64kB
Code and Data Tables
• 100% code compatible
Interrupt vectors
RAM
Peripherals
© 2006 Texas Instruments Inc, Slide 27
The new MSP430X architecture is 100% compatible with the MSP430 architecture and allows 16x more
memory addressing page free using less code and fewer cycles.
The MSP430X is 100% compatible with the existing MSP430 allowing existing code libraries to be
reused.
Extended addressing modes are incorporated that allow the existing MSP430 instruction set to operate
page-free throughout the entire 1MB memory model with improved code density faster using fewer
clock cycles. Extended instructions designed for the large memory allow optimal high-level code
density with full backward compatibility, making it possible to develop very sophisticated real-time
applications completely in modular C libraries.
The MSP430X executes MSP430 code unaltered in the compatible 64kB memory range. To further
preserve compatibly, all MSP430X interrupt vectors, RAM and peripherals registers map exactly to the
MSP430. The extended memory contains expanded code and data.
Existing MSP430 byte/word (.b/.w) addressing modes are expanded allowing direct access to 20-bit
addresses (.a) fields which support 1MB (20-bit) program flow and pointer capability. This 20-bit
address-word capability is accomplished for program flow, stack manipulation and pointer handling with
same code density as the 16-bit MSP430 by using un-used bits in OP codes field. Additionally an
extension word allows full 20-bit addressing for source and destination with any MSP430 instruction and
addressing mode and added repetition capability.
Cycle counts have been reduced for several addressing modes and interrupt overhead allowing faster
code execution.
Additional details regarding the MSP430X architecture can be found in the MSP430F4xx and
MSP430F2xx users guides.
MSP430X - Use Less Code
;; MSP430
MSP430 Full
Full Context
Context Save
Save
push.w
R15
;; 11 word
push.w R15
word
push.w
;; 11 word
push.w R14
R14
word
push.w
R13
;; 11 word
push.w R13
word
push.w
;; 11 word
push.w R12
R12
word
push.w
;; 11 word
push.w R11
R11
word
push.w
;; 11 word
push.w R9
R9
word
push.w
;; 11 word
push.w R8
R8
word
push.w
;; 11 word
push.w R7
R7
word
push.w
;; 11 word
push.w R6
R6
word
push.w
;; 11 word
push.w R5
R5
word
push.w
;; 11 word
push.w R4
R4
word
push.w
R3
;; 11 word
push.w R3
word
push.w
;; 11 word
push.w R2
R2
word
push.w
;; 11 word
push.w R1
R1
word
push.w
;; 11 word
push.w R0
R0
word
;MSP430X
;MSP430X Full
Full Context
Context Save
Save
pushm.w
#16,
R15
pushm.w #16, R15 ;; 11 word
word
1 Word / 18 Cycles
16 Words / 48 Cycles
© 2006 Texas Instruments Inc, Slide 28
The MSP430X adds a repeat-multiple function for push, pop, rotate and all format I (single operand)
instructions.
This capability dramatically improves a full context register save and restore as shown and is often used
in C-function and subroutine calls.
Agenda MSP430 Day 2006
• MSP430 Overview
• MSP430x1xx / 4xx
• New MSP430F2xx
• New eZ430 Emulator
• Support / Future Products
© 2006 Texas Instruments Inc, Slide 29
In this section a brief description of the new high-performance MSP430x2xx running at 16 MIPS with
even lower power consumption.
New F2xx Multi-Purpose Devices
Device
Pins
Flash/RAM
Timers
F20x1
14
2KB / 128B
A2
Communication
Features
F20x2
14
2KB / 128B
A2
USI
ADC10
F20x3
14
F21x1
20
2KB / 128B
A2
USI
SD16
8KB / 256B
A3
F22x4
38/40
32KB / 1KB
A3,B3
USCI
ADC10, (2)OPA
F22x2*
ADC10
Comp_A
Comp_A
38/40
32KB / 1KB
A3,B3
USCI
CC430F2xx*
48
32KB / 1KB
A3,B3
USCI + CC1100
ADC10, (2)OPA
F23x0*
40
32KB / 2KB
A3,B3
USCI
Comp_A, MPY
F24xx*
64/80
120KB / 8KB
A3,B7
(2)USCI
ADC12, MPY
F26xx*
64/80
120KB / 8KB
A3,B7
(2)USCI
ADC12, MPY, (2)DAC12, (3)DMA
All devices include enhanced watchdog timer (WDT+) and enhanced basic clock system (BCS+)
* Planned Future device, in development
• Perfect upgrade for existing F1xx applications
• Choice for new projects
© 2006 Texas Instruments Inc, Slide 30
The MSP430F2xx family provides twice the processing performance at half the stand-by power
consumption compared to earlier MSP430F1xx devices. In addition, the MSP430F2xx family
incorporates enhancements that reduce overall system cost and improve reliability making these new
devices an ideal upgrade solution for existing MSP430 designs or as a launch point for a variety of new
applications.
Many new F2xx family devices are planned for introducing throughout 2006 and 2007;
The F2xx family will include members that are pin and functionally compatible with F1xx devices
offering even lower power, more speed, BOR, WDT+ on every device along with a variety of new
peripherals. Unique F2xx derivatives with new peripherals are also planned. New peripherals such as a
USCI (USART/SPI/I2C/IrDA), larger memory sizes (120kB Flash) and low pin count device variants
will be introduced.
F2xx Enhancements
• <1µA standby LPM3
• <1µs 0-16MHz
• Zero-power BOR
• Failsafe oscillator
• Enhanced watchdog
• Pull-up / down resistors
• Hack proof boot loader
• 2.2V Flash ISP
• Extended temp 105°C
• Same instruction set architecture
© 2006 Texas Instruments Inc, Slide 31
The MSP430F2xx family provides twice the processing performance (16MHz versus 8MHz) in terms of
maximum CPU clock speed at half the stand-by power consumption compared to MSP430F1xx devices.
In addition, the F2xx family incorporates a variety of enhancements including zero power brown-out
reset protection on all devices, lower power and lower voltage flash programming, an improved failsafe
low frequency (LF) and high-frequency (XT) crystal oscillator system. An improved watchdog timer
(WDT+) offers protection against run away software, invalid address fetches as well as a protected clock
source. The features reduce overall system cost and improve reliability. The digitally controlled oscillator
(DCO) is improved with greater stability over temperature and voltage allowing, in most applications, the
elimination on an external crystal. All port pins now have programmable pull-up/pull-down resistors
eliminating external components. The bootstrap loader is improved including an option that an invalid
password will erase the device, which prevents hacking.
The graph shows the expanded operating range of all MSP430F2xx devices as compared to MSP430F1xx
devices. The F2xx maximum operating frequency has been doubled to 16Mhz from the 8Mhz maximum
of the F1xx. The F2xx 16MHz maximum system frequency is also specified as low as 3.3V allowing
margin from the maximum Vcc of 3.6V. On the F1xx, the maximum system clock is specified at exactly
3.6V with no margins. The minimum voltage allowed for Flash programming/erasing on all F2xx devices
is reduced to 2.2V allowing batteries to be drained longer.
F2xx derivatives are offered with extended 105°C temperature capability. Automotive temperature and
qualification will not be offered.
The F2xx family of devices offers many improvements, but shares the same CPU and instruction set as
all MSP430’s – this means existing code can be completely reused.
F2xx Enhanced Clock System
• New VLO
ƒ Very Low-power Oscillator
ƒ Embedded 12kHz
ƒ 500nA standby
• Crystal oscillator
ƒ Programmable capacitors
ƒ Failsafe OSC_Fault
ƒ Minimum pulse filter
• Improved DCO
ƒ <1µs 0-to-16MHz
ƒ + 2.5% tolerance
ƒ Factory calibration in Flash
© 2006 Texas Instruments Inc, Slide 32
To support the lowest power consumption and performance on-demand, the enhanced basic clock system
(BCS+) on the MSP430F2xx (like all other MSP430 clock systems) typically provides two clocks. A low
frequency auxiliary clock (ACLK) is typically sourced directly from a common 32 kHz watch crystal and
is used for always-on low power peripherals. A high-speed clock is generated on-chip from an instant-on
digitally controlled oscillator (DCO) used by the CPU and other peripherals. To save power, an
application’s interrupt events steer the usage of the DCO only when required. The majority of the
application’s life is spent in standby mode with high-performance available on-demand and only when
required.
Reduced standby power consumption also known as real-time clock (RTC) or LPM3 mode current has
been reduced to less than 1 micro amp. This power consumption can be achieved using an external
32kHz crystal or the VLO.
The F20xx introduces a new very-low power oscillator (VLO) as an alternative to the typical 32kHz
ACLK. The VLO provide a 12kHz on-chip oscillator with no external components that is perfect for
ultra-low power applications that need a wake-up function, but the precision of a 32kHz crystal.
The F2xx crystal oscillator is improved providing programmable integrated crystal load capacitors allows
the use of a wider range of crystals and elimination of external components used typically to stabilize
oscillation. Failsafe crystal oscillator can trigger a non-maskable interrupt and start the on-chip oscillator
for failsafe operation. This feature is always available with no additional power consumption in both
high-frequency and low frequency modes. Crystal min-pulse input de-glitch filters reduce the possibility
of externally introduced high frequency system noise and improves reliability.
Improved on-chip digitally controlled oscillator (DCO) offers a sub 1 micro second start with +2.5%
accuracies and 16MHz operation over temperature and voltage.
VIDEO CLIP
The embedded video demonstrates the enhanced features of the WDT+ to auto-detect ACLK failure and
switch to the DCO, maintaining operation of the application. A fault is generated by shorting the crystal
terminals at which point the WDT+ switches over from the external 32kHz crystal as a clock source, to
the internal DCO. The current measurement is displayed to indicate that no additional power is needed to
k
f hi
i f
F2xx Enhanced Clock System -video
Click link to view video:
(Windows Media)
OSC_Fault Demonstration
After watching the video, advance to next slide.
© 2006 Texas Instruments Inc, Slide 33
To support the lowest power consumption and performance on-demand, the enhanced basic clock system
(BCS+) on the MSP430F2xx (like all other MSP430 clock systems) typically provides two clocks. A low
frequency auxiliary clock (ACLK) is typically sourced directly from a common 32 kHz watch crystal and
is used for always-on low power peripherals. A high-speed clock is generated on-chip from an instant-on
digitally controlled oscillator (DCO) used by the CPU and other peripherals. To save power, an
application’s interrupt events steer the usage of the DCO only when required. The majority of the
application’s life is spent in standby mode with high-performance available on-demand and only when
required.
Reduced standby power consumption also known as real-time clock (RTC) or LPM3 mode current has
been reduced to less than 1 micro amp. This power consumption can be achieved using an external
32kHz crystal or the VLO.
The F20xx introduces a new very-low power oscillator (VLO) as an alternative to the typical 32kHz
ACLK. The VLO provide a 12kHz on-chip oscillator with no external components that is perfect for
ultra-low power applications that need a wake-up function, but the precision of a 32kHz crystal.
The F2xx crystal oscillator is improved providing programmable integrated crystal load capacitors allows
the use of a wider range of crystals and elimination of external components used typically to stabilize
oscillation. Failsafe crystal oscillator can trigger a non-maskable interrupt and start the on-chip oscillator
for failsafe operation. This feature is always available with no additional power consumption in both
high-frequency and low frequency modes. Crystal min-pulse input de-glitch filters reduce the possibility
of externally introduced high frequency system noise and improves reliability.
Improved on-chip digitally controlled oscillator (DCO) offers a sub 1 micro second start with +2.5%
accuracies and 16MHz operation over temperature and voltage.
VIDEO CLIP
The embedded video demonstrates the enhanced features of the WDT+ to auto-detect ACLK failure and
switch to the DCO, maintaining operation of the application. A fault is generated by shorting the crystal
terminals at which point the WDT+ switches over from the external 32kHz crystal as a clock source, to
the internal DCO. The current measurement is displayed to indicate that no additional power is needed to
k
f hi
i f
F2xx Every Little Bit Counts
• Programmable XTAL capacitors
16X
1206
• DCO and VLO oscillators
1206
1206
• Pull-up/down resistors
• Save space, reduce cost
12pf
MSP430F20xx
4mm
12pf
4mm
© 2006 Texas Instruments Inc, Slide 34
Modern consumer and portable applications do not leave much room for electronics such as the electric
toothbrush shown. The MSP430F2xx incorporates many features that eliminate the need for space
consuming external components.
The MSP430F2xx port 1 and port 2 have user selectable internal pull up/down resistors. Using the
internal pull up/down resistors can eliminate the need for external components saving space and reducing
cost. This space savings is particularly important in portable applications. Consider the 4mm x 4mm
footprint of the QFN package available with 14 and 20 pin F2xx devices is equivalent in size to just two
1206 style resistors. In many applications, the space consumed by external components can quickly
surpass that of the MCU itself.
An internal high-speed digitally controlled oscillator (DCO) programmable from 100kHz to 16Mhz
eliminates the need for an external crystal in most applications. If an external XTAL is required, to save
additional space and cost, user programmable XTAL capacitors are integrated.
The MSP430F20xx introduces a very low-power oscillator (VLO) that allows a self-wake up standby
mode of less than 1µA without an external components.
New F20xx Low Pin-count
• 16 MIPS, <<1µA LPM3
MSP430F20x3
• 500nA Standby
• USI
• 10 GPIO
• Timer_A2 / WDT+
• 14-pin (QFN, TSSOP, DIP)
for cost sensitive applications
Device
Flash
RAM
Analog
USI
1ku
F20x1
1/2KB
128B
Comparator
F20x2
1/2KB
128B
10-bit ADC
9
$0.99
F20x3
1/2KB
128B
16-bit ADC
9
$1.65
$0.55
© 2006 Texas Instruments Inc, Slide 35
The low pin-count MSP430F20xx are based on the F2xx architecture that operates with an active current
of 200 µA / MIPS and a standby mode with self wake-up well under 1µA.
A flexible clock system allows operation up to 16 MHz with no external components using an improved
digitally controlled oscillator (DCO) that is fully programmable and stable over temperature and voltage.
The ability to switch from standby to a fully synchronized 16 MIPS active mode in less than one microsecond allows interrupt event-driven programming that extends time in power-saving modes and the use
of smaller, lower cost batteries.
The F20xx extremely small footprint combined with sub 1µA standby current provides benefits is space
constrained applications such as fire and motion detectors where now products can get developed with
permanent sealed batteries and that can exceed 10 years of operation. The liability of battery replacement
can be eliminated with the product considered disposable.
The pin-compatible F20xx series operates from 1.8V – 3.6V and is 100% code compatible with all other
MSP430s, allowing developers to leverage a single MCU platform from the most basic to the most
sophisticated applications.
The F20x1 includes an analog comparator, the F20x2 a 200ksps 10-bit A/D converter and the F20x3 a
precision 16-bit sigma-delta A/D. All devices offer in-system programmable Flash for greater design
flexibility, field upgrades and elimination of external EEPROMs.
To further reduce system cost, all 10 GPIO pins include programmable pull-up/pull-down resistors
eliminating external components. A zero-power brown-out reset (BOR) function and an enhanced
watchdog timer enhance reliability. All the failsafe features of F2xx are available during all modes of
operation with no power penalty. The MSP430F20x2 and MSP430F20x3 include a universal serial
interface (USI) that can be configured for either I2C or SPI master or slave communication.
USI Fast Synchronous Data Transfer
• SPI Mode
ƒ 8/16-bit shift register
ƒ MSB/LSB first
• I2C Mode Support
ƒ START/STOP detection
ƒ Arbitration lost detection
• Interrupt Driven
• Reduces CPU load
© 2006 Texas Instruments Inc, Slide 36
The MSP430F20xx includes a USI module that provides the functionality to support synchronous serial
communication. The USI is a very high-performance serial interface especially in a low pin-count device.
The USI is an 8- or 16-bit shift register that can be used to output data streams, or when combined with
minimal software, can implement serial communication. In addition, the USI includes built-in hardware
functionality to ease the implementation of SPI and I2C communication. The USI module also includes
interrupts to further reduce the necessary software overhead for serial communication and to maintain the
ultra low-power capabilities of the MSP430.
The USI module features include:
- Slave operation in LPM4 - no internal clock required
- Programmable clock generation
- Selectable clock polarity and phase control
- Three-wire SPI mode support, variable data length, and selectable MSB or LSB data order.
- I2C mode support, START and STOP detection for I2C mode with automatic SCL control, arbitration
lost detection in master mode.
USI… No More Bit Banging!
//Shift16_inout_Software
//Shift16_inout_Software
SR
SR == DATA;
DATA;
for
for (CNT=0x10;CNT>0;CNT--)
(CNT=0x10;CNT>0;CNT--)
{{
P2OUT
P2OUT &=
&= ~SDO;
~SDO;
if
(SR
if (SR && 0x8000)
0x8000)
P2OUT
P2OUT |=
|= SDO;
SDO;
SR
SR == SR
SR <<
<< 1;
1;
if
if (P2IN
(P2IN && SDIN)
SDIN)
SR
SR |=
|= 0x01;
0x01;
P2OUT
P2OUT |=
|= SCLK;
SCLK;
P2OUT
P2OUT &=
&= ~SCLK;
~SCLK;
}}
425 Cycles
//
// Shift16_inout_USI
Shift16_inout_USI
USISR
USISR == DATA;
DATA;
USICNT
USICNT == 0x10;
0x10;
10 Cycles
© 2006 Texas Instruments Inc, Slide 37
The example shows the advantage of using the USI module compared to software in a synchronous serial
communication application that exchanges 16-bits of data between an MSP430F20xx master and a
peripheral device. The USI is a very high-performance serial interface in a low pin-count device.
The USI hardware provides a significant advantage in terms of reducing CPU load. Because the USI
clocks data into and out of the MSP430 in hardware, the CPU does not have to do this in software.
Eliminating the burden of shifting data with software, frees the CPU for other tasks and reduces power
consumption.
The loop to shift data in and out in software show requires 26 cycles per bit which when multiplied by
16-bits, results in a total of 425 CPU cycles for an entire transfer when done in software.
Using the USI only 10 CPU clocks are required to load the data – the synchronous shift is done in
hardware.
F20x2 Fast Flexible ADC10
• 10-bit ADC
1.5V or 2.5V
• 200ksps+
• Autoscan
• Single
Sequence
Repeat-single
Repeat-sequence
Auto
AVCC
AVSS
S/H
VRVR+
10-bit SAR
ADC10SC
TA1
TA0
TA2
• Int/ext ref
• TA SOC triggers
• Direct Transfer Controller
(DTC)
Batt Temp
Direct
Transfer
Controller
RAM, Flash,
Peripherals
© 2006 Texas Instruments Inc, Slide 38
The ADC10 is a fast, flexible 10-bit ADC.
Up to sixteen inputs are available to measure external signals. The complete sample/conversion time is
under 5µs supporting greater than 200ksps. The sample time is programmable to allow engineers to
account for the impedance of external sensors.
An independent temperature sensor and low-battery detect channel are also integrated. The 1.5V/2.5V
internal voltage reference, VCC or an external reference can be used. The output from the ADC can be in
binary or signed format.
The ADC10 offers several features to reduce CPU loading, improve performance, and lower current
consumption. A sample start can be triggered with software, or, by using an output from a timer for a
precise start independent of CPU activity (SOC = Start Of Conversion). User software does not have to
be burdened to start a conversion. It can be done more precisely, using less code, with timer hardware.
Auto-scan allows channels to be sequenced automatically (for example A3-A2-A1-A0 A3-A2-A1-A0)
without CPU intervention. Again, this relieves the software from performing this basic, but important task
in many multi-channel applications.
The Data Transfer Controller (DTC) is used to automatically transfer ADC10 conversion results directly
to memory without CPU intervention. This feature allows fast conversion throughput (200ksps+) to run
continuously without the software intervention. The DTC transfers the output of the ADC10 directly to
any memory location, which can be configured as a buffer, up to 256 bytes. The DTC can transfer
continuously into the buffer, automatically incrementing, and interrupt the CPU when the buffer is full, or
½ full. For each DTC memory transfer, one bus cycle is required, in which the CPU is automatically
halted to avoid and bus contention. The CPU and software can focus on higher-level data processing and
not on basic data movement. More advanced products can be designed using the ADC10 that use less
power and less code space.
AUTO
Autoscan + DTC Performance Boost
ADC
DTC
//
// Software
Software
Res[pRes++]
Res[pRes++] == ADC10MEM;
ADC10MEM;
ADC10CTL0
ADC10CTL0 &=
&= ~ENC;
~ENC;
if
if (pRes
(pRes << NR_CONV)
NR_CONV)
{{
CurrINCH++;
CurrINCH++;
if
if (CurrINCH
(CurrINCH ==
== 3)
3)
CurrINCH
=
0;
CurrINCH = 0;
ADC10CTL1
ADC10CTL1 &=
&= ~INCH_3;
~INCH_3;
ADC10CTL1
ADC10CTL1 |=
|= CurrINCH;
CurrINCH;
ADC10CTL0
ADC10CTL0 |=
|= ENC+ADC10SC;
ENC+ADC10SC;
}}
70 Cycles / Sample
Data2
Data1
Data0
Data2
//
// Autoscan
Autoscan ++ DTC
DTC
_BIS_SR(CPUOFF);
_BIS_SR(CPUOFF);
Fully Automatic
© 2006 Texas Instruments Inc, Slide 39
The Data Transfer Controller (DTC) relieves the CPU for the basic task of data handling.
For example, a system sampling three channels, without DTC, the processor is burdened with 70 cycles
for each sample. If, for example, 20KSPS were required – or 60KSPS total – a system without DTC
would be burdened 4.2MIPS. The same processor with autoscan and DTC requires only 0.06MIPS
system load.
This means that in a system with autoscan and DTC, the CPU is free for other tasks and the system can
operate in a lower frequency power-saving mode with DTC.
Much higher sampling speed can be attained without increasing the clock speed.
F20x3 High-Precision SD16_A
• 16-bit Σ∆ ADC
VREF
1.2V
• Differential inputs
• 4.096ksps
• 85dB SINAD
• 32x PGA
• 18ppm 1.2V ref
8x
PGA
16-bit
SD16MEM0
Temp
• Temp sensor
• Battery input
Batt
© 2006 Texas Instruments Inc, Slide 40
The new MSP430F20x3 offers an integrated SD16 sigma-delta analog-to-digital converter. The SD16 is a
very high precision integrated ADC especially impressive in a low pin-count device.
The SD16 has up to 8 fully differential multiplexed inputs and includes a built-in temperature sensor. The
converter is based on a second-order oversampling sigma-delta modulator and digital decimation filter.
With user a selectable low-power conversion mode. The decimation filter is a comb type filter with
selectable oversampling ratios of up to 1024.
Other features of the SD16 include:
- Software selectable internal or external reference including a precision on-chip reference voltage
generation (1.2V)
- Programmable gain amplifier
- Built-in temperature sensor and battery monitor
Ordinary Motion Detector
• 20µA – 2mA
• Complicated
• Fixed function
© 2006 Texas Instruments Inc, Slide 41
An ordinary motion detector uses an external circuit consisting of a two-stage analog gain stage followed
by a comparator to interface to a passive infrared sensor (PIR). In the presence of motion, the comparator
will output high, which triggers an input on a microcontroller.
The interface circuit is fixed function and consumes typically 20µA to 2mA of current. The solution is
relatively high-power offering little flexibility
F20x3 Improved Motion Detector
• <10µA total system power • No crystal needed – VLO
ƒ ~6µA PIR
ƒ ~3µA measurement
ƒ ~0.5µA LPM3 using VLO
• Enhanced watchdog
• Fully programmable SoC
• Very low cost
© 2006 Texas Instruments Inc, Slide 42
An MSP430F20x3-based motion detector circuit based on a passive infrared (PIR) sensor is shown.
Because of the F20x3 high-precision 16-bit sigma-delta ADC, the circuit is very straight forward and
low-cost.
The F20x3 solution is configured in LPM3, clocking only a timer with the VLO oscillator – no crystal is
required. In this mode, the F20x3 consumes approximately 0.5µA. Approximately 3 times per second,
the MSP430 is interrupted and samples the sensor output with the SD16_A. The each sample takes ~1ms
and consumes approximately 900µA during the sampling. This means approximately 2.7µA on average is
required for the measurement function.
The PIR requires approximately 6µA, the MSP430F20x3 in LPM3 0.5µA, and the measurement function
~3µA resulting in an average total system power consumption of less than 10µA.
The F20x3 USI module allows high-speed serial communication with another system with little CPU load
saving code space and power consumption. The very low-power oscillator (VLO) can be used for an
ultra-low power stand-by mode requiring no crystal.
Because the F20x3 solution is fully programmable, many additional differentiated features can be added.
The interface to the PIR sensor is direct to the embedded 16-bit sigma-delta ADC eliminating external
components saving cost and power consumption.
VIDEO CLIP
This embedded video clip demonstrates operation of the MSP430F2013 motion detector and measures
current consumption during operation. When motion is detected (hand passing over the Passive Infrared,
or PIR, sensor) the LED flashes.
F20x3 Improved Motion Detector video
Click link to view video:
(Windows Media)
F2013 Motion Detector
After watching the video, advance to next slide.
© 2006 Texas Instruments Inc, Slide 43
An MSP430F20x3-based motion detector circuit based on a passive infrared (PIR) sensor is shown.
Because of the F20x3 high-precision 16-bit sigma-delta ADC, the circuit is very straight forward and
low-cost.
The F20x3 solution is configured in LPM3, clocking only a timer with the VLO oscillator – no crystal is
required. In this mode, the F20x3 consumes approximately 0.5µA. Approximately 3 times per second,
the MSP430 is interrupted and samples the sensor output with the SD16_A. The each sample takes ~1ms
and consumes approximately 900µA during the sampling. This means approximately 2.7µA on average is
required for the measurement function.
The PIR requires approximately 6µA, the MSP430F20x3 in LPM3 0.5µA, and the measurement function
~3µA resulting in an average total system power consumption of less than 10µA.
The F20x3 USI module allows high-speed serial communication with another system with little CPU load
saving code space and power consumption. The very low-power oscillator (VLO) can be used for an
ultra-low power stand-by mode requiring no crystal.
Because the F20x3 solution is fully programmable, many additional differentiated features can be added.
The interface to the PIR sensor is direct to the embedded 16-bit sigma-delta ADC eliminating external
components saving cost and power consumption.
VIDEO CLIP
This embedded video clip demonstrates operation of the MSP430F2013 motion detector and measures
current consumption during operation. When motion is detected (hand passing over the Passive Infrared,
or PIR, sensor) the LED flashes.
New F22x4 For Sensor Applications
• 32KB Flash / 1KB RAM
• 10-bit 200ksps ADC
• 2 Op Amps
• USCI
• Timer_A3 / B3, WDT+
M SP430F22x4
• 16 MIPS, <1µA LPM3
• 32 GPIO
• 38-pin F1xx2 upgrade
ideal for sensor apps
© 2006 Texas Instruments Inc, Slide 44
The new MSP430F22x4 is sampling now with production planned Q3-2006.
This mid-range of the F2xx family offers a 38-pin solution ideal for intelligent sensor applications.
The 38-pin F22x4 family is an upgrade path for customers using the 28-pin or 20-pin F1xx2 offering 4x
more memory (32kB Flash and 1kB RAM) a total of 32 general purpose I/O (GPIO) and up to 16MHz
operation. The fast 200ksps 10-bit ADC with direct memory transfer control (DTC) is offered with 16
external inputs, 2X new OPAMPS, TA3 and TB3 multi-function 16-bit timers and the enhanced
watchdog timer (WDT+).
A dual-channel universal serial communication interface (USCI) is also included. The USCI supports
asynchronous and synchronous communications modes. The USCI has two independent blocks, USCI_A
and USCI_B. USCI_A support UART/IrDA or SPI, USCI_B supports I2C or SPI. USCI_A and USCI_B
can be used at the same time.
The F22x4 ideal for intelligent sensing application that require ultra-low power, real-time signal
processing using the Op Amps and 10-bit ADC and serial communication.
MSP430F2274 Fire Detector
3V
Smoke
MSP430F2274
+
Ref
Alarm
ADC10
SPI/UART/IrDA
SPI/I2C
Temperature
Status
• Ultra-low Power
• No crystal needed - VLO
• Fully programmable SoC
• Enhanced watchdog
• Very low cost
© 2006 Texas Instruments Inc, Slide 45
The example demonstrates an ultra-low power, fire detector using the MSP430F2274
An IR-LED based smoke chamber is used as a sensor to measure reflected light – if smoke is present,
more light is reflected and seen on an IR-transistor as a current output. One of the F2274’s two available
OPAMPs is used as a trans-impedance amplifier to convert the sensor current to a voltage. The F2274’s
internal ADC10 measures the voltage output from the OPAMP to determine the amount of smoke
present.
Temperature is measured using a negative temperature coefficient (NTC) resistor and a reference resistor
divider. The ADC10 measures the voltage of the divider to determine the NTC’s resistance and
associated temperature.
If the smoke is present and temperature is above a safe range, an alarm is issued.
The application operates normally in stand-by mode LPM3, with all components shut down, except the
MSP430F2274’s internal very low-power oscillator (or ultra-low 32kHz oscillator) and a timer. The timer
will overflow at a programmed interval of 8-seconds and power will be applied to the OPA and LED in
the smoke chamber.
The application runs completely from the MSP430’s internal DCO with no external clock sources
required. Factory pre-programmed DCO calibration constants are available to meet different speed
requirements.
Agenda MSP430 Day 2006
• MSP430 Overview
• MSP430x1xx / 4xx
• New MSP430F2xx
• New eZ430 Emulator
• Support / Future Products
© 2006 Texas Instruments Inc, Slide 46
Describe the evolution of the MCU emulator, ez430 details, and basic ez430 demonstration.
Emulator Evolution
2006 – $20
2000 – $100’s
1994 – $1000’s
© 2006 Texas Instruments Inc, Slide 47
The MCU emulator has gone an incredible evolution during the past decade making the process of
embedded design both easier and lower cost.
The original method of emulation was an in circuit emulator (ICE) which reproduced the function of the
target processor in a separate box. The ICE concept provided a temporary window into the embedded
processors functionality while inserted into the end application. An ICE used an ASIC, FPGA, or special
bond-out version of the target device to emulate the required functionality. A cable connects the ICE to
the application matching the footprint of target device. Another cable connects the ICE to a PC allowing
communication and control of emulated device while resident in the application. A power supply is
required as well. The problem with the ICE is that it never exactly emulated the target device causing
problems to surface when moving from emulation to production. As devices became smaller and projects
more portable, it became impossible for the ICE cable to fit in the target application. And with highperformance analog peripherals, it is also impossible to maintain signal integrity via a long external cable.
Placing dedicated logic on the target device and Flash memory brought the introduction of embedded
emulation. With embedded emulation, the code is developed in-application and in-system saving time
because the all development is subject to the exact same electrical characteristics as the final application.
The same device and application system is used for development and production. Code runs full speed on
the target device. Using dedicated signals to access the target device, development is non-obtrusive with
not using any normal target device resources. All MSP430 use embedded emulation.
The eZ430-F2013 takes embedded emulation a step further reducing cost and marking the system smaller
and even more convenient. The development tool includes everything needed for a new user to evaluate
the MSP430 family in minutes or, for a professional developer, the needed resources to complete and
entire MSP430F20xx project – all encased in USB stick case and for only $20!
eZ430-F2013 - Under The Hood
Spy Bi-Wire
Interface
All target pins accessible
LED
USB Powered
MSP430F2013
Emulator
Removable
Target Board
© 2006 Texas Instruments Inc, Slide 48
It’s now easy to rev up your application in minutes with the new eZ430-F2013, the world’s smallest
complete development tool for only $20! The tool provides all hardware and software needed to evaluate
the MSP430 or complete an entire F20xx project.
The eZ430-F2013 includes two tiny PCB boards, emulation and a detachable target, connected with a 4pin connector and encased in see-through USB stick case.
The eZ430U emulator board includes a USB connector and the circuits required to interface the
development IDE software and USB port to the MSP430 target. A TUSB3410 is used for the USB
interface. A TPS77301 provides 3.3V regulation and an EEPROM is used for non-volatile information.
Additionally on the backside for the eZ430U an MSP430F169 is used to accelerate the interface to the
target. ESD protection and a discrete components are also used. The eZ430U provide a regulated 3.3V to
the eZ430D target.
The eZ430D target board include an MSP430F2013, a reset pull up resistor and decoupling capacitor.
Additionally an LED is provided for immediate feedback. All of the F2013 are accessible on the target on
convenient a 0.1” centered though hole header.
The needed IAR Kickstart Embedded Workbench IDE software and a demonstration project are provided
on the included MSP430 Tools CD-ROM. IAR Kickstart as well as 100’s of code examples and other
support are available for free from TI’s website. The eZ430 uses the same IAR IDE as all other MSP430s
so there is nothing new to learn.
Easy In-System Development
VCC
JTAG
VSS
TMS
TCK
TDO/TDI
SBWTCK/TEST
SBWTDIO/RST
TDI
• Full-speed in-system development using 2 signals
ƒ
ƒ
ƒ
ƒ
Single step
Clock control
Hardware breakpoints
No device resources used
• Compatible with available MSP430 IDEs
© 2006 Texas Instruments Inc, Slide 49
The new MSP430F20xx features a 2-wire Spy Bi-wire debug and programming interface that provides
full in-system emulation capability using only two dual function signal pins not used in normal operation
TEST and RESET (SBWTCK and SBWTDIO). Spy Bi-wire signals that are decoding internal to the
F20xx to standard JTAG.
In-application emulation saves time because development is subject to the exact same electrical
characteristics as the final application and is non-obtrusive in portable situations. The F20xx Spy Bi-wire
emulation is fully compatible with TI USB-based hardware tools and software compatible with the IAR
Embedded Workbench IDE.
Complete in-system development including programming, assembler/C-source level debug, single
stepping, multiple hardware breakpoints, full-speed operation and peripheral access are all fully
supported in-system using Spy Bi-wire.
Detachable Target Benefits
• Not just a demo
• Separate emulator to debug remotely
• Build a complete stand alone project
© 2006 Texas Instruments Inc, Slide 50
Because the eZ430 target board can be disconnected from the emulation interface, the complete tool is
much more than a demo or evaluation system. An entire MSP430F20xx project can be implemented
using just the eZ430.
Competing basic demo or evaluation systems contain the emulation and target device on a single board
preventing a stand alone project implementation. The emulation interface can not be separated from the
target device. Only simple demonstrations or limited evaluation are possible.
VIDEO CLIP
The embedded video clip shows the full functionality of the eZ430 as a development tool for customer
applications. With the target board removed, the 2-wire JTAG header can be interfaced via custom
cabling to a user’s ‘F20xx system. When connected, the eZ430 emulator can download and debug code
with the complete functionality of other MSP430 FET tools. As an example, the ‘F2013 motion detector
application is interfaced, programmed and debugged. Breakpoints as well as variable monitoring are
demonstrated.
Detachable Target Benefits - video
Click link to view video:
(Windows Media)
Debugging with the eZ430
After watching the video, advance to next slide.
© 2006 Texas Instruments Inc, Slide 51
Because the eZ430 target board can be disconnected from the emulation interface, the complete tool is
much more than a demo or evaluation system. An entire MSP430F20xx project can be implemented
using just the eZ430.
Competing basic demo or evaluation systems contain the emulation and target device on a single board
preventing a stand alone project implementation. The emulation interface can not be separated from the
target device. Only simple demonstrations or limited evaluation are possible.
VIDEO CLIP
The embedded video clip shows the full functionality of the eZ430 as a development tool for customer
applications. With the target board removed, the 2-wire JTAG header can be interfaced via custom
cabling to a user’s ‘F20xx system. When connected, the eZ430 emulator can download and debug code
with the complete functionality of other MSP430 FET tools. As an example, the ‘F2013 motion detector
application is interfaced, programmed and debugged. Breakpoints as well as variable monitoring are
demonstrated.
Easy Code Generation
• Reduce development time
• Over 1000 free examples
• Provided in C / assembler
• Use standalone
• Use as a template for
your next project
© 2006 Texas Instruments Inc, Slide 52
Development time is valuable commodity. To reduce development time, TI provides free of charge over
1000 code example projects that immediately with no configuration required. Examples are provided in
both C and assembler to match the users preferred programming preference. The examples are provided
as compact application source code including all startup and peripheral configuration and they are and
clearly commented.
These free examples can be used standalone or as a template for your next project.
Easy Rapid Prototyping
Idea!
Idea!
+
Day 1
Next week
© 2006 Texas Instruments Inc, Slide 53
For complete project development, the eZ430-F2013 allows code to be developed in a user specific
application just like other MSP430 Flash Emulation Tools (FET). The included eZ430D target board
makes all 14 F2013 pins available on an industry standard 0.1” though hole header and can interface with
application specific external signals or other devices.
The eZ430U emulator and target are connected with just two Spy Bi-Wire signals SBWTCK (TEST) and
SBWTDIO (RESET), a 3.6V VCC and a common ground.
Because the eZ430-F2013 ships with the emulator and F2013 target (with an LED) connected and
encased an a plastic USB stick case, simple demos can be tested in minutes and then followed up with
complete MSP430F20xx projects using the same tool.
It is also possible to connect the eZ430U Emulator to any other MSP430F20xx devices or MSP430F20xx
based application using the Spy Bi-Wire interface.
Agenda MSP430 Day 2006
• MSP430 Overview
• MSP430x1xx / 4xx
• New MSP430F2xx
• New eZ430 Emulator
• Support / Future Products
© 2006 Texas Instruments Inc, Slide 54
Overview existing collateral, tools and future products.
Complete Flash Emulation Tool
• Compatible with ALL devices
• Universal USB JTAG interface
• Specific target module
• Development Environment
ƒ IAR Embedded Workbench (4KB)
ƒ Code Composer Essentials (8KB)
• Starting $99 USD
© 2006 Texas Instruments Inc, Slide 55
Embedded Emulation with the MSP430 – A common user software and physical interface is used for all
MSP430s. This means only one tool needs to be learned for any device.
The Flash Emulation Tool – or FET – is a complete JTAG based real-time emulation device. The FET
comes with a universal USB JTAG interface, a target board, cables and all documentation on a CD-ROM.
The CD-ROM includes both the IAR Kickstart Embedded Workbench IDE with 4kB C-compiler and TI
Code Composer Essentials IDE with 8kB C-compiler.
The FET supports complete in-system development for all Flash based MSP430’s. Programming,
assembler/C-source level debugging, single stepping, multiple hardware breakpoints, full-speed operation
and peripheral access are all fully supported in-system using JTAG.
The FET comes with everything required to complete an entire project!
Customer wishing to purchase unlimited C-compilers can do so from IAR or TI directly.
A parallel port JTAG interface is also available
In addition, many third parties vendors provide development tools for the MSP430 – please see
www.ti.com/msp430
www.ti.com/msp430
• User’s Guides
• Datasheets
• 100+ Application Reports
• 500+ Code Examples
• Product Brochure
• Latest Tool Software
• 3rd Party Listing
• Silicon Errata
© 2006 Texas Instruments Inc, Slide 56
The 430 is very well supported including a dedicated TI website www.ti.com/msp430.
For detailed technical information on device peripherals, TI has up-to-date MSP430 Family User’s
Guides available.
Chip specific electrical and pin information is available in device-specific datasheets.
Over 100+ application reports and 500+ downloadable code examples are available from the MSP430
website.
The product brochure provides a description and an overview of all available MSP430 devices.
A listing of 3rd parties is provided.
Any known silicon errata is available.
A FAQ system (Knowledge Base) and regional technical support phone lines also are available.
The most current MSP430 documentation is always available on the MSP430 website.
Coming Soon F23x0 40-pin
AVCC
D/AVSS
RST/NMI
TCK
TMS
TDI/TCLK
• 16 MIPS, <<1µA LPM3
• MPY, Comp_A+
TDO/TDI
P4.7/TBCLK
P4.6/TBOUTH/ACLK
P4.5/TB2
• 32KB Flash / 2KB RAM
40 39 38 37 36 35 34 33 32 31
• New 40-pin mid-range
Ideal for cost sensitive
encryption applications
6
7
8
9
10
MSP430F23x0
30
29
28
27
26
P4.4/TB1
P4.3/TB0
P4.2/TB2
P4.1/TB1
P4.0/TB0
25
24
23
22
21
P3.7
P3.6
P3.5/UCA0RXD/UCA0SOMI
P3.4/UCA0TXD/UCA0SIMO
P3.3/UCB0CLK/UCA0STE
11 12 13 14 15 16 17 18 19 20
P3.2/UCB0SOMI/UCB0SCL
• 32 GPIO
P1.2/TA1
P1.3/TA2
P1.4/SMCLK
P2.5/ROSC/CA5
P3.0/UCB0STE/UCA0CLK
P3.1/UCB0SIMO/UCB0SDA
• USCI
1
2
3
4
5
P1.7/TA2
P2.0/ACLK/CA2
P2.1/TAINCLK/CA3
P2.2/CAOUT/TA0/CA4
P2.3/CA0/TA1
P2.4/CA1/TA2
• Timer_A3 / B3, WDT+
DVCC
XIN/P2.6/CA6
XOUT/P2.7/CA7
P1.0/TACLK
P1.1/TA0
© 2006 Texas Instruments Inc, Slide 57
The MSP430F23x0 is planned for sampling Q4-2006 and expands the mid-range of the F2xx family for
cost sensitive applications. The combination of a hardware multiplier, 2kB RAM and the 16MIPS of
performance makes the F23x0 ideal for encryption applications.
The F23x0 is offered in a tiny 40-pin 6x6mm QFN package with 32 and 16 MIPS operation. The stand-by
LPM3 real-time-clock mode current is well below 1µA using an external 32kHz crystal or the new very
low-power oscillator (VLO).
The Timer_A3 and Timer_B3 multi-function 16-bit timers, a hardware multiplier, enhanced watchdog
timer (WDT+) and Comparator_A+ are integrated. A dual-channel universal serial communication
interface (USCI) is also included. The USCI supports asynchronous and synchronous communications
modes. The USCI has two independent blocks, USCI_A and USCI_B.
USCI_A supports UART/IrDA or SPI,
USCI_B supports I2C or SPI.
USCI_A and USCI_B can be used at the same time.
Coming Soon F26xx/24xx 80/64-pin
• 120KB Flash / 8KB RAM
• 16 MIPS, 1µA LPM3
• 12-bit 200ksps ADC
• (2) 12-bit DAC
• DMA, MPY, (2) USCI
• Timer_A3 / B7, WDT+
• 64 GPIO
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
DVCC1
P6.3/A3
P6.4/A4
P6.5/A5
P6.6/A6/DAC0
P6.7/A7/DAC1/SVSIN
1
2
3
4
5
6
60
59
58
57
56
55
P7.6
P7.5
P7.4
P7.3
P7.2
P7.1
VREF+
XIN
XOUT
VeREF+
VREF-/VeREFP1.0/TACLK/CAOUT
7
8
9
10
11
12
54
53
52
51
50
49
P7.0
DVSS2
DVCC2
P5.7/TBOUTH/SVSOUT
P5.6/ACLK
P5.5/SMCLK
P1.1/TA0
P1.2/TA1
P1.3/TA2
P1.4/SMCLK
P1.5/TA0
P1.6/TA1
P1.7/TA2
13
14
15
16
17
18
19
48
47
46
45
44
43
42
P5.4/MCLK
P5.3/UCB1CLK/UCA1STE
P5.2/UCB1SOMI/UCB1SCL
P5.1/UCB1SIMO/UCB1SDA
P5.0/UCB1STE/UCA1CLK
P4.7/TBCLK
P4.6/TB6
P2.0/ACLK/CA2
20
41
P4.5/TB5
MSP430F26xx
80-pin
PM PACKAGE
(TOP VIEW)
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
• 80 / 64-pin high-end
F16x/14x upgrade
© 2006 Texas Instruments Inc, Slide 58
The MSP430F26xx/24xx devices are planned for sampling Q4-2006 and expand the high-end of the F2xx
family offering for the first time by an 80-pin general-purpose catalog device. The F26xx/24xx are also
offered in 64 pin options.
The F26xx/24xx are pin and function compatible migration paths for customers using the 64-pin F16x
and F14x families doubling the on-chip Flash memory up to 120kB, increasing the GPIO pin count to up
to 64, and increasing performance to 16 MIPS. The stand-by LPM3 real-time-clock mode current is
reduced to 1µA using an external 32kHz crystal or the new very low-power oscillator (VLO).
The devices integrate a fast 200ksps 12-bit ADC, Timer_A3 and Timer_B7 multi-function 16-bit timers,
a hardware multiplier and the enhanced watchdog timer (WDT+). A dual-channel universal serial
communication interface (USCI) is also included. The USCI supports asynchronous and synchronous
communications modes. The USCI has two independent blocks, USCI_A and USCI_B. USCI_A
supports UART/IrDA or SPI, USCI_B supports I2C or SPI. USCI_A and USCI_B can be used at the
same time.
The F26xx also include a 3-channel DMA controller and two 12-bit DACs.
The F26xx/24xx are ideal for a variety of ultra-low power application that also require high-performance
processing capabilities.
Low Power Wireless Solutions
• ZigBee-Lite
ƒ MSP430F1612 + CC2420
ƒ AirBee Wireless free 4-node stack
ƒ See app note SLAA264
• ZigBee 1.1
ƒ MSP430FG4618 + CC2420
ƒ ZigBee 1.1 Stack < 50KB
ƒ 4Q06
• CC430F2xxx
ƒ MSP430F22x4 + CC1100
ƒ 7x7 mm QFN
ƒ 4Q06
www.ti.com/msp430wireless
© 2006 Texas Instruments Inc, Slide 59
MSP430 offers today various ultra-low power wireless solutions. The Chipcon acquisition positions
Texas Instruments to be the leader in the low power wireless market with the lowest power wireless
front-ends from Chipcon and the MSP430 ultra-low power MCU.
The Zigbee-Lite is a 2.4 GHz solution available today. It utilizes the MSP430F1612, which has
enough RAM and memory to support the AirBee wireless Zigbee-Lite implementation. Zigbee-Lite is
not a certified ZigBee stack, but it can be used for low cost mesh networks. AirBee wireless offers 4node ZigBee-Lite for free. Contact AirBee wireless on how they can help support more than 4-nodes.
More information on AirBee is available at www.airbeewireless.com. The wireless solution includes
hardware available today offered by SoftBaugh (www.softbaugh.com). A pair of boards can be
purchased for $299. The boards include the MSP430F1612, CC2420, 4 LEDs, 2 buttons, a
potentiometer, one PCB antenna, headers, and a serial port. Both devices are in production today. In
addition, the MSP430F1612 incorporates a 12-channel 12-bit ADC, 12-bit DAC, and DMA that can be
used for high precision instrumentation with no externals.
Texas Instruments is planning to offer a certified ZigBee 1.1 platform in 4Q06. The platform will
include a Figure 8 ZigBee certified 1.1 stack. The components targeted for the platform are the
MSP430FG4618 and the CC2420. The MSP430FG4618 has enough Program space to implement a
coordinator, router, and end-points. The MSP430FG4618 supports 8 KB RAM and 116KB Flash. A low
cost development kit will be available as well.
For proprietary ISM band wireless communications, Texas Instruments will offer the CC430F2xxx.
This device incorporates the MSP430F22x4 device and the CC1100 in one single package. The CC1100
supports multiple < 1GHz frequencies. This device can be used for low cost remote sensors. The 10-bit
200 ksps ADC mated with the 2 internal op-amps provides customers with the possibility to get rid off
any externals that are required to interface the sensor to the MCU. Given that the CC430FA22x4 is
exactly the same as the MSP430F22x4, customers can starting designing with the CC1100 and the
MSP430F22x4 today and plan for a single chip integration by 4Q06.
Ready To Learn More?
• Three days of in-depth
lectures and labs
ƒ
ƒ
ƒ
ƒ
ƒ
Nov Dallas, US
Dec Munich, Germany
Nov/Dec Bangalore, India
Nov/Dec Hangzhou, China
Nov/Dec Taipei, Taiwan
• Exchange ideas with
experts and other users
from around the world
• Receive ATC-exclusive
experimenter’s board
• First F5xx demonstration
www.ti.com/atc
© 2006 Texas Instruments Inc, Slide 60
The MSP430 Advanced Technical Conference is the must-attend event of the year for all MSP430
developers.
In the course of 2 1/2 days you will:
- Be the first to receive training on MSP430’s newest devices
- Expand your knowledge through BRAND NEW technical lectures and hands-on labs
- Meet MSP430 technology experts
- Meet MSP430 third parties to learn the latest in tools and services to aid your design
The ATC offers multiple tracks of courses taught by MSP430 senior applications engineers, MSP430
customers, third parties and universities. You can fully customize your schedule for the courses and labs
that best fit your development needs. For previous attendees, this year's conference will feature new
course material and labs to keep you updated on the latest information. For new users, a series of
introductory courses has been added to help get you up to quickly get started on the MSP430. Don't miss
out on the premier training event for MSP30 and reserve your spot today!
Conference fee of ~$595 includes:
- Hotel accommodations
- All meals and evening activities
- 2 1/2 days of technical training and labs
- A unique ATC 2006 experimenter's board
430 Day 2006
Thanks For Attending!
© 2006 Texas Instruments Inc, Slide 61
Copyright Notice
© Copyright by Texas Instruments Incorporated
© 2006 Texas Instruments Inc, Slide 62
[Copyright Texas Instruments]
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© 2006 Texas Instruments Inc, Slide 63
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