MICROELECTRONICS – Transistor Transistor Logic
Course MICROELECTRONICS
Chapter: Transistor Transistor Logic
Michael E. Auer
Source of figures:
Jaeger/Blalock: Microelectronic Circuit Design,
McGraw-Hill
Michael E.Auer
07.05.2007
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MICROELECTRONICS – Transistor Transistor Logic
Course Content
Introduction and Milestones in Microelectronics
Solid-state Electronics
Solid-state Diodes and Diode Circuits
Field-effect Transistors (FET)
Bipolar Junction Transistors (BJT)
Integrated Transistor circuits
Introduction to Digital Microelectronics
NMOS Logic Circuits
Complemetary MOS Logic (CMOS)
Bipolar Logic Circuits (TTL)
Semiconductor Memories
Application Specific Integrated Circuits (ASIC)
Microelectronic Technology
Michael E.Auer
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MICROELECTRONICS – Transistor Transistor Logic
Chapter Content
Saturating Bipolar Inverter / Übersteuerungsschalter
Transistor Transistor Logic (TTL) / Transistor Transistor Logik
Standard 7400 TTL Series / 7400er TTL Serie
Schottky-clamped TTL / Schottky TTL
BiCMOS Logic / BiCMOS Logik
Michael E.Auer
07.05.2007
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MICROELECTRONICS – Transistor Transistor Logic
Chapter Content
Saturating Bipolar Inverter / Übersteuerungsschalter
Transistor Transistor Logic (TTL) / Transistor Transistor Logik
Standard 7400 TTL Series / 7400er TTL Serie
Schottky-clamped TTL / Schottky TTL
BiCMOS Logic / BiCMOS Logik
Michael E.Auer
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MICROELECTRONICS – Transistor Transistor Logic
The Saturating Bipolar Inverter
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Michael E.Auer
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One of the most basic
circuits for BJT logic
gates is the saturating
bipolar inverter
The resistor “pulls” the
output high when vI is
low, and the output goes
to vCE = VCESAT when vI is
high
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Load Line Analysis
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MICROELECTRONICS – Transistor Transistor Logic
Saturating Bipolar Inverter Example
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MICROELECTRONICS – Transistor Transistor Logic
Switching Characteristics
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Michael E.Auer
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An important effect of
switching in BJTs is that
the excess base current
required to drive the BJT
into saturation results in
extra stored charge in the
base region. This charge
must be removed before the
BJT can be turned off.
This delay is called the
storage time (tS)
The figures show typical
switching characteristics
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MICROELECTRONICS – Transistor Transistor Logic
Storage Time
•
The storage time delays can be calculated using the
following expressions:
⎛
⎞
⎜ I −I ⎟
t S = τ S ln⎜ BF BR ⎟
⎜ iCMAX − I ⎟
⎜
BR ⎟
β
⎠
⎝ F
α F (τ F + α R τ R )
τS =
1− α Rα F
•
Michael E.Auer
Where αF and αR are the forward and reverse commonbase current gains, and τF and τR are the forward and
reverse transit times
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MICROELECTRONICS – Transistor Transistor Logic
Chapter Content
Saturating Bipolar Inverter / Übersteuerungsschalter
Transistor Transistor Logic (TTL) / Transistor Transistor Logik
Standard 7400 TTL Series / 7400er TTL Serie
Schottky-clamped TTL / Schottky TTL
BiCMOS Logic / BiCMOS Logik
Michael E.Auer
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MICROELECTRONICS – Transistor Transistor Logic
Diode Logic
•
Diodes with resistive loads can implement simple logic gates
Diode OR gate
Michael E.Auer
Diode AND gate
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MICROELECTRONICS – Transistor Transistor Logic
Diode Transistor Logic
•
Since diode gates are limited to AND and OR functions, the
diodes can be combined with transistors to complete the basic
logic functions such as the following NAND gate
Z = AB
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MICROELECTRONICS – Transistor Transistor Logic
TTL Prototype
Michael E.Auer
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•
TTL has been a
workhorse technology
in digital systems such
for many years
•
The basic structure for
the TTL inverter is
shown left
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MICROELECTRONICS – Transistor Transistor Logic
TTL Inverter Operation
•
•
Michael E.Auer
The two figures below show the bias points for the standard low and high inputs
The output ranges from VOL = 0.15 V to VOH = 5 V
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MICROELECTRONICS – Transistor Transistor Logic
Noise Margins for the TTL Prototype
•
The figure shows where VIL
and VIH occur, and they can
be approximated by the
following expressions using
standard TTL values:
VIL ≅ 0.7 − VCESAT1 = 0.66 V
VOH ≅ V H − VT ≅ V H = 5 V
VIH ≅ VBESAT 2 = 0.8 V
VOL ≅ VL = VCESAT 2 = 0.15 V
NM L ≅ 0.66 − 0.15 = 0.51 V
NM H ≅ 5.0 − 0.8 = 4.2 V
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MICROELECTRONICS – Transistor Transistor Logic
Fan-out Limitations of the TTL Prototype
Michael E.Auer
07.05.2007
•
For NMOS and CMOS
gates, fan-out was not
investigated in detail
since the input currents to
these gates were
considered to be zero.
•
However, this is not the
case for TTL as seen in
the figure.
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MICROELECTRONICS – Transistor Transistor Logic
Chapter Content
Saturating Bipolar Inverter / Übersteuerungsschalter
Transistor Transistor Logic (TTL) / Transistor Transistor Logik
Standard 7400 TTL Series / 7400er TTL Serie
Schottky-clamped TTL / Schottky TTL
BiCMOS Logic / BiCMOS Logik
Michael E.Auer
07.05.2007
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MICROELECTRONICS – Transistor Transistor Logic
Problems of the TTL Prototype
Michael E.Auer
•
One problem of the TTL inverter prototype
described so far is that the dynamic
response is asymmetrical due to the use of a
resistive load to pull the output up and a
BJT to pull the output down
•
Another problem is that the fanout
capability is bad.
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MICROELECTRONICS – Transistor Transistor Logic
The Standard 7400 Series TTL Inverter
•
Michael E.Auer
The classic approach to fixing these problems appears in the
implementation of the 7404 hex inverters in a dual-in-line package
(DIP)
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Output Analysis of the 7404 Inverter
VOH = VCC − iB 4 RC − v BE 4 − v D1
VOL = VCESAT 2
where
VOH ≅ 5 − 0 − 0.7 − 0.7 = 3.6
iB 2 = iE 3 − iRE = iC 3 + iB 3 − iRE
iB 2 = 2.57 mA
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MICROELECTRONICS – Transistor Transistor Logic
Power Consumption of the 7404
POL + POH
P =
= 5.03 mW
2
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MICROELECTRONICS – Transistor Transistor Logic
TTL VTC and Noise Margins
•
•
The figure shows the
VTC simulation
results of the TTL
inverter
Using the results from
the simulation, the
noise margins can be
calculated as
NM L = 0.7V − 0.15V = 0.55V
NM H = 3.5V − 1.8V = 1.7V
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MICROELECTRONICS – Transistor Transistor Logic
Logic Functions in TTL
•
Michael E.Auer
The basic structure for the TTL NAND gate:
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MICROELECTRONICS – Transistor Transistor Logic
Logic Functions in TTL
Michael E.Auer
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•
The parallel input can be
applied to create
multiple input NAND
gates as seen in the
complete circuit
schematic for the 7410
three-input NAND gate
•
Multi-Emitter Transistor
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Multi-Emitter Transistor Structure
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MICROELECTRONICS – Transistor Transistor Logic
TTL AND-OR-Inverter
Y = A·B·C + D·E
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MICROELECTRONICS – Transistor Transistor Logic
Low-Power TTL NAND gate
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MICROELECTRONICS – Transistor Transistor Logic
Input Clamping Diodes for TTL
•
Michael E.Auer
07.05.2007
To suppress
transient effects,
diodes can be
placed at the input
to clamp the signal
to ground.
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MICROELECTRONICS – Transistor Transistor Logic
Chapter Content
Saturating Bipolar Inverter / Übersteuerungsschalter
Transistor Transistor Logic (TTL) / Transistor Transistor Logik
Standard 7400 TTL Series / 7400er TTL Serie
Schottky-clamped TTL / Schottky TTL
BiCMOS Logic / BiCMOS Logik
Michael E.Auer
07.05.2007
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MICROELECTRONICS – Transistor Transistor Logic
Schottky-Clamped TTL
•
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Since the saturated transistors in TTL gates substantially slow down the
dynamic response of the logic gates, the Schottky-clamped transistor can be
used to help this problem
The Schottky diode keeps the BJT from going into deep saturation
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MICROELECTRONICS – Transistor Transistor Logic
Schottky-Clamped TTL Inverter Prototype
•
Michael E.Auer
07.05.2007
By replacing the
two BJTs with
Schottky-clamped
transistors, the
Schottky TTL
inverter can be
formed
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MICROELECTRONICS – Transistor Transistor Logic
Three-Input Schottky TTL NAND Gate
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•
Michael E.Auer
07.05.2007
Each saturating transistor
is replaced by a Schottkyclamped transistor
Q6, R2, and R6 replace RE
in the original version and
eliminates the first “knee”
voltage thereby making the
transition region narrower
Q5 eliminates the need for
D1 and provides extra
drive to Q4
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MICROELECTRONICS – Transistor Transistor Logic
Low-Power Schottky TTL
Advanced low-power
Schottky TTL (74ALS)
Low-power Schottky TTL
(74LS)
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07.05.2007
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MICROELECTRONICS – Transistor Transistor Logic
Chapter Content
Saturating Bipolar Inverter / Übersteuerungsschalter
Transistor Transistor Logic (TTL) / Transistor Transistor Logik
Standard 7400 TTL Series / 7400er TTL Serie
Schottky-clamped TTL / Schottky TTL
BiCMOS Logic / BiCMOS Logik
Michael E.Auer
07.05.2007
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MICROELECTRONICS – Transistor Transistor Logic
BiCMOS Logic
Michael E.Auer
•
BiCMOS is a complex processing technology that
provides both NMOS and PMOS devices, as well as
npn and pnp bipolar transistors
•
High input impedance logic gates (that require little
drive current) are provided by the MOSFETs, and
high current drive can be provided from the BJTs
due to their high current gain and transconductance
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BiCMOS Buffer (1)
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Michael E.Auer
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The CMOS inverter
only has to supply
enough current to
drive the bases of the
BJTs in the BiCMOS
buffer
The BJT stage can
then be designed to
drive the capacitive
load at a desired speed
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BiCMOS Buffer (2)
Michael E.Auer
07.05.2007
•
In some BiCMOS
processes, a good npn
is provided, but only a
sub-par pnp is
available
•
A buffer can be
implemented in the
manner shown using
only npn BJTs
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BiCMOS Logic Gates
More complex logic gates can also be implemented using BiCMOS design
Two-input BiCMOS
NOR gate
Michael E.Auer
Two-input BiNMOS
NOR gate
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MICROELECTRONICS – Transistor Transistor Logic
Summary
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Michael E.Auer
BJT saturation region: The transistor enters saturation if the base current exceeds the value
needed to support the collector current (that is iB > iC/βF). An undiserable result of the
storageof excess charge in the base region of the transistor. The time needed to remove the
exess charge is called the storage time tS.
Classical TTL circuits operate from a single 5 V supply and provide a logic swing of
approximately 3,5 V. The transistors in standard TTL circuits switch between the cutoff and
the saturation regions of operation.
Basic TTL gates realize multi-input NAND functions; however more complex gates can be
used to realize almost any desired logic function.
Standard TTL logic families provide delays in the 3 to 30 ns range, with a power-delayproduct of approximately 50 pJ.
The Schottky-clamped transistor merges a standard bipolar transistor with a Schottky diode
and was developed as away to prevent saturation. Schottky TTL circuits offer considerable
improvement in speed compared to standard TTL for a given power dissipation because the
storage time delays are eliminated.
The TTL gate has relatively large input currents for both high- and low-input voltages. The
input current is positive for high-input levels and negative for low-input levels.
TTL gates are available in many forms, including standard (7400), low-power (74L), highspeed (74H), Schottky (74S), low-power Schottky (74LS) and advanced low-power Schottky
(74ALS) versions.
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