Course Syllabus
George Mason University
Electrical and Computer Engineering Department
ECE 445-001: Computer Organization
MW 4:30 – 7:10pm, 209 Innovation Hall
Professor:
Office hours:
Craig A. Lorie
Monday 2:00 – 4:00pm
3221 Nguyen Engineering Bldg.
Tuesday 3:00 – 5:00pm
(703) 993 – 9616
Wed., Thur. by appointment
clorie@gmu.edu
Recommended
Background:
Required Text:
ECE 331 – Digital System Design
ECE 332 – Digital System Design Lab
Computer Systems: An Integrated Approach to Architecture and Operating
Systems, 1st Edition, by Ramachandran and Leahy.
ISBN-13: 978-0-321-48613-4
Course website: Blackboard (can be accessed at http://mymason.gmu.edu)
All course related materials, including the syllabus, schedule, homework
assignments and solutions, and announcements will be posted on Blackboard.
Please check the website regularly!
Schedule:
TA:
A detailed schedule is provided in a separate document on the class webpage.
Office hours:
Panasayya Yalla
Wednesday 2:00 – 4:00pm
3224 Nguyen Engineering Bldg.
(703) 993 – 1561
pyalla@gmu.edu
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Course Syllabus
Course Description
This course provides a general overview of the operation of a digital computer. Topics include
computer arithmetic, arithmetic and logic unit, hardwired and microprogrammed control, memory,
register-to-register data transfer, input-output operations, and behavioral modeling of computer
organization using VHDL.
The course is an intensive introduction to the fundamentals of computer architecture, and includes
coverage of the basic design and implementation of an Instruction Set Architecture (ISA) – the interface
between high-level programming languages and the computing hardware – and the Datapath and
Control Unit that compose a processor.
The course has a demanding design component, referred to below as the “projects”, in which you will
design, implement, and simulate a simple processor using VHDL and the Xilinix ISE.
Topics to be covered include:
1. The Instruction Set Architecture (ISA)
2. Assembly Language and Machine Language
3. Programming in Assembly Language
4. Processor Design – The Datapath and Control Unit
5. Components required for the Datapath and the Control Unit.
6. Processor Performance
7. Pipelining (to improve processor performance)
8. The memory hierarchy and memory systems
9. Cache (to improve processor performance)
10. Virtual Memory (to increase the “perceived” memory space of the processor)
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Course Syllabus
Learning Objectives
The student will be able to …
• Explain how an Instruction Set Architecture (ISA) is designed.
• Explain how the design of an ISA affects the design of a processor.
• Write assembly language programs using instructions from a sample ISA.
• Write assembly language programs using the instruction set of a sample processor.
• Explain the tradeoffs associated with the design of a processor.
• Differentiate and describe the datapath and control unit of a processor, and identify the
components needed for each.
• Design the datapath and control unit for a simple processor using an industry-standard
schematic capture tool (eg. the Xilinx ISE).
• Design the components required for the datapath of a simple processor using VHDL.
• Design the Finite State Machine (FSM) for the control unit of a simple processor using VHDL.
• Evaluate and compare the performance of different processors.
• Explain the execution of instructions in a pipelined processor.
• Explain the performance benefits gained from using a pipelined processor.
• Explain the challenges faced and problems encountered when designing a pipelined processor.
• Explain the concept of the memory hierarchy and cache.
• Explain the differences between direct-mapped, set-associative, and fully-associative caches,
and how each can affect and improve the performance of a processor.
• Explain the need to reduce memory access time in order to improve the performance of a
processor, and how cache facilitates this reduction.
• Explain the concept of virtual memory.
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Course Syllabus
The Projects
This course includes five projects to provide practical experience in the design, implementation, and
testing of a simple microprocessor. These projects will involve intense programming in VHDL, will
make use of the Xilinx ISE design tool, and will require significant time in the lab. Students will have
access to the computer lab in the Nguyen Engineering Building (room 3208), and may also use their
personal computers (assuming the proper software is installed).
The simple processor to be implemented in these projects is the LC-2200 processor. This processor is
covered in detail in the textbook associated with this class. The completed design and implementation
will include all instructions specified as part of the LC-2200 ISA (in the textbook), as well as additional
instructions specified by the TA and myself.
A list of the projects is given below:
0.
1.
2.
3.
4.
5.
Introduction to the Xilinx ISE
Design of the Arithmetic and Logic Unit (ALU)
Design of the Register File
Design of the LC-2200 datapath and control unit – R-type instructions only
Design of the LC-2200 datapath and control unit – addition of I-type instructions
Design of the LC-2200 datapath and control unit – addition of J-type instructions
Late submissions will NOT BE ACCEPTED!
Project Grading:
The projects will be weighted as follows:
P.1
P.2
P.3
P.4
P.5
15%
20%
30%
20%
15%
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Course Syllabus
Homework and Quizzes
Homework will be assigned on a weekly basis, and will consist of a reading assignment and a set of
related problems. You are expected to complete the assigned reading and ALL of the assigned
problems. Reading and homework are essential to the learning process! You will not learn the material
in this course if you do not do BOTH!
You are expected to make a concerted effort on all homework assignments. However, you are also
encouraged to work together on the assignments. Helping one another understand the material often
leads to a deeper (and more complete) understanding of the material for everyone.
A homework assignment will be posted on the class website (Blackboard) every Wednesday. The
corresponding solution will be posted on the following Monday. The assignments will NOT be graded,
and, therefore, will NOT be collected. Instead, there will be a weekly quiz on the following
Wednesday. Each quiz will consist of one problem, based on one of the problems from the previous
homework assignment. Each quiz will last approximately 20 minutes (at the beginning of class).
There will be NO makeup quizzes. If you cannot make class, and will miss a quiz, you must discuss
this with me in advance to arrange an alternate time to take the quiz.
Exams
There will be two exams in this course:
•
•
Midterm exam (week 4)
Final exam (finals week)
Both exams are closed book. I will provide all necessary reference materials for the exams.
There will be NO makeup exams. You must speak with me in advance if you cannot make one of the
scheduled exams.
Please see the schedule for the dates of the exams.
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Course Syllabus
Attendance
Attendance in class is expected, but will not be formally recorded. Failure to attend class does not
excuse you from the material covered; you are responsible for all material covered in class. Should
you miss class, you must consult with one of your classmates to obtain the notes and/or problem
solutions presented that day.
Course Grade
The final grade for the course is based on my best assessment of your understanding of the material and
your participation in the class during the semester. The projects, exams, and quizzes will be used to
determine your preliminary final grade according to the following weighting:
Projects
30%
Midterm
30%
Final
30%
Quizzes
10%
Honor Code:
All rules of the GMU Honor Code system will be enforced in both the lecture and the lab.
You must review the rules of the GMU Honor Code and be familiar with them.
http://academicintegrity.gmu.edu/honorcode/
The GMU Honor Code website:
You are encouraged to discuss homework problems with other students and/or obtain the assistance of
the lecture or recitation instructor. Nevertheless, please write down your own solutions which represent
your understanding of the material. Duplicating another student's homework solutions,
hardware/software designs, diagrams, source code, prelab assignment and exam notes is considered
cheating. If you use material from other sources such as, but not limited to, the web, books, journals,
data sheets, etc. you must reference the source.
Honor code violations will be pursued and prosecuted to the fullest extent.
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Course Syllabus
Classroom Etiquette
Cellphones are to be turned off during class; minimally they must be silenced. Emergency calls may be
taken, but must be taken outside of the classroom.
Texting, using your laptop for something other than lecture-related work, etc. is considered a
distraction to me and to the other students trying to learn in the class, and will not be tolerated.
Office of Disability Services
If you are a student with a disability and require special accommodations, please contact me and the
Office of Disability Services (ODS) as soon as possible. All special accommodations must be arranged
through ODS.
Office of Disability Services (ODS): (703) 993 – 2474; http://ods.gmu.edu
Other Useful Campus Resources
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Writing Center: A114 Robinson Hall; (703) 993 – 1200; http://writingcenter.gmu.edu
University Libraries: “Ask a Librarian” http://library.gmu.edu/mudge/IM/IMRef.html
Counseling and Psychological Services (CAPS): (703) 993 – 2380; http://caps.gmu.edu
The University Catalog: http://catalog.gmu.edu
University Policies: http://universitypolicy.gmu.edu
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