• Binary addition • Representing negative numbers

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• Binary addition
• Representing negative numbers
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
Consider the following binary numbers:
00100110
00101011
How do we add these numbers?
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
00100110
00101011
1
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
00100110
00101011
01
And we have a carry now!
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
00100110
00101011
001
And we have a carry again!
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
00100110
00101011
0001
and again!
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
00100110
00101011
10001
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
00100110
00101011
010001
One more carry!
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
00100110
00101011
01010001
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Binary Addition
Behaves just like addition in decimal, but:
• We carry to the next digit any time the sum
of the digits is 2 (decimal) or greater
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Negative Numbers
So far we have only talked about
representing non-negative integers
• What can we add to our binary
representation that will allow this?
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Representing Negative Numbers
One possibility:
• Add an extra bit that indicates the sign of
the number
• We call this the “sign-magnitude”
representation
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
+12
0 0001100
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
+12
0 0001100
-12
1 0001100
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
+12
0 0001100
-12
1 0001100
What is the problem with this approach?
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
What is the problem with this approach?
• Some of the arithmetic operators that we
have already developed do not do the right
thing
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
Operator problems:
• For example, we have already designed a
counter (that implements an ‘increment’
operation)
-12
1 0001100
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
Operator problems:
-12
1 0001100
Increment
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
Operator problems:
-12
1 0001100
Increment
1 0001101
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Sign Magnitude Representation
Operator problems:
-12
1 0001100
Increment
-13
1 0001101
!!!!
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Representing Negative Numbers
An alternative:
• When taking the additive inverse of a
number, invert all of the individual bits
• The leftmost bit still determines the sign of
the number
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
12
0 0001100
Invert
-12
1 1110011
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
12
0 0001100
Invert
-12
1 1110011
Increment
1 1110100
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
12
0 0001100
Invert
-12
1 1110011
Increment
-11
1 1110100
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
What problems still exist?
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
What problems still exist?
• We have two distinct representations of
‘zero’:
0 0000000
1 0000000
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
What problems still exist?
• We can’t directly add a positive and a
negative number:
12
0 0001100
+
+
-5
1 1111010
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
12
+
-5
0 0001100
+
1 1111010
0 0000110
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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One’s Complement Representation
12
+
-5
0 0001100
+
1 1111010
6
0 0000110
!!!!
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Representing Negative Numbers
An alternative:
(a little intuition first)
0
0 0000000
Decrement
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Representing Negative Numbers
An alternative:
(a little intuition first)
0
0 0000000
Decrement
1 1111111
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Representing Negative Numbers
An alternative:
(a little intuition first)
0
0 0000000
Decrement
Define this as
-1
1 1111111
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Representing Negative Numbers
A few more numbers:
3
2
1
0
-1
-2
-3
0
0
0
0
1
1
1
0000011
0000010
0000001
0000000
1111111
1111110
1111101
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
In general, how do we take the additive
inverse of a binary number?
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
In general, how do we take the additive
inverse of a binary number?
• Invert each bit and then add ‘1’
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
Invert each bit and then add ‘1’
5
0 0000101
Two’s complement
-5
1 1111011
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
Now: let’s try adding a positive and a
negative number:
12
+
-5
0 0001100
+
1 1111011
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
Now: let’s try adding a positive and a
negative number:
12
+
-5
0 0001100
+
1 1111011
0 0000111
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
Now: let’s try adding a positive and a
negative number:
12
+
-5
0 0001100
+
1 1111011
7
0 0000111
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
Two’s complement is used for integer
representation in today’s processors
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Two’s Complement Representation
Two’s complement is used for integer
representation in today’s processors
One oddity: we can represent one more
negative number than we can positive
numbers
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Implementing Subtraction
How do we implement a ‘subtraction’
operator?
(e.g., A – B)
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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Implementing Subtraction
How do we implement a ‘subtraction’
operator?
(e.g., A – B)
• Take the 2s complement of B
• Then add this number to A
Andrew H. Fagg: Embedded RealTime Systems: Binary Arithmetic
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