Y. Zhang, W.S. Zhao, L.B. Faber, Y. Lakys, J-O. Klein, J-V. Kim,
D. Ravelosona and C. Chappert
IEF (Université Paris Sud/CNRS UMR8622)
Contact: weisheng.zhao@u-psud.fr
I. General Introduction
II. Files Provided
III. Parameters
III.A CDF
III.B Technology Parameters
III.C Device Parameters
The development of hybrid Magnetic-CMOS circuits such as MRAM (Magnetic RAM) and Magnetic logic circuit requires efficient simulation models for the magnetic devices. A compact model of In-plane magnetic anisotropy (IP) Magnetic Tunnel
Junction (MTJ) is presented in this manual. This device is the most commonly used magnetic components in CMOS circuits. This model is based on Spin-Transfer Torque
(STT) writing approach, a very promising approach to constitute the second generation of MRAM switching technology; it features small switching current and high programming speed. It integrates the physical models of static, dynamic and temperature behaviors; many experimental parameters are integrated in this model to improve the simulation accuracy. So, the model can efficiently be used to design hybrid Magnetic CMOS circuits.
Programmed with Verilog-A language
Validated in Cadence 6.1.5 Spectre, CMOS Design Kit 40nm.
The objective of this guide is to provide an easy way to start the simulation of hybrid
IP MTJ/CMOS circuits.

Fig.1. (a) Vertical structure of an MTJ nanopillar composed of three main layers: an oxidation barrier
(such as MgO or AlxOy); a Pinned layer and a free layer which are ferromagnetic materials (e.g. CoFeB).
(b) Spin transfer torque switching mechanism: the MTJ state changes from parallel (P) to anti-parallel
(AP) as the positive direction electron flow I >I
C0+
and the write pulse width is larger than the necessary delay for switching, on the contrast, its state will return as the negative direction electron flow I >I
C0-
with an enough long write pulse.
Decompress the compressed file IPMTJ40nm.tar which you have downloaded.
There are three files included in the file decompressed:
One file named “model” includes a file of the type of veriloga which is the source code of this model, and a symbol file for this model;

The second file named “cell” includes a package schematic of IPMTJ and a symbol file of IPMTJ.
This model of IPMTJ contains three pins:
A virtual pin “State” is used to test the state of the MTJ. Level ‘0’ indicates the parallel state; level ‘1’ indicates the anti-parallel state.
Another two pins “T1, T2” are the real pins of the junction. These two pins aren’t symmetric: a positive current entering the pin “T1” can make the state change from parallel to anti-parallel.
Fig.2 Symbol of the model IPMTJ
Another file named “simu” is a simple test simulation with the model which demonstrates how it works. The schematic of the test simulation is shown in Fig.3.
We apply a simple voltage pulse (signal “V”) as input to generate a bi-directional current which can switch the IP MTJ from parallel to anti-parallel or from anti-parallel to parallel. By monitoring the voltage-level of the pin “State” and the current values passing through the IP MTJ, we can validate this compact model. With the result of simulation presented in Fig.4, the state is evidently changed governed by the current applied.
Fig.3 Schematic of the test simulation

Fig.4 Result of the simulation with the model IPMTJ
In order to describe the parameters and the attributes of the parameters of individual component and libraries of component, we use the Component
Description Format (CDF). It gives us the independence of from applications and cellviews, and a graphical user interface (the Edit Component CDF form) for entering and editing component information.
Thanks to its favorable features, we use CDF to define the initial state of IP MTJ. By entering “0” or “1” in the column “PAP” in category “Property”, we can modify the initial state to parallel or antiparallel (see Fig.5). Furthermore, using CDF tools we can modify multi MTJs’ states individually, which facilitates implementation of more complex hybrid CMOS/MTJ circuits.

Fig.5 Modify the CDF parameters
If you need to define other parameters for this library, you can click Tools -> CDF ->
Edit, enter “IPMTJ” as the Library Name and “cell” as the Cell Name. Select “Base” as the CDF Type. Then click “Add” under Component Parameters. (see Fig.6)
Fig.6 Edit the CDF parameters

Fill out the form as shown in Fig.6. You need to select the type of the parameter and enter the name and defValue of the parameter. Then click “OK”.
Parameter Description Unit alpha Gilbert Damping Coefficient gamma GyroMagnetic Constant
P
Hext
Electron Polarization Percentage
External Field
Hz/Oersted
Oersted
Hani
Hd
In plane Magnetic Anisotropy Oersted
Out of plane Magnetic Anisotropy Oersted
Default value
0.01
2.21e5
0.52
-19
100
1.3e4
Ms
Hc
Saturation Field in the Free Layer Oersted
Coercive Field Oersted
PhiBas
Vh
The Energy Barrier Height for MgO Electron-volt
Voltage bias when the TMR(real) is
1/2TMR(0)
Volt
Resistance area product Ohmum 2
0.4
0.5
RA 15 (10-20)
These technology parameters depend mainly on the material composition of the
MTJ nanopillar and it is recommended to keep their default value.
1.3e4
1
Parameter Description thick_f Thickness of the Free Layer thick_b thick_s a b tox
TMR
Thickness of the thermal barrier
Total thickness of the stack
Length
Width
Unit nm nm nm nm nm
Height of the Oxide Barrier
TMR(0) with Zero Volt Bias Voltage nm
Default value (Region)
2 (1-3)
10
50.7
100
40
0.85 (0.6-1.2)
99% (50%-600%)
These device parameters depend mainly on the process and mask design and the designers can change them to adapt their requirements.

Parameter Description
Pwidth Current Pulse width
Unit Default value
Second 10e-9
Pwidth is the parameter of current pulse width, which should be equal to the input voltage or current pulse duration.