Acceleration of motion estimation by pattern
matching algorithm using PLX sub-word parallel
ISA
Team members: Sanghamitra Roy and Dongkeun Oh
Project Highlight:
We propose to generate efficient code for implementing a visual pattern matching
algorithm, using the PLX sub-word parallel ISA. The code will be optimized for faster
performance and the performance will be analyzed and compared with the compiler
generated (and/or unoptimized) PLX code.
Motivation:
With rapid advances in the robotics of movement, it becomes critical for the robot to
recognize moving objects. The recognition process of a moving object is processed in
real time, which requires high performance image processors. The recognition of an
object can be speeded up by motion estimation. Edge detection and block matching
algorithm are the two methods extensively used in real-time object tracking [1]. We
propose to improve the computational power of an image processor by accelerating the
edge detection algorithm. Pattern matching is a crucial part of the edge detection
algorithm. By accelerating this step, the speed of the whole process can be improved. For
this we plan to use the PLX ISA v1.2, which is a fully sub-word parallel instruction set,
designed for very fast processing of computationally expensive multimedia algorithms.
Prior Art:
High compression algorithms can be divided into two categories. The first includes
block-based algorithms such as H.261, MPEG-1, etc. The work to build up acceleration
hardware for this algorithm has been done by Sheu-Chih Cheng [7]. This algorithm is
relatively easy to implement but sometimes, the reconstructed image quality is
dramatically degraded. The second category is object based coding where the quality of
the reconstructed image depends on the quality of object segmentation, which in turn
depends on the quality of edge detection. In [6], computational approach to edge
detection is well verified and it contributes to improve the speed of edge detection.
However, edge detection process for high quality images is sometimes computationally
expensive. In [2], a hybrid approach of mixing object based methods and block based
methods is proposed and the edge detection process can be speeded up by the pattern
matching process.
Algorithm and approach:
We plan to implement the Visual pattern matching motion estimation algorithm from [2]
in this project. The algorithm will be initially completely implemented and verified in the
C programming language. Next we will implement important routines from this
algorithm in the PLX instruction set and try to accelerate the algorithm by exploiting subword parallelism. The PLX routine will be interfaced with the C code and the total flow
will be verified with the initially obtained results. If time permits we will generate PLX
code automatically from the C routine using the PLX compiler and compare the
performance of our PLX code with the compiler generated version.
Task splitting and plan:
This project involves understanding the pattern matching algorithm in motion estimation,
understanding the PLX architecture, sub-word parallelism and use this knowledge to
efficiently implement the given algorithm. The various tasks involved will be split as
follows:
Team member #1
Review the PLX ISA, learn using PLX
assembler and simulator
Implement important routines from the
current algorithm using PLX ISA
Prepare project presentation
Team member #2
Review the selected algorithm and
implement it in C
Develop compiler generated PLX code for
the C routines
Prepare project report
Expected Result:
We expect to get identical results from our PLX implementation as previously generated
using the C code implementation. We plan to present the C implementation results and
the PLX implementation results and verify the later in the final report. We will report our
analysis of the algorithm, data dependency analysis and our approach to detect
instructions for parallel execution. We also plan to report the performance analysis of our
algorithm using the PLX implementation. Besides this, we will also provide a detailed
analysis of the PLX architecture, in the report.
Conclusion:
With the advancement of technology, there has been an increasing demand for high
performance multimedia algorithms. Edge detection and block matching algorithm are
the two methods extensively used in real-time object tracking. We have selected a visual
pattern matching algorithm for edge detection and propose to efficiently implement this
using the PLX sub-word parallel ISA. We plan to optimize the implementation and
analyze the performance of our design towards the concluding part of this project.
References:
[1] WanCheol Kim, et. al., “Efficient tracking of a Moving Object using Optimal
Representative Blocks”, Proceedings of the 2003 IEEE/ASME.
[2] Shyi-Chyi Cheng, “Visual Pattern Matching in Motion Estimation for Object-Based
Very Low Bit-Rate Coding Using Moment-Preserving Edge Detection”, IEEE
Transactions on Multimedia, Vol. 7, No 2, April 2005.
[3] P. Yahampath et. Al., “Detection of Moving Objects in Facial Image Sequences”,
IEEE, 1998.
[4] Ruby B. Lee and A. Murat Fiskiran, “PLX: A Fully Subword-Parallel Instruction Set
Architecture for Fast Scalable Multimedia Processing”, Proceedings of the 2002 IEEE
International Conference on Multimedia and Expo (ICME 2002), pp. 117-120, August
2002.
[5] Vishvjit S. Nalwa and Thomas O. Binford, “On Detecting Edges”, IEEE Transactions
on pattern analysis and machine intelligence, vol.PAMI-8, No 6, Nov, 1986
[6] John Canny, “A computational approach to edge detection”, IEEE Transactions on
pattern analysis and machine intelligence, vol. PAMI-8, No 6, Nov, 1986
[7] Sheu-Chih Cheng and Hsueh-Ming Hang, “A Comparison of Block-Matching
Algorithms Mapped to Systolic-Array Implementation”, IEEE Transactions on circuits
and systems for video technology, Vol. 7, No 5, Oct, 1997