Computer Organization and Architecture
SCR 1043
Semester 2, 09/10
Tutorial: Overview and Computer Systems
1. What is the difference between architecture and organization? Elaborate your answer.
2. Explain what is structure?
3. What is stored program computer?
4. What are the four main components of any general purpose computer based on Von
Neumann architecture?
5. Given the memory contents of the IAS computer as follows: 010FA210FB, which part is
op-code and which part is the address?
6. What are the differences between transistor and vacuum based computers?
7. At the integrated circuit level, what are the 3 principal constituents of a computer system?
8. Explain Moore’s Law. Show relevant examples.
9. List and explain key characteristics of a computer family.
10. The fastest MAC we have runs at a clock speed of 2.2 GHz. If you want the fastest
machine, you should buy 2.4 GHz Intel Pentium 4. What would you say to help this customer
based on your designing and understanding performance issues? Relate your answers to the
performance gap between CPU, memory and I/O as discussed in class.
11. Illustrate multiple cores approach using a diagram. Why was this approach taken by
computer designers and architects?
12.
(a). We wish to compare the performance of 2 different computers: M1 and M2. The
following measurements have been made on these computers:
Program
Time on M1
Time on M2
1
2.0 seconds
1.5 seconds
2
5.0 seconds
10.0 seconds
Which computer is faster for each program and how many times as fast is it?
(b). The following additional measurements were made:
Program
Instructions executed on M1 Instructions executed on M2
1
5 X 109
6 X 109
Find the instruction execution rate (instruction per second) for each computer when running
program 1
13. Suppose you wish to run a program P with 7.5 x 109 instructions on a 5 GHZ machine
with a CPI of 0.8.
(a). What is the expected CPU time?
(b). When you run P, it takes 3 seconds of wall clock time to complete. What is the
percentage of the CPU time P received?
14. Our favorite program runs in 20 seconds on computer P, which has 8 GHz clock. We are
trying to help a computer designer build computer Q that will run this program in 5 seconds.
The designer has determined that the substantial increase in the clock rate is possible, but this
will affect the rest of the CPU design, causing computer Q to require 1.5 times as many clock
cycles as computer P for this program. What clock rate should we tell the designer to target?
15. Suppose we have 2 implementation of the same instruction set architecture. Computer X
has a clock cycle time of 500 ps and a CPI of 5 for some program, and computer Y has a
clock cycle of 1000 ps and a CPI of 2 for the same program. Which computer is faster for this
program and by how much?
16. A compiler designer is trying to decide between 2 code sequences for a particular
computer. The hardware designers have supplied the following facts:
CPI for this instruction class
A
B
C
CPI
3
2
1
For a particular high level language statement, the compiler writer is considering 2 code
sequences that require the following counts:
Instruction counts for instruction class
Code sequence
A
B
C
1
4
6
8
2
2
3
5
Which code sequence executes the most instructions? Which will be faster? What is the CPI
for each sequence?
17. Explain the differences between hardware and software approaches. Use diagrams to
elaborate your answer.
18. Describe characteristics and module functions of memory connection module,
input/output connection module and CPU/Processor connection module.
19. What is bus? Describe 3 different types of bus stated in bus interconnection scheme as
mentioned in your notes.
20. What is the benefit of using multiple bus architecture compared to single bus
architecture? Explain 2 examples of multiple bus architecture.
Computer Organization and Architecture
SCR 1043
Semester 2, 09/10
Tutorial: Overview and Computer Systems
Review:
Clock Cycle Time
 The time taken for 1 cycle
 unit in sec (or
)
Clock Rate
 The number of cycles in 1 sec
 Unit in Hz or
 Therefore clock rate =
or clock cycle time =
Execution Time
 CPU execution time for a program P (sec) = Instruction Count x CPI x Clock Cycle Time
 CPU execution time for a program (sec) =
 CPU clock cycles per program = Instructions for a program × Average clock cycles per instruction
 CPU Time for a program P = CPU Clock Cycles / Clock Rate
Question 1
Computer architecture refers to those attributes of a system visible to a
programmer / those attributes that have a direct impact on the logical
execution of a program. Examples – instruction set, the number of bits used
to represent various data types, I/O mechanisms, and techniques for
addressing memory.
Computer organization refers to the operational units and their
interconnections that realize the architectural specifications. Examplescontrol signals, interfaces between the computer and peripherals, memory
technology used.
Question 2
Structure is the way in which the components are interrelated.
Question 3
Program could be represented in a form suitable for storing in memory
alongside the data. Then, a computer could get its instructions by reading
them from memory, and a program could be set or altered by setting the
values of a portion of memory.
Question 4
1) Main memory
2) Arithmetic Logic Unit (ALU) 3) Control Unit
4) I/O
Question 6
Vacuum tubes base computers required 140kW power consumption. It also used
18000 vacuum tubes. It weights 30 ton and used a lot of space. It programmed
manually by switches.
Transistor base computers on the other hand were smaller, cheaper and dissipated
less heat. It also can process more complex ALU and Control Unit. Use of high level
programming languages.
Question 8
Moore’s Law – The number of transistors on a chip will double every year.
Question 10
“As long as the answers make sense, it’s ok”
Question 11
Multiple cores provide the potential to increase performance without increasing the
clock rate. With two processors, larger caches are justified.
4
Question 12
We wish to compare the performance of 2 different computers: M1 and M2. The
following measurements have been made on these computers:
Program
1
2
Time on M1 (sec)
2.0
5.0
Time on M2 (sec)
1.5
10.0
For Program 1
Execution time M1 = 1.33 Execution time M2
Therefore M2 is faster than M1.
For Program 2
Execution time M1 = 0.5 Execution time M2
Therefore M1 is faster than M2.
b) The following additional measurements were made:
Program
1
Instructions executed on M1
5 x 109
Instructions executed on M2
6 x 109
Note: Instruction /Execution Time = Instruction/second
For M1:
For M2:
5
Question 13
Suppose you wish to run a program P with 7.5 x 109 instructions on a 5 GHZ machine
with a CPI of 0.8.
a. What is the expected CPU time?
CPU time
=
Instruction count x CPI x clock cycle
=
=
=
b.
7.5 x 109 x 0.8 / (5 x 109)
1.2 sec
When you run P, it takes 3 seconds of wall clock time to complete. What is
the percentage of the CPU time P received?
Percentage of P received = 1.2 / 3 x 100 = 40%
Question 14
Our favourite program runs in 20 seconds on computer P, which has 8 GHz clock. We are trying
to help a computer designer build computer Q that will run this program in 5 seconds. The
designer has determined that the substantial increase in the clock rate is possible, but this will
affect the rest of the CPU design, causing computer Q to require 1.5 times as many clock cycles
as computer P for this program. What clock rate should we tell the designer to target?
Given for Computer P:
Therefore
Execution Time = 20 sec
Clock rate = 8GHz = 8 x 109
CPU clock cycle = Execution Time x Clock rate
= 20 x 8 x 109 = 160 x 109
For Computer Q:
Execution Time = 5 sec = Clock cycle/ clock rate
=
Therefore
Clock rate
=
= 48 GHz
6
CPU Time P = CPU Clock Cycles P / Clock Rate P
20 s = CPU Clock Cycles P / 8 GHz
20 s = CPU Clock Cycles P/ 8 X 10*9 Hz
CPU Clock Cycles P = 160 x 10*9 cycles
CPU Time Q = 1.5 X CPU Clock Cycles P / Clock Rate Q
5s
= 1.2 X CPU Clock Cycles P / Clock Rate Q
Clock Rate Q = 1.5 X 160 X 10*9 cycles / 5 seconds
Clock Rate Q = 240 X 10*9 cycles / 5 seconds
Clock Rate Q = 4.8 X 10*10 cycles / seconds
Clock Rate Q = 48 GHz
Question 15
Suppose we have 2 implementation of the same instruction set architecture. Computer X has a
clock cycle time of 500 ps and a CPI of 5 for some program, and computer Y has a clock cycle of
1000 ps and a CPI of 2 for the same program. Which computer is faster for this program and by
how much?
Suppose we have 2 implementation of the same instruction set architecture. Computer X has a
clock cycle time of 500 ps and a CPI of 5 for some program, and computer Y has a clock cycle of
1000 ps and a CPI of 2 for the same program. Which computer is faster for this program and by
how much?
Computer X
Given:
Clock cycle time
CPI
Say that the total instruction count
Therefore
CPU execution time
= 500 ps
=5
=i
= i x CPI x Clock cycle
= i x 5 x 500 x 10-12
=2500i x 10-12
Computer Y
Given:
Clock cycle time
CPI
Say that the total instruction count
Therefore
CPU execution time
= 1000 ps
=2
=i
= i x CPI x Clock cycle
= i x 2 x 1000 x 10-12
= 2000i x 10-12
7
Therefore
= 1.25
CPU time (X) = 1.25 CPU time (Y)
Therefore Y is faster than X by 1.25 times.
CPU clock cyles(X) = I x CPI(X) = I x 5
CPU clock cyles(Y) = I x CPI(Y) = I x 2
CPU Time (X) = CPU clock cycles(X) x Clock cycle Time (X) = I x 5 x 500ps
CPU Time (Y) = CPU clock cycles(Y) x Clock cycle Time (Y) = I x 2 x 1000ps
Execution time (X)/Execution time (Y) = I x 2500ps / I x 2000 = 1.25
Y is 1.25 times faster than X for this program
Question 16
A compiler designer is trying to decide between 2 code sequences for a particular computer. The
hardware designers have supplied the following facts:
CPI
CPI for this instruction class
A
B
C
3
2
1
For a particular high level language statement, the compiler writer is considering 2 code
sequences that require the following counts:
Code sequence
1
2
Instruction counts for instruction
class
A
B
C
4
6
8
2
3
5
Code 1
Instruction count = 4 + 6 + 8 = 18
CPU clock cycle (1) = 4 x 3 + 6 x 2 + 8 x 1 = 32 cycles
CPI (1) = 32 / 18 = 1.78
Code 2
8
Instruction count for Code 2 = 2 + 3 + 5 = 10
CPU clock cycle (2) = 2 x 3 + 3 x 2 + 5 x 1 = 17 cycles
CPI (2) = 17 / 10 = 1.7
Therefore Code 2 is faster compare to Code 1.
Question 18
Memory Connection
-Receives and sends data
-Receives addresses (of locations)
-Receives control signals
-Read
-Write
-Timing
Input/Output Connection
-Output
-Receives data from computer
-Sends data to peripheral
- Input
-Receives data from peripheral
-Sends data to computer
-Receives control signals from computer
-Sends control signals to peripherals
-e.g. spin disk
-Receives addresses from computer
-e.g. port number to identify peripheral
-Sends interrupt signals (control)
CPU Connection
-Reads instruction and data
-Writes out data (after processing)
-Sends control signals to other units
-Receives (& acts on) interrupts
9