1
Lightning Protection for Power Systems: A
Primer for Undergraduate Students
Michael J. Bloem, Member, IEEE

Abstract—This paper presents an overview the phenomenon of
lightning and its effect on power systems for both direct and
indirect strokes. It also reviews the behavior, characteristics, and
physical implementation of surge arrestors, which are commonly
used to protect power systems from lightning. Modeling and
simulation of the use of surge arrestors was performed using
MathCad and PSCAD software. Finally, more practical tools for
choosing and implementing an arrestor were reviewed, and an
actual arrestor was chosen for a typical situation.
Index Terms—industrial power systems, lightning, surge
protection
provides the impetus for a “stepped ladder” of current to begin
flowing down to earth. Essentially, the collection of negative
charge makes an attempt to discharge to ground when
encouraged by a pocket of positive charge within the cloud.
The stepped ladder typically flows in steps of tens of meters,
and has pulse currents of more than 1 kA. The potential
difference between the stepped ladder and the ground can
reach 100 MV. Eventually, the stepped ladder reaches ground,
usually by attaching to an upward streamer that rises up from
the ground. Once the stepped ladder does connect to the
ground, the negative charge that was lowered via the stepped
leader is discharged. Fig. 1 depicts this process.
I. INTRODUCTION
L
strokes are more than a nuisance to power
systems engineers. Lightning accounts for around a third
of all power outages in the United States, leading to many
millions of dollars in costs.
In order to protect power systems from lightning strokes,
the strokes themselves and how they impact power systems
must be analyzed. The resulting understanding allows a power
system engineer to pick the right form or protection for the
power system in question, which will more often than not be a
surge arrestor. Once the operation of surge arrestors is
understood and the appropriate surge arrestor characteristics
have been determined for a certain application, an actual
arrestor must be located and purchased.
This paper
summarizes research and analysis that covers all of these
various topics.
IGHTNING
II. THE PHENOMENON OF LIGHTNING
Lightning in generated as a result of current being
separated by wind up and down drafts. These drafts leave
negative charges at the bottom of a thundercloud and positive
charges at the top. This collection of negative charge at the
bottom of the cloud is the ultimate cause of cloud-to-ground
lightning.
A cloud-to-ground stroke begins when there is a
preliminary breakdown at the bottom of the cloud. This
breakdown involves a small pocket of positive charge that
M. J. Bloem is a student at the Electrical Engineering Department, Calvin
College, 3201 Burton St SE, Grand Rapids, MI 49546 (e-mail:
mbloem63@calvin.edu).
Fig. 1. Formation of a stepped leader that starts a lightning strike. Note
how the preliminary breakdown is caused by a pocket of positive charge
within the cloud [2].
At this point, a breakdown current pulse referred to as a
return stroke forms. The return stroke travels back up the
channel created by the breakdown current pulse. This current
typically flows at a third of the speed of light and has a current
of 30 kA. Obviously, a current of this magnitude generates
magnetic and electric fields, which can last for several
milliseconds and cause damage to power system equipment. A
sequence of diagrams in Fig. 2 show the sequence of events
involved in a lightning strike, from stepped leader to return
stroke.
Fig. 2. A series of diagrams depicting a stepped leader coming down from
a cloud and how it connects with an upward leader coming up from the
ground. In the later diagrams, the return stroke is shown [2].
2
When processes referred to as “J” and “K” processes
occur within the thundercloud, more charge can become
available at the cloud side of the channel created by the
stepped leader. This charge can lead to 3-5 subsequent
strokes, which often follow the path of the first stroke. These
strokes have lower current levels, but are faster (in terms of
speed to peak current). The interval between these subsequent
strokes is about 60 milliseconds [2].
III. THE EFFECT OF LIGHTNING ON POWER SYSTEMS
Clearly, an electrical phenomenon as powerful as a
lightning strike can have a devastating impact on power
systems. In the United States, 30% of all power outages are
lightning related. The total cost related to these outages is
greater than 1 billion dollars.
There are many factors, however, that influence the
likelihood that a power system will be struck by lightning.
Electrical power engineers have developed a few parameters
that indicate the how much danger a certain power system
faces from lightning strikes. The first of these parameters is
ground flash density (GFD). The GFD is the number of
lightning flashes striking the ground per unit area per year.
This is a value is calculated based on measurements taken over
a large number of years. It varies quite widely with climate.
For example, the GFD is as much as 14 flashes/km/year in
parts of Florida and less than 0.1 flashes/km/year in parts of
California [2].
A related parameter that is more specific and useful is the
incidence of lightning to power lines. This parameter is
defined as the number of flashes striking the line per 100 km
per year. It is comparable to the fault index due to direct
lightning hits for distribution lines, and is an indicator of the
exposure of the line to direct strikes. The equation used for
the determination of the incidence of lightning to power lines
is shown below.
 28  h 0.6  b 

N  GFD  
10


(1)
Where N is the incidence of lighting to power lines, GFD
is the ground flash density, h is the pole or tower height, and b
is the structure width.
A third parameter that tells just how much energy is
dissipated once a power system is struck by lightning is the
action integral. More specifically, the integral tells the amount
of energy that would be dissipated in a 1 Ω resistor if the
current from the lightning strike were to flow through it. The
median value for the action integral is 650,000 A2s. This
parameter is gives power system engineers an idea of how
much damage will be done to systems (and surge arrestors)
that are actually struck by lightning.
A. Direct Lightning Strokes
Lighting strokes have different impacts on power systems
depending on if they are direct or indirect. A stroke is direct
when it hits the phase conductor, the shield wire, or the tower.
A few terms and parameters should be introduced relating to
the impact of direct lightning strokes on power systems.
“Backflash” refers to the insulating string at a tower flashing
over to the tower or shield line. “Shielding failure” occurs
when the insulating string flashes over by a strike to the phase
conductor. The basic impulse insulation level (BIL) is an
important parameter that indicates the size of a voltage
impulse that a particular insulation implementation can handle
(without flashing over). There are two types of BIL: the
statistical BIL and the conventional BIL. The statistical BIL is
the crest value of a standard lightning impulse voltage that the
insulation will withstand with a probability of 90% under
specified conditions. The conventional BIL, on the other
hand, is the crest value of a standard lightning impulse voltage
that the insulation will withstand for a specific number of
applications under specified conditions. So the statistical BIL
is relates to a one-time withstanding of a voltage, while the
conventional BIL is a long-term parameter relating to the same
thing.
1) Direct Strokes to Unshielded Lines
Direct lightning strikes have different impacts depending
on if they hit the phase inductor or the tower. When a stroke
hits a phase inductor, the return-stroke splits into to halves,
each traveling one direction down the line. This produces
traveling voltages of magnitude
V
Z0  I
2
(2)
Where I is the return stroke current and Z0 is the surge
impedance of the line. The surge impedance is in turn
calculated using equation (3).
L
Z0   
C 
1/ 2
(3)
C and L are the series inductance and capacitance to
ground per meter length of wire. This voltage is attenuated as
it travels down the line. If the voltage exceeds the BIL, then a
flashover might occur and result in a power outage. The
critical return stroke current (the return stroke current that will
cause an inductor flashover) can be calculated.
IC 
2  BIL
Z0
(4)
Before the impact of a direct lightning stroke to a tower
(as opposed to a phase inductor) can be analyzed, one must
decide how to model a tower. Short towers can simply be
ignored, but not longer towers. Typically, the tower is
modeled as a vertical transmission line with surge impedance
Zt, where the voltage and current waves travel with a velocity
of vt. The tower is terminated at the lower end by the towerfooting resistance, Rtf, and at the upper end by the lightning
channel, with another surge impedance of Zch.
Using this model, when a tower is struck, voltage and
current waves will repeatedly travel up and down the tower,
reflecting back at each end. This leads to a voltage at either
end of the tower cross-arm. The insulator voltage will be
equal to the cross-arm voltage if the power-frequency voltage
3
is ignored. In the case of a direct lightning stroke to a tower,
this is the voltage that must remain below the BIL in order to
avoid a flashover.
2) Direct Strokes to Shielded Lines
Shielding lines are conductors strung above phase
conductors of overhead power lines. These are directly
attached to towers so that return-stroke currents are safely led
to ground through the tower-footing resistance. Moreover, the
critical current for a shielded line is higher than that for an
unshielded line because the presence of the grounded shield
wire reduces the effective surge impedance. Yet another
advantage of shielding wires is that the return stroke current is
divided up into three parts (tower and each direction on the
shielding wire), so a lower voltage will be developed across
the tower and each part of the shielded line. Ultimately, this
means that a higher voltage can be handled by the line.
Finally, one last reason that shielding wires reduce the voltage
that must be sustained by the insulator for a given return stroke
is that electromagnetic coupling between the shield wire and
the phase conductor induces a voltage on the phase conductor,
thus lowering the voltage difference across the insulator. Fig.
3 a and b show the difference in magnitude of insulator voltage
experienced by (a) unshielded versus (b) shielded lines.
B.
Indirect Lightning Strokes
Indirect lightning strokes do not actually physically
connect with the phase inductors, shield line, or tower, so they
induce overvoltages differently than direct strokes. More
specifically, there are four components to the voltage induced
by an indirect stroke in a phase inductor. The first component
is a result of the charged cloud above the line inducing bound
charges on the line while the line itself is held electrostatically
at ground due to leakage over the insulators and the neutrals of
connected transformers. When the cloud is discharged, these
bound charges are released, giving rise to voltages and
currents.
The second component of the voltage induced on a line
by an indirect lightning stroke is induced by the charges
lowered by the stepped ladder. When the charges in the line
bound by the charges lowered by the stepped ladder are
released as the return-stroke neutralizes the stepped ladder,
voltages and currents in the line result.
Electrostatic fields in the vicinity of the line are induced
by residual charges in the return stroke. This leads to the third
component of the voltage induced on a line by an indirect
lightning stroke.
Finally, the last component is magnetically induced due
to the rate of change of current in the return stroke. Of these
four components, only the last two are significant and the first
two can be neglected safely.
The inducing voltage is an important parameter in the
calculation of overvoltages resulting from indirect strokes.
This is the voltage at a field point in space with the same
coordinates as a corresponding point on the line conductor, but
without the presence of the line conductor. It is calculated by
first finding the total electric field created by the charge and
the current in the lightning stroke at any point in space.
Ei  E ei  E mi   
(a)
A
t
(5)
In equation 5, Φ is the inducing scalar potential created
by the residual charge at the upper part of the return stroke (the
third component listed above). A is the inducing vector
potential created by the upward moving return-stroke current
(the fourth component listed above). In order to find the
inducing voltage Vi, the line integral of Ei must be taken, as
dictated by the potential gradient relationship between
potential and electric field intensity.
hp
Vi    Ei  dz  Vei  Vmi
(6)
0
(b)
Fig. 3. Difference in magnitude of insulator voltage experienced by (a)
unshielded and (b) shielded lines [3].
Of more interest than the inducing voltage is the induced
voltage. This is the voltage that is actually induced in the
conductor as a result of the inducing voltage. The two
voltages will be different because current can be conducted
when the conductor is present. Unfortunately, the calculation
of the induced voltage from the inducing voltage is complex
mathematically and will not be pursued extensively in this
paper. Some possible tools to use in this calculation include
Dahamel’s integral and Green’s function.
4
The calculation of outage rates caused by nearby
lightning strokes is more straightforward. The number of
flashovers (nfo) for a particular region is a function of the
magnitude of the return stroke current (ΔIp), the front-time step
of the line (Δtf), the probability that a strike big enough and
with enough of a front-time step will hit in the right spot
(p(Ip,tf)), the ground flash density of the region (ng), and the
attractive area (A) [2].
nfo  p( I p , t f )  I p  t f  n g  A
(7)
IV. THE USE OF SURGE ARRESTORS TO PROTECT POWER
SYSTEMS AGAINST LIGHTNING
A. Surge Arrestors
Surge arrestors are place in parallel with a power system
object to be protected and in close proximity with it. The idea
is to make sure that the voltage across the arrestor never
exceeds what the protected object can handle [7]. Surge
arrestors are ideal for this task because they have a non-linear
relationship between voltage and current. When the voltage
across the component to be protected is relatively low, the
surge arrestor has a high impedance and therefore does not
allow much current to flow through it. This keeps power
consumption low under normal operating conditions. When a
voltage surge occurs, however, the surge arrestor allows a
large amount of current to flow, limiting the voltage across
itself and the protected component [1].
1) Behavior
The most important behavior of a surge arrestor is its
non-linear relationship between voltage and current, as
mentioned above. The high resistance in normal operation
minimizes steady-state losses, while the lower resistance level
at higher voltages provides an alternate discharge path for
surge currents that keeps system voltages at safe levels [1].
The V-I characteristic of a surge arrestor can be classified
into three main regions. The first region is the leakage region.
In this region the arrestor draws a small current (typically less
than 0.1 mA/cm2). During steady-state operation the arrestor
should be operating in the leakage region. As voltage levels
increase, the second region is reached. This region is referred
to as the transition region, where the nonlinear behavior of the
arrestor starts. Technically, the “transition voltage” that
separates the leakage region from the transition region starts
wherever the current density becomes 1 mA/cm2. Finally, the
highly nonlinear region is the reached as voltages continue to
increase. This region is characterized by large incremental
current changes for small incremental voltage changes. The
highly nonlinear region is also characterized by a high thermal
coefficient, which means that thermal runaway is a danger in
this region [1].
Another important characteristic of the behavior of a
surge arrestor is the amount of energy it can dissipate. An
arrestor must be able to dissipate the energy of the surge
without damaging itself [1].
2) Physical Implementation
The most basic surge arrestors are implemented with a
combination of gaps and silicon carbide resistors. Silicon
carbide is the material with the nonlinear relationship between
voltage and current in the arrestor. Gaps are used to prevent
any current from flowing while the device is in its steady-state
mode of operation. When a voltage surge does occur, the gap
sparks over and the arrestor is able to control the voltage
across the protected component [1].
Almost all modern surge arrestors are implemented with
stacks of metal-oxide varistors (MOV) as the nonlinear
element. Fig. 4 shows the superior nonlinear characteristics of
a MOV arrestor as compared with a SiO arrestor. MOV
arrestors quickly allow more and more current to flow as the
voltage level increases, meaning that a MOV arrestor can be
chosen to allow virtually no current to flow during steady state
operation and very large amounts to flow during overvoltages.
The performance is such that a gap in series with the material
at all because so little current flows at lower voltages.
Fig. 4. Nonlinear characteristics of an MOV arrestor and an SiO arrestor
[7].
The metal oxide most commonly used in MOVs is zinc
oxide, which is used in 90% of all MOVs. The disks-shaped
blocks of ZnO are made by a process involving grinding,
mixing, pressing, and sintering. The resulting material is
dense and fine. The nonlinear properties actually result from
the boundary layers of the crystals. The grain size is
dependent on the sintering process, and grain size determines
how many boundaries there will be. In this way the production
process can be altered to produces different nonlinear
characteristics.
The dialectic properties of the material determine the
number of disks that will be required. Often several columns
will be applied in parallel to the protected component. This is
helpful when more energy needs to be dissipated than can be
handled by a single column.
Fig. 5 shows in detail the various components of one
implementation of a surge arrestor.
5
Fig. 5. Schematic diagram of valve type arrestor [7].
An arrestor involves more than just a metal oxide nonlinear
resistor. Other components include gaps, magnetic coils, and
shunting resistors. The two gap units flash over when the
voltage level increases rapidly as a result of a lightning strike.
The breakdown of the gaps is actually precisely controlled
with the use of pre-ionizing tips, which maintain a higher-thannormal number of electrons in the gap, ready to ignite a
breakdown. The bypass gap in parallel with the magnetic coil
flashes over when a large surge of current flows down through
the arrestor and around the coil, which does not conduct
transient currents well. At this point the voltage across the
arrestor is basically controlled by the nonlinear thyrite resistor.
Once the surge has passed, the impedance of the magnetic coil
becomes much lower as more DC-like conditions resume.
This causes the gap in parallel with the coil to diminish and
die. Flux develops as a result of the current flowing through
the coil, which pushes the arcs in the nearby gap units into
quenching chambers. These quenching chambers elongate and
cool the arc as it is eliminated. The arrestor returns to its
quiescent state.
An alternate implementation of a gapped surge arrestor is
depicted in Fig. 6. In this case, the voltage distribution
between the gap and the MOV when in quiescent mode is
determined by the capacitance across the gaps (C1) and the
inherent capacitance of the MOV (C3). This distribution
impacts the power consumption during steady-state operation.
When a surge is applied to the arrestor, C2 acts as a short
across gap 2. This forces gap 1 to short as it must then handle
a large voltage on its own. Once it has shorted, gap 2 sparks
over and the MOV takes control of the voltage across the
arrestor [7].
Fig. 6. Circuit diagram of a gapped surge arrestor [7].
3) Potential issues
There are two main aspects of surge arrestor usage that
could be problematic for engineers. The first such area is
energy dissipation. If an arrestor is asked to dissipate too
much energy, it will not return to its high-resistance state when
the overvoltage is complete. This results in an unwanted short
circuit, which could devastate a system.
Thermal runaway is the second area of concern for
engineers.
Thermal runaway is a positive-feedback
phenomenon where high current levels heat up the nonlinear
resistor, which leads the arrestor to conduct even more current.
Ultimately, the level of current may require the arrestor to
dissipate more energy than it is able to, damaging the arrestor.
In order to prevent these aspects from becoming
problematic, engineers must ensure that the current and energy
dissipation capabilities of the arrestors they choose to use will
fulfill the requirements of the system they are designing for
[1].
B. Mathematical Description of Surge Arrestors
The V-I characteristic of a surge arrestor is given by
equation 8.

V 
I (V )  p     sgn( V ) (8)
 V0 
Where I is the discharge current of the arrestor, V is the
discharge voltage of the arrestor, V0 is the transition voltage of
the arrestor, α is a parameter that describes the sharpness of
the nonlinear region of the arrestor (typically between 10 and
50), and p is a parameter than can be adjusted to allow for
leakage current under normal voltage conditions.
An example application of this equation will be given.
Suppose we have an arrestor with the following characteristics:
Disk diameter, D = 50 cm2
Disk thickness, h = 2.1 cm2
DC voltage at 1 mA/cm2, E = 1640 V/cm
6
DC leakage current density at 80% of DC voltage at 1
mA/cm2, J = 2 μA/cm2
Voltage ratio at 300 A/cm2 to 1 mA/cm2, V300_1 = 1.70
System operating voltage, Vop = 138 kV
Maximum sustainable steady state current density,
Imax = 1 mA/cm2.
Note that the characteristics are given in this case with
respect to Imax, which is dependent on the material used in the
arrestor.
The transition voltage of the arrestor, V0, is calculated as
the product of the thickness of the disk and the DC voltage at 1
mA/cm2 (see equation 9).
V0  h  E
Energy dissipation in surge arrestors is also important to
study because excessive levels of energy dissipation can lead
to overvoltages if of long enough duration. Even relatively
slow transients can become problematic. To illustrate how a
system with a surge arrestor responds to a transient, the surge
arrestor column analyzed above will be applied to a simple
single-phase system undergoing a no-load bus energization.
The system in question is shown in Fig. 8. The source voltage
is applied at t = 0.
(9)
The nonlinear sharpness parameter α is a function of
V300_1 and is calculated using equation 10.
 300 
ln 

0.001 


ln V300 _ 1 
(10)
Fig. 8. Simple single-phase system undergoing a no-load bus energization.
The source voltage Vs is applied at t = 0.
The value for p, the parameter that accounts for leakage
current under normal operating conditions, depends on the
disk diameter and the current density, as shown in equation 11.
J  D  p  0.8
(11)
Enough surge arrestor disks must be placed in series in
order to limit the steady state current density to Imax. The
number required (n) can be calculated if V0 and V300_1 are
known (see equation 12).
 2


 Vop 1.5 

n  ceiling  3


V0




(12)
Once the required number of disks is known, the value of
V0, the transition voltage, must be multiplied by this number in
order to get the new individual containers.
Using these equations, the V-I characteristic can be
plotted. For this example, the characteristic is shown in Fig. 7.
Fig. 7. V-I characteristic of the example surge arrestor column. Note how
the current is nearly zero for a wide range of voltages, but when the voltage
level gets high enough, current is allowed to flow so that the voltage does
not become too high.
The parameters for this system will be
Resistance, R = 3.5 Ω
Inductance, L = 35 mH
Capacitance, C = 70 µF
Source voltage,
Vs (t ) 
2
 Vop  cos(t   ) kV
3
ω = 377 radian/sec
φ = 10 degrees
In order to solve this system, the derivatives of the
current and the voltage are determined.
Vs  V  R  I L
(13)
L
I  I (V )
dV  L
(14)
C
dI 
As the energy dissipation in this system will be
determined numerically, the time step and duration must be
set. The time step (dt) will be 0.1 ms and the duration (T) will
be 100 ms. N will denote the required number of solution
points and is simply T divided by dt. The auxiliary constants
used in the numerical integration will be 1.5 and 0.5 (h1 and
h0).
Next, the initial conditions must be set.
Inductor current, IL0 = IL1 = 0 A
Arrestor and capacitor voltage, V0 = V1 = 0 V
Arrestor energy, E0 = E1 = 0 J
Finally, the numerical integration is performed and the
arrestor current, voltage, and energy dissipation are
determined.
I Li1  I Li  h1  dI i  h2  dI i 1
(15)
Vi 1  Vi  h1  dVi  h2  dVi 1
(16)
Ei 1  Vi  I (Vi )  dt
(17)
The arrestor voltage is shown in Fig. 9.
7
C. Simulation of Surge Arrestor Protection in PSCAD
To get an idea of how a surge arrestor actually works when
applied to a power system during a lightning strike, a
simulation was performed in PSCAD. PSCAD is a software
package that was developed at the University of Manitoba to
simulate power systems.
The PSCAD sheet used is shown in Fig. 12.
4 10
5
2 10
5
Vi
0
2 10
5
4 10
5
0
0.02
0.04
0.06
0.08
0.1
ti
voltage
Fig. 9. Arrestor voltage during no-load bus energization.
Fig. 3.3.4 Voltage across arrester
The arrestor current is shown in Fig. 10.
50
0
50
I  Vi
100
Fig. 12. PSCAD model of a power system. A lightning strike is applied to
the system, and the response of the system is examined. A surge arrestor
protects the system from overvoltages or flashover.
150
200
0
0.02
0.04
0.06
0.08
0.1
ti
current
Fig. 10. Arrestor discharge current during no-load bus energization. Note
the transient current
that passes
throughdischarge
the arrestor ascurrent
the voltage is
Fig. 3.3.5
Arrester
controlled during the energization.
Lastly, the arrestor energy dissipation is shown in Fig.
11.
6000
3
4.86410
4000
There are a number of aspects of this system that are
worth pointing out. The two cables on the left side of the
diagram represent a transmission line. One cable is a service
cable and the other is a ground cable.
The two parallel lines at the top of the diagram represent
the high voltage and neutral line in the system.
The three resistors slightly right of center in the diagram
represent the transmission line. In this case the transmission
line is represented simply as a surge impedance because for
the time frame we are concerned with here, the line will
behave according to its surge impedance. In other words, the
simulation time is less than the travel time for the line, so the
line is just a surge impedance in this simulation.
The subsystem at the far right of the diagram represents the
lightning strike that is applied to the power system. The
lightning surge is represented by equation 18.

Ei
I  50 e5010
0
t
 e1.210
6
t

(18)
This is a standard form used to describe a lightning surge.
The item in the upper middle of the diagram is a steepfront surge arrestor. It is actually a subsystem with separate
components,
as
seen
in
Fig.
13.
2000
0
6
0
0.02
4
110
0.04
0.06
ti
0.08
0.1
0.1
energy
Fig. 11. Arrestor energy dissipation during no-load bus energization.
Fig. 11 shows that the arrestor must be able to dissipate
55 kJ of energy during the transient. This energy is dissipated
as the arrestor allows current to flow through it in order to
limit the voltage applied to the bus during the initialization [1].
8
voltage between the high and neutral lines. So much current is
flowing through the arrestor at higher voltages that the voltage
should not remain at more than 2.5 or 3 times the operating
voltage for any significant length of time.
The results of the simulation are shown in the series of
graphs shown in Fig. 15 and Fig. 16. Fig. 15 shows the
current, in kA, flowing through the arrestor over time. Note
how the current increases in response to the lightning strike
transient, thereby limiting the voltage between the high and
neutral lines.
Fig. 13. PSCAD model of a steep-front surge arrestor. The arrestor is
actually constructed of two arrestors in parallel, which allows the arrestor
to handle particularly fast transients.
The most important characteristic of this arrestor to note
is that it actually combines two arrestors in parallel. This
allows the arrestor as a whole to handle more current and
therefore limit voltages even during particularly fast and
powerful transients. The sharing of current allows each
arrestor to dissipate less power, making thermal runaway and
damage to the arrestors less likely.
The V-I characteristic of the surge arrestors was set using
a dialog box as shown in Fig. 14.
Fig. 15. Current across the surge arrestor component over time in the
PSCAD simulation. The current increases rapidly in response to the
lightning strike, thereby limiting the voltage between the high and
neutral lines.
Fig. 16 shows the voltage between the high and neutral
lines of this system. Initially, this voltage is fairly large (70
kV) relative to the operating voltage (5 kV). However, the
steep-front surge arrestor quickly kicks in and limits the
voltage to around 12 kV by the time 4 µsec have elapsed. This
is about 2.4 times the operating voltage, and is a reasonably
safe level of operation.
Fig. 14. PSCAD dialog box to set up the V-I characteristic of the surge
arrestors. The column on the left shows current levels at various multiples
of the operating voltage, which is in the column on the right.
Note that at low multiples of the operating voltage (which
is 5 kV in this simulation), the current flow is very small.
However, the current flow becomes significant at around 1.75
times the operating voltage. By allowing current to flow
through itself at higher voltages, the surge arrestor controls the
Fig. 16. Voltage between the high and neutral lines over time in the
PSCAD simulation. Note how the voltage is limited to 12 kV (2.4 time
the operating voltage) after just 4 µsec.
The effect of the surge arrestor in this situation is best
understood by considering what the result would be if the
surge arrestor was not present. When the simulation is run
with the surge arrestor removed the voltage between the high
9
and neutral lines reached excessive levels. As can be seen in
Fig. 17, the voltage between these lines approaches 8 MV, a
dangerously high level that would certainly lead to damage to
the power system [6].
Fig. 17. Voltage between the high and neutral lines over time in a
PSCAD simulation without a surge arrestor present. Note how the
voltage reaches extremely high levels (8 MV) relative to the operating
voltage (5 kV).
D. Practical Advice for Arrestor Selection and
Implementation
The proper approach when selecting and implementing
a surge arrestor is to first determine the minimum arrestor
rating that will not lead to damage to the arrestor. One the
arrestor has been selected, then the insulation level that is
required to result in an acceptable probability of flashover or
risk of failure must be defined. Essentially, the current and
voltage flowing through the arrestor are controlled by the
selection of the arrestor, but the insulation level determines if
the system will be able to handle the voltage level that the
arrestor limits to. For example, an arrestor might hold the
voltage level relatively low, but if the insulation is very poor,
flashover could still occur.
There are four main factors of an application to which an
arrestor is to be applied to consider when selecting an arrestor.
The first factor is the maximum fundamental frequency
continuous operating voltage (MCOV) applied to the arrestor.
The MCOV rating of the arrestor must be at least equal to and
should usually exceed the highest continuous system voltage
by some small margin.
The temporary fundamental frequency overvoltage
(TOV) that the arrestor will be exposed to is the next quantity
to consider. During fault conditions or when a lightning strike
has occurred, the line-to-ground voltages on unfaulted phases
can rise significantly.
This value gives the level of
overvoltage that can be expected for a short period of time,
and the chosen arrestor must be able to withstand this level of
voltage.
The third factor to consider is the energy that the arrestor
must absorb during a lightning strike.
As mentioned
previously, arrestors may end up absorbing a lot of energy
when limiting surges on a transmission line. If an arrestor
dissipates more energy than it is rated as able to handle, it can
be damaged or even fail altogether
The final factor to consider when selecting an arrestor is
the voltage level that the protected component can withstand
Clearly, the arrestor should limit the voltage level it allows to
an acceptable level for an acceptable period of time [5].
Once these four characteristics of the application of the
arrestor are used to pick an arrestor, the protective level of the
arrestor must be correlated with the insulation. While the
arrestor does limit the voltage across the protected component
to a certain discharge voltage, there still must be sufficient
insulation to ensure that even at this relatively low voltage
level flashover does not occur. The process of matching the
characteristics of the insulation equipment with the
characteristics of the protective device is referred to as
insulation coordination. The discharge voltage of the arrestor
depends on the waveshape and rise time of the applied voltage
surge. To determine the enough insulation is provided in order
to withstand a lightning strike, typically a 10 kA, 8 x 20 µsec
discharge is applied experimentally. If the insulation is
sufficient, the arrestor will not flash over during the
experiment. Other experiments are run to ensure that the
insulation is sufficient to handle other situations [1].
The protective margin is a quantity which summarizes the
safety of the insulation selection. It is the difference between
the insulation withstand voltage and the arrestor ceiling
voltage divided by the arrestor ceiling voltage. A safe system
will have a relatively large protective margin. A margin of
40% is appropriate unless all uncertainties are evaluated [5].
It is important to appreciate one of the main trade-offs
involved in arrestor selection. It is desirable to limit the
voltage in question to a relatively low level because this makes
the insulation coordination easier. Unfortunately, as the
discharge level of the arrestor decreases, the leakage current
during steady state operation increases. This leads to larger
unwanted power dissipation and higher costs. The trade-off
between these costs and the savings resulting from lower
insulation coordination costs must be weighed carefully when
choosing an arrestor.
To communicate the principles of arrestor selection more
thoroughly, an arrestor will be selected for a hypothetical
application. In this application, surge arrestors are to be
applied to the line-to-ground terminals of a circuit breaker with
a 38 kV rating and a BIL of 150 kV used on a grounded 34.5
kV system. The highest expected continuous system voltage is
37 kV, but the phase-to-ground voltage can rise to 27.9 kV
rms during fault conditions, and faults can persist for up to 20
cycles.
The MCOV rating of the chosen arrestor must meet or
exceed 37/√3 = 21.4 kV rms, the maximum sustained line-toground voltage level. The TOV rating of the arrestor must be
greater than 27.9 kV rms, the expected TOV level of the
system [5].
One possible arrestor that would meet these criteria is the
Fig. 10. Voltage
between the high
and neutral lines
over time in the
PSCAD
simulation. 27
NotekV rms polymer
how the voltage
Electric. A picture of
is limited to 12
kV (2.4 time the
operating
voltage) after just
4 µsec.
10
intermediate arrestor made by General
this arrestor is shown in Fig. 18.
[4]
[5]
[6]
[7]
[8]
[9]
Fig. 18. GE 27 kV rms polymer intermediate arrestor [8].
This arrestor has a MCOV of 22 kV rms, which exceeds
the required value of 21.4 kV rms. This arrestor has is rated
for a TOV of 34.5 kV rms, so it fulfills the requirements on
TOV (must be greater than 27.9 kV rms). Finally, the
insulation level must be considered. In this case the protective
margin can be calculated by comparing the 10 kA discharge
level of the arrestor (72 kV rms) and the insulation BIL (150
kV rms). This leads to a very safe protective margin of 108%.
This surge arrestor would be an excellent choice for this
application [8].
V. CONCLUSION
While lightning strikes can be incredibly damaging to
power systems, that does not mean that they have to be. If the
appropriate surge arrestor is selected and combined with the
appropriate level of insulation, most lightning strikes will not
damage the system. Future work in this field should be
focused on finding materials with better nonlinear
characteristics and more distinct discharge voltages. This will
allow arrestors to protect equipment with less insulation and
without allowing too much current leakage during steady state
operation.
ACKNOWLEDGMENTS
M. J. Bloem would like to thank Professor Paulo Ribeiro of
Calvin College in Grand Rapids, Michigan for his advice and
guidance during the research for and writing of this paper.
REFERENCES
[1]
[2]
[3]
Spezia, Carl J. and Constantine I. Hatziadoniu. Electrical Power
Systems Engineering [E-book]. Ch. 3, “Electrical Transients.”
De la Rosa, Fransisco. “Characteristics of Lightning Strokes” in The
Electrical Power Engineering Handbook. L. L. Grigsby, Ed. Boca
Raton, FL: CRC Press in cooperation with IEEE Press, 2001, pp. 10-2 –
10-7.
Chowduri, Pritndra. “Overvoltages Caused by Direct Lightning
Strokes” in The Electrical Power Engineering Handbook. L. L.
Grigsby, Ed. Boca Raton, FL: CRC Press in cooperation with IEEE
Press, 2001, pp. 10-8 – 10-20.
Chowduri, Pritndra. “Overvoltages Caused by Indirect Lightning
Strokes” in The Electrical Power Engineering Handbook. L. L.
Grigsby, Ed. Boca Raton, FL: CRC Press in cooperation with IEEE
Press, 2001, pp. 10-21 – 10-35.
Lambert, Stephen R. “Insulation Coordination” in The Electrical
Power Engineering Handbook. L. L. Grigsby, Ed. Boca Raton, FL:
CRC Press in cooperation with IEEE Press, 2001, pp. 10-93 – 10-101.
Manitoba HVDC Research Centre, Inc. PSCAD/EMTDC Ver. 3.0.8,
2001.
Greenwood, Allan. Electrical Transients in Power Systems, 2nd ed.
New York: John Wiley & Sons, Inc., 1991, ch. 16.4 “Surge Suppressors
and Lightning Arrestors.”
TRANQUELL ® Surge ArrestersProduct Selection & Application
Guide. General Electric Capacitor and Power Quality Products, Ft.
Edward, NY, 1999.
Mathsoft Engineering and Education, Inc. MathCad Ver. 11.0a, 2002.
Michael J. Bloem (M ’03) was born in Detroit,
MI on February 8, 1982. Michael received his
secondary education from the International
School Manila and Singapore American School.
Michael currently attends Calvin College in
Grand Rapids, MI, where he is working towards
a BSE with an electrical and computer
engineering concentration and a second major in
economics. He will receive this degree in May
of 2004.
He currently works as an Engineering Intern
for Smiths Aerospace in Grand Rapids, MI. Prior to working with Smiths, he
was an Engineering Intern at Delphi Automotive. During the summer of
2002, he worked as a Research Assistant on a project involving the
mathematical modeling of forest growth at Calvin College with Professors
Rikki Wagstrom and Randy Van Dragt. He is also currently working on a
senior design project involving three-dimensional motion capture using
inertial sensors.