Who's Who in SIGDA Executive Committee Chair Diana Marculescu Vice Chair Patrick Madden Secretary/Treasurer Robert Jones Past Chair Robert Walker Members-at-Large Igor Markov Massoud Pedram Bryan Preas Liaisons for SIGDA Programs Symposia & Workshops Patrick Madden Travel Grants Robert Jones Awards Bryan Preas Technical Committees Massoud Pedram SIGDA E-Newsletter EIC Qing Wu TODAES EIC Nikil Dutt University Booth at DAC Alex Jones Ph.D. Forum at DAC Robert Jones DASS at DAC SungKyu Lim CADathlon at ICCAD Igor Markov Letter from the Chair It is my pleasure to welcome all EDA Professionals attending 44th Design Automation Conference to this special issue on EDA-related news from SIGDA – ACM’s Special Interest Group on Design Automation. SIGDA has been a sponsor of the Design Automation Conference since its inception in 1964. As in the past year, we welcome all DAC attendees at SIGDA-sponsored events: on Saturday and Sunday preceding DAC, the 3rd Design Automation Summer School gathers graduate students in EDA for attending lectures given by experts in the field. On Tuesday evening, Ph.D. students showcase their dissertation work in the 10th SIGDA Ph.D. Forum at DAC, while demos of University research projects are presented in the 20th SIGDA/DAC University Booth every day on the exhibit floor. We invite you to attend these events and programs along with other colleagues and friends. We also invite you to join us at DAC’s opening session on Tuesday morning where the founders of these events will be recognized and given special awards. During this year’s SIGDA Member Meeting and Ph.D. Forum on Tuesday we are showcasing some of the activities that the newly started SIGDA Technical Committees have initiated in various areas of EDA. Join us to find out about new technical activities in your area and how you can contribute or get involved. Enjoy the conference and hope to see you at SIGDA programs at DAC! Diana Marculescu SIGDA Chair Become an ACM/SIGDA member at http://www.sigda.org/membership.html 3rd Design Automation Summer School at DAC 2007 http://www.ece.rice.edu/~kmram/dass07/ Chairs: Kartik Mohanram, Rice U. and Vikas Chandra, Cswitch Saturday-Sunday, June 2-3, Rm.24ABC (San Diego Convention Center) DASS Lectures: 1. 2. 3. 4. Asynchronous Circuits and Systems for Nanoelectronics – Alain Martin, California Institute of Technology Energy Efficient Circuit Technologies for the Multicore Era – Ram Krishnamurthy and Himanshu Kaul, Intel On-Chip Networks: Why, What, and How – Radu Marculescu, Carnegie Mellon University Design and CAD for Manufacturability – David Pan, University of Texas, Austin 5. 6. 7. 8. One-dimensional Nanostructures for Nanoelectronics – Jing Guo, University of Florida System Design for Atomic-Scale Electronics – Andre DeHon, University of Pennsylvania Statistical Design and Optimization – Michael Orshansky, University of Texas, Austin Nonlinear and Parametric Circuit Modeling – Joel Phillips, Cadence Berkeley Labs 10th SIGDA PhD Forum at DAC 2007 http://www.sigda.org/daforum Chair: Tony Givargis, UCI Co-Chair: Jin Yang, Intel USA Tuesday, June 5, 6:30-8pm, Sails Pavilion (San Diego Convention Center) 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. Energy Accounting for Energy-Aware Applications in Multitasking Systems. Changjiu Xian, Purdue University (US) Accurate Leakage-Conscious Architecture-Level Power Estimation Models for On-Chip SRAM Memory Arrays. Minh Do, Chalmers University of Technology (Sweden) A System-Level Timing Analysis and Optimization Methodology for Hardware Compilation. Girish Venkataramani, Carnegie Mellon University (US) Energy Efficient Reliability Schemes for Hard RealTime Systems. Tongquan Wei, Michigan Technological University (US) Computation of the Minimum Data Storage and Applications in the Memory Management for MultiDimensional Signal Processing Systems. Hongwei Zhu, University of Illinois at Chicago (US) Power-aware Gaming on Portable Devices. Yan Gu, National University of Singapore (Singapore) Communication Synthesis for Networks-on-Chip (NoC). Praveen Bhojwani, Texas A&M University (US) A Platform-based Design Flow for Enabling Automated Mapping on Heterogeneous Multiprocessor Embedded Systems. Abhijit Davare, UC Berkeley (US) Analysis and Optimization of Fast and Accurate SoC Platform Models. Gunar Schirner, UC Irvine (US) Cross-layer Approach for Integrated Power Management. Nevine AbouGhazaleh, University of Pittsburgh (US) Regularly Structured Circuit Design Methodology. Zhenyu Qi, University of Virginia (US) Instruction and Data Cache Timing Analysis in FixedPriority Preemptive Real-Time Systems. Jan Staschulat, Technical University Braunschweig (Germany) Tackling Emerging Reliability Issues in FPGAs. Suresh Srinivasan, Penn State University (US) 14. An Architectural Approach for Reducing Power and Increasing Security of RFID Tags. Shenchih Tung, University of Pittsburgh (US) 15. Concepts for Self-adaptive Reconfigurable Networks. Thilo Streichert, University Erlangen-Nuremberg (Germany) 16. A Micro-Power Hardware Fabric for Embedded Computing. Gayatri Mehta, University of Pittsburgh (US) 17. An Architecture Framework for an Adaptive Extensible Processor. Hamid Noori, Kyushu University (Japan) 18. Algorithmic Techniques for Nanometer VLSI Design and Manufacturing Closure. Shiyan Hu, Texas A&M University (US) 19. Proper Timing and Reliability Characterization, Extraction and Optimization of CMP and Via Fills. Rasit Onur Topaloglu, Chalmers UC San Diego (US) 20. An Effective Clustering Algorithm for Placement. Jianhua Li, University of Calgary (Canada) 21. New Place and Route Algorithms for Wire Length Improvement with Concern to Critical Paths. Renato Hentschke, UFRGS (Brazil) 22. Methodologies for Adaptation to Process Variations, Manufacturing Defects, and Transient Errors in Scaled CMOS. Maryam Ashouei, Georgia Institute of Technology (US) 23. Reliability-driven circuit design and optimization. Quming Zhou, Rice University (US) 24. Improving CNF-SAT Search by Analyzing ConstraintVariable Dependencies. Vijay Durairaj, University of Utah (US) 25. A TLM Design for Verification Methodology. Nicola Bombieri, University of Verona (Italy) 26. Design Tools and Optimization Methods for Digital Microfluidic Biochips. Tao Xu, Duke University 27. Optimization and Synthesis of Analog Circuit and System using Evolutionary Algorithms Techniques. Manuel Barros, Instituto Politécnico de Tomar (Portugal) 20th SIGDA/DAC University Booth at DAC 2007 http://www.sigda.org/programs/Ubooth/Ubooth2007/ Chairs: Alex Jones and Jun Yang, U. of Pittsburgh Monday-Thursday, June 4-7, 9-5pm, Booth 3672 (San Diego Convention Center) 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. Carnegie Mellon University (CMU): NoCPro: NoC Power-Performance Evaluation and Prototyping CMU: Wireless video sensor networks Chung Yuan Christian Univ. (CYCU): Clock Tree Synthesis for Low Power CYCU: An Effective Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction in SOC designs Drexel Univ.: Automated Resonant Rotary Clock Routing Tool with Single Ring Implementation Eindhoven Univ. of Technology (EUT): MAMPS Multiple Application Multi-Processor Synthesis EUT: A predictable design-flow for NoC-based MP-SoCs Federal Univ. of S. Catarina: An efficient implementation of the ACM MOSFET model in ELDO for VLSI circuit design Hogeschool voor Wetenschap & Kunst (HWK): Multifunctional Digital Embedded Platform HWK: Open Hardware Platform Iowa State Univ.: Differential Power Analysis (DPA) Attack on a Reconfigurable Platform National Chiao Tung Univ. (NCTU): NEMO: A new implicit connection graph-based gridless router with Multi-Layer plane and Pseudo-Tile propagation NCTU: Visual quality-guided power minimization for LED-backlit TFT-LCD monitors National Chung Cheng Univ. (NCCU): A 252Kgates/4.9Kbytes SRAM/71mW Multi-Standard Video Decoder for High Definition Video Applications NCCU: CCU-VIP: SOC Virtual Integration Platform for HW/SW integration, system simulation, debugging, and performance analyzing with virtual reality environment National Sun Yat-Sen Univ. (NSYSU): An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration NSYSU: Automatic Verification of External Interrupt Behaviors for Microprocessor National Taiwan Univ. (NTU): A Novel Full-Chip Gridless Routing System Considering Double-Via Insertion NTU: NTUplace: A High-Quality Large-Scale Mixed-Size Placement System NTU: Voltage-Island Partitioning and Floorplanning for Power optimization under Performance Requirements NTU: Analytical aerial imaging simulation for optical proximity correction, and hardware accelerated emulation by FPGA Osaka Univ.: SoC Architecture Explorer: An IP-based SoC architecture exploration tool using system-level profiling Politecnico di Torino: NoCRay, an FPGA Network-onChip Based MP-SoC for Graphics Ray Tracing Applications Seoul National Univ. (SNU): SECM: A Cycle-Accurate Energy Measurement and Characterization Tool SNU: HOPES: model-based Programming Environment of Embedded Software for MPSoC SNU: Efficient SoC design space exploration flow Technical Univ. of Lisbon: Automatic Power Grid Stimuli Generation Texas A&M Univ.: FPGA-Based Hardware Acceleration for Boolean Satisfiability The Univ. of Tokyo: High-Level SoC Design Support IP Reuse Methodology TU/Eindhoven: NoCTurn - Multi-Processor System-onChip Platform Simulator Univ. of California, Los Angeles (UCLA): Device and Architecture Concurrent Optimization for FPGA 32. 33. 34. 35. 36. 37. 38. 39. 40. 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. Considering Process Variation and Transient Soft Error Rate UCLA: Design, Synthesis and Evaluation of Heterogeneous FPGA with Mixed LUTs and MacroGates Univ. of California, Davis: Customizable Array of Processors: A Vision for Execution of Streaming Applications on Embedded Systems Univ. of California, Riverside: Projection-based balanced truncation for passive model order reduction of RLC interconnect circuits Univ. of Erlangen: SystemCoDesigner Univ. of Lugano: Enabling power analysis resistant design Univ. of Michigan, Ann Arbor: Turn-key Verification using Uninterpreted Functions and CounterexampleGuided Abstraction Refinement Univ. of Pittsburgh (Pitt): Design of a lab-on-chip for manipulating and detecting nanometer scale particles using 3D integrated circuit technology Pitt: A micro-power Fabric for embedded computing Univ. of Strathclyde: DesignTag: A System for Detecting the Presence of Misused Intellectual Property within Integrated Circuits Univ. of Texas at Austin (UTAustin): BoxRouter - A routability-driven global router UTAustin: Easy configurable C++ library using expression templates for lithography simulation Univ. of Verona: HIFSuite: Tools for HDL Code Manipulation Univ. of Washington: RAMP Purple – Shared-memory many-core processor emulation and prototyping system Virginia Tech: Platform-authenticated media using SAM MSE Demos: Abdus Salam International Center for Theoretical Physics: A Reconfigurable Virtual Instrumentation System Based on FPGA Eindhoven Univ. of Technology: CoMPSoC: A Composable and Predictable Multi-Processor System on Chip Federal Univ. of Rio Grande do Sul (FURGS): KARMA: a Didactic Tool for Two-Level Logic Synthesis FURGS: Transistor Level Automatic Layout Generator for non-Complementary CMOS Cells Lafayette College: CADAPPLETS - Web-based Visualization of VLSI CAD Algorithms National Cheng Kung Univ.: An educational instrument for undergraduate students to learn the design concept of an embedded microcontroller NSYSU: The Power Analysis Tool for an Embedded Systems Development Board Norwegian Univ. of Science and Technology: Readout and Control Circuit for a Four Pixel Digital Camera Purdue Univ.: 3D Virtual Reality IC layout visualization SNU: Embedded System Design Course Track and Selective Demonstrations of Design Projects Stanford Univ.: NetFPGA - An Open Platform for Gigabit-rate Network Switching and Routing Univ. of Tokyo: VLSI CAD Education and Exercise Course with Public Domain Tools Univ. of Virginia: Accurate Back-of-the-Envelope Transistor Model for Deep Sub-micron MOS Univ. of Wisconsin, Madison: Demonstration of A Modern Physical Design Flow Using the Silicon Virtual Prototyping Back-End Tools of Cadence Virginia Tech: A Senior-Level Course in Hardware/Software Codesign ACM/SIGDA Membership Benefits SIGDA members receive the SIGDA E-Newsletter twice a month, full access to SIGDA conference proceedings in the ACM DL, and receive reduced registration rates to SIGDA-sponsored events as well as reduced subscription rates to ACM Transactions on Design Automation of Electronic Systems. In addition, SIGDA members are eligible to apply for the various professional development programs sponsored by SIGDA and run by SIGDA volunteers, such as: SIGDA Travel Grant program (ongoing) SIGDA University Booth and Ph.D. Forum at DAC (annually), Design Automation Summer School at DAC (biennially) SIGDA CADathlon at ICCAD (annually) The 2008 membership fee is $25 ($15 for students). Consider joining ACM/SIGDA - the resource for EDA professionals. Become an ACM/SIGDA member at http://www.sigda.org/membership.html