CS2420 Term Project Asynchronous Serial Communication I

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CS2420 Term Project
Asynchronous Serial Communication
I. Project Background
In this project, we will design and implement a simple mouse that has left and right click. The mouse uses
asynchronous serial communication (ASC) protocol to send the type of click to the computer. This type of
mouse is well known as the old RS232 mouse.
The ASC protocol can be illustrated by the figure below. The sender (mouse) uses the ASC protocol to
send 8-bit data over the serial cable to the receiver (computer). The sender and the receiver have their own
clocks of the same frequency 9600 Hz for sending and receiving data. The figure shows two examples of
how a byte is sent over the serial cable.
The protocol can be summarized as follows:
1) When no data is being transmitted, the signal on the serial cable is '1'.
2) When the sender starts transmission, it first sends '0' as the start bit. Following the start bit, the sender
sends the 8-bit data, and then sends the parity bit. Finally the sender sends '1' as the stop bit. So, for one
byte data, the sender actually needs to send 11 bits.
3) The receiver is always listening on the serial cable. When the signal on the cable turns to '0', the
receiver starts to record the following 8 bits as data, then 1 bit as parity, and finally 1 bit as stop. Then, the
receiver checks if the parity bit matches the 8-bit data. If yes, the receiver accepts the data. Otherwise, the
data is discarded.
II. Project Overview
The project needs to design and implement sender's and receiver's circuits in LogicWorks as shown in the
figure below. Both circuits consists of two components: a combinational logic component (CLC) and a
sequential logic component (SLC). The sender's CLC accepts mouse's inputs (In0 and In1) and composes
11-bit data (D0-D10). Then, the sender's SLC transmits the 11-bit data in a sequence over the serial cable
with its clock CLK_S. In a reverse way, the receiver's SLC receives data (D0-D10) with its clock CLK_R
and sends mouse input (Out0 and Out 1) to the computer.
III. Combinational Logic Design
III.A. In this task, we implement a circuit to generate the 11 bits (D0-D10). We assume the input (In0In1) for left click is '01', and '10' for right click. Then, an 8-bit data for the left click is generated as
'01100110', and '10101010' for the right click. Please complete the following table to add the start, the
parity and the stop bits to the 8-bit data.
Click
In0-In1
8-bit data
Left
01
01100110
Right
10
10101010
11-bit data (D0-D10)
III.B. Write down the logic functions for the sender that take In0-In1 as arguments and output D0-D10.
D0=
D1=
D2=
D3=
D4=
D5=
D6=
D7=
D8=
D9=
D10=
III.C. Write down the logic functions for the receiver that take D0-D10 as arguments and output Out0Out1.
Out0=
Out1=
III.D. In LogicWork, use combinational logic design methods to design and implement the sender's CLC.
Take a screen shot of your circuit and paste it here.
III.E. In LogicWork, use combinational logic design methods to design and implement the receiver's
CLC. Take a screen shot of your circuit and paste it here.
III.F. Demonstrate to your lab instructor that the receiver's CLC can receive the data from the sender's
CLC.
IV. Sequential Logic Design
IV.A. Follow the example in the example figure above to draw the signal when transmitting a left click
and a right click over the serial cable in a sequence.
IV.B. Draw the state diagram of the sender's SLC.
IV.C. Draw the state table of the sender's SLC.
IV.D. In LogicWorks, implement the sender's SLC. Take its screen shot and paste it here.
IV.E. Draw the state diagram of the receiver's SLC.
IV.F. Draw the state table of the receiver's SLC.
IV.G. In LogicWorks, implement the receiver's SLC. Take its screen shot and paste it here.
IV.H. Demonstrate to your lab instructor that the complete circuit can work.
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