PROJECT DESCRIPTION
I. Silicon Carbide Monte Carlo Transport Simulations
Silicon Carbide (SiC) exhibits a large bandgap, a large thermal conductivity and a large
breakdown field. These and other material properties are well suited for use in high
power, high-temperature MOSFETs, offering a potential advantage over silicon in this
regime. Silicon Carbide is a relatively new material with respect to electronic
applications with material properties that differ markedly from those of silicon. An
understanding of the physical mechanisms that significantly effect charge transport in
silicon carbide is therefore very important, and will greatly aid the advancement of SiC
electronic devices. Our on-going Monte Carlo transport investigations are directed
towards understanding the physical mechanisms that influence charge transport in silicon
carbide MOSFETs. This has included extensive studies of the factors influencing
transport in the bulk and at the SiC-oxide interface, including band structure and
scattering effects.
One issue we are studying is the inversion layer mobility in SiC MOSFETs. Power
MOSFET devices require a high mobility in order to maintain large currents and to
demonstrate fast switching. Measurements in both 4H and 6H-SiC have although shown
very low inversion layer mobilities (0-20cm2/Vs) for the typical (0001) surfaces at low
bias. Our Monte Carlo Simulations show that this is consistent with the scattering of
mobile charges with the large density of trapped charged measured at the (0001) SiCoxide interface. Our simulations for the (1120) orientation, with a lower density of
trapped charge, show a much larger mobility, 100cm2/Vs, as observed in experiments.
We wish to understand how differences in the trapped charge density, surface band
structure, and surface roughness influence the mobility enhancement on going from the
(0001) to the (1120) surface.
We have found that the band structure plays little role since the surface band structures
for the (0001) and (1120) orientations are very similar. The slight off-axis cut of the
(0001) silicon carbide surface creates a large surface roughness that is not present in the
(1120) orientation. We wish to understand how this affects the mobility of the (0001)
surface, particularly at high gate fields when the occupied traps are more effectively
screened by the mobile inversion charge. Surface roughness scattering in (0001) SiC
MOSFETs may likely become more important at low and high bias as the trap levels are
reduced. The study of other surfaces with low trap levels, such as the (1120) surface, will
therefore lead to an important understanding of transport in high quality (0001) SiC.
Another area of our continuing Monte Carlo studies is the determination of physical
parameters that may be used in our drift and diffusion simulator. These involve band
structure, and scattering parameters. We also wish to understand the physical
mechanisms that influence current saturation in the SiC MOSFET channel. One question
we address is the extent to which scattering from trapped or fixed charge, or surface
roughness is an important determiner of velocity saturation Vsat in the channel. An
understanding of the physical mechanisms that determine Vsat is critical, allowing the
development of a high bias mobility model for our drift and diffusion simulator.
An adequate understanding of charge transport in the inversion layer of a SiC MOSFET
requires a physical model that explains how mobile charges scatter from the large
densities of surface traps and fixed oxide charge that are present. To this end we are
developing a quasi-two dimensional model for the coulombic scattering rate. The rate
incorporates the effects of channel quantization, charge screening, and the distribution of
trapped and fixed interface charge. Our physical scattering models will then be
incorporated into mobility models for our drift and diffusion simulator.
The wide bandgap and heteropolar nature of silicon carbide as compared to silicon
prompts an investigation of the resulting effects on transport. A wide band gap means a
smaller barrier between the inversion layer charge and the oxide in a MOSFET. This
may further be effected by the poor quality of the SiC-oxide interface. We wish to
determine if this leads to mobility degradation due to the tunneling of mobile electrons
into the oxide. The size difference between the silicon and carbon atoms in SiC leads to
polarization and mobile charges are strongly scattered by polar optical phonons. This is
not observed in Si. Also stacking faults often occur in SiC due to the large number of
polytypes that occur. We wish to determine how these properties influence transport in
SiC MOSFETs.
II.
To date we have developed a 2D Drift Diffusion Model for 6H SiC MOSFETS
characterized from 25-200 C by the Army Research Laboratory (ARL). This simulator
has been shown to effectively describe the current –voltage (I-V) characteristics of these
devices especially at low fields over this temperature range. At high fields ( more
characteristic of power devices )there is an under prediction of the drain current by 2545% at 5 and 7 V on the gate. We believe that this discrepancy is caused by a lack of
understanding on how the very large density of interface trapped charge effects the
channel saturation velocity (Vsat) as a function of temperature. Although interface
trapped charge effects on low field mobility are well documented in the literature ,we
found no reference for these effects on Vsat. For this reason we have included more
emphasis in Part A on the physics of Vsat.
The SiC Device Simulator will be used to model SiC MOSFETS or other SiC devices
which have been electrically characterized by ARL .It is expected that most of the
emphasis will be placed on understanding the 4H SiC MOSFETS since the 4H polytype
is of most interest for power devices because potentially higher channel mobilities and
device drive current. The simulator will be used to predict the 4H device performance as
a function of temperature and compare the results with ARL measurements. It is our goal
to use the model to understand the effect of SiC material properties including
defects,fabrication procedures including oxide growth and implant/anneal steps ,and
device designs on the SiC devices as a function of temperature. One specific task will be
to use the model to determine the density of fixed charge at the SiO2/SiC interface. To
date there has been no experimental procedure to determine this charge which has an
important effect on the MOSFET threshold voltage. AS the interface trapped charge
density is reduced more attention must be given to reducing Nf to control the device
threshold voltage.
Another goal of the work is to use the understanding of the device physics and the
temperature response to model the power DMOSFETs which are of interest to the ARL.
This includes the operation of these devices at high current and high temperature and the
understanding of any device degradation observed at realistic long term operating
conditions.
To meet the ARL requirements for some power applications it may be required that the
SiC devices be switched at prequencies as high as 100 KHz. The simulator will be used
to make predictions of the switching time for various SiC device designs and with state of
the art processing. It is expected that the switching time will be strongly dependent on the
density of interface traps and other physical effects contributing to the low channel
mobility. To date the simulator has only been used to describe the steady state (D.C.)
device characteristics and additional improvements will be made to the model to
accurately predict the transient response of the devices. One spin-off of the work will be
SPICE/SABER device parameters to be used by others in modeling SiC circuits.
We wish to understand how differences in the trapped charge density, surface band
structure, and surface roughness influence the mobility enhancement on going from the
(0001) to the (1120) surface.

We wish to understand how this affects the mobility of the (0001) surface, particularly at
high gate fields when the occupied traps are more effectively screened by the mobile
inversion charge.
Another area of our continuing Monte Carlo studies is the determination of physical
parameters that may be used in our drift and diffusion simulator.
A wide band gap means a smaller barrier between the inversion layer charge and the
oxide in a MOSFET. This may further be effected by the poor quality of the SiC-oxide
interface. We wish to determine if this leads to mobility degradation due to the
tunneling of mobile electrons into the oxide.
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